diff -Nrc3pad gcc-3.0.1/.brik gcc-3.0.2/.brik *** gcc-3.0.1/.brik Sun Aug 19 22:50:26 2001 --- gcc-3.0.2/.brik Tue Oct 23 11:37:15 2001 *************** *** 3,30 **** # CRC-32 filename # ------ -------- - 4294967295b ./.brik 2864072627b ./.cvsignore ! 873677691b ./BUGS 2171125041b ./COPYING 508743035b ./COPYING.LIB ! 226845448b ./ChangeLog ! 4244897222b ./FAQ ! 3826647863b ./GNATS 2229468985b ./INSTALL/README ! 3837555366b ./INSTALL/binaries.html ! 3242873726b ./INSTALL/build.html ! 3927920424b ./INSTALL/configure.html 1964338015b ./INSTALL/download.html ! 2951706212b ./INSTALL/finalinstall.html 4063529934b ./INSTALL/index.html ! 1238341873b ./INSTALL/specific.html 2369737775b ./INSTALL/test.html ! 3015795079b ./MAINTAINERS 253028645b ./Makefile.in 3697693037b ./README 3461973635b ./boehm-gc/BCC_MAKEFILE ! 227979088b ./boehm-gc/ChangeLog 4012707064b ./boehm-gc/EMX_MAKEFILE 145946109b ./boehm-gc/MacOS.c 591574792b ./boehm-gc/MacProjects.sit.hqx --- 3,29 ---- # CRC-32 filename # ------ -------- 2864072627b ./.cvsignore ! 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3612158683b ./libstdc++-v3/include/bits/c++config 2314692779b ./libstdc++-v3/include/bits/char_traits.h 2805936695b ./libstdc++-v3/include/bits/codecvt.h 4120003531b ./libstdc++-v3/include/bits/concept_check.h *************** *** 9338,9344 **** 2709925409b ./libstdc++-v3/include/bits/std_iostream.h 570267107b ./libstdc++-v3/include/bits/std_istream.h 2834882043b ./libstdc++-v3/include/bits/std_iterator.h ! 4140823078b ./libstdc++-v3/include/bits/std_limits.h 2877785888b ./libstdc++-v3/include/bits/std_list.h 3961142338b ./libstdc++-v3/include/bits/std_locale.h 201090893b ./libstdc++-v3/include/bits/std_map.h --- 9355,9361 ---- 2709925409b ./libstdc++-v3/include/bits/std_iostream.h 570267107b ./libstdc++-v3/include/bits/std_istream.h 2834882043b ./libstdc++-v3/include/bits/std_iterator.h ! 243895402b ./libstdc++-v3/include/bits/std_limits.h 2877785888b ./libstdc++-v3/include/bits/std_list.h 3961142338b ./libstdc++-v3/include/bits/std_locale.h 201090893b ./libstdc++-v3/include/bits/std_map.h *************** *** 9382,9388 **** 4190899759b ./libstdc++-v3/include/bits/stl_stack.h 2706761852b ./libstdc++-v3/include/bits/stl_tempbuf.h 4173037205b ./libstdc++-v3/include/bits/stl_threads.h ! 800388815b ./libstdc++-v3/include/bits/stl_tree.h 2510296522b ./libstdc++-v3/include/bits/stl_uninitialized.h 3933418180b ./libstdc++-v3/include/bits/stl_vector.h 2427064909b ./libstdc++-v3/include/bits/streambuf.tcc --- 9399,9405 ---- 4190899759b ./libstdc++-v3/include/bits/stl_stack.h 2706761852b ./libstdc++-v3/include/bits/stl_tempbuf.h 4173037205b ./libstdc++-v3/include/bits/stl_threads.h ! 885729826b ./libstdc++-v3/include/bits/stl_tree.h 2510296522b ./libstdc++-v3/include/bits/stl_uninitialized.h 3933418180b ./libstdc++-v3/include/bits/stl_vector.h 2427064909b ./libstdc++-v3/include/bits/streambuf.tcc *************** *** 9462,9484 **** 3189910958b ./libstdc++-v3/include/c_shadow/wchar.h 887325795b ./libstdc++-v3/include/c_shadow/wctype.h 4087026299b ./libstdc++-v3/include/c_std/bits/cmath.tcc ! 3665828964b ./libstdc++-v3/include/c_std/bits/std_cassert.h ! 3227211091b ./libstdc++-v3/include/c_std/bits/std_cctype.h ! 2490468855b ./libstdc++-v3/include/c_std/bits/std_cerrno.h ! 2453924167b ./libstdc++-v3/include/c_std/bits/std_cfloat.h ! 707487253b ./libstdc++-v3/include/c_std/bits/std_climits.h ! 3024925417b ./libstdc++-v3/include/c_std/bits/std_clocale.h ! 1949845030b ./libstdc++-v3/include/c_std/bits/std_cmath.h ! 2279758959b ./libstdc++-v3/include/c_std/bits/std_csetjmp.h ! 40068601b ./libstdc++-v3/include/c_std/bits/std_csignal.h ! 3760528725b ./libstdc++-v3/include/c_std/bits/std_cstdarg.h ! 3701324730b ./libstdc++-v3/include/c_std/bits/std_cstddef.h ! 2368623423b ./libstdc++-v3/include/c_std/bits/std_cstdio.h ! 3084491793b ./libstdc++-v3/include/c_std/bits/std_cstdlib.h ! 3354582070b ./libstdc++-v3/include/c_std/bits/std_cstring.h ! 2415161529b ./libstdc++-v3/include/c_std/bits/std_ctime.h ! 14436733b ./libstdc++-v3/include/c_std/bits/std_cwchar.h ! 566063818b ./libstdc++-v3/include/c_std/bits/std_cwctype.h 2457699013b ./libstdc++-v3/include/ext/bvector 32562494b ./libstdc++-v3/include/ext/hash_map 1791958016b ./libstdc++-v3/include/ext/hash_set --- 9479,9501 ---- 3189910958b ./libstdc++-v3/include/c_shadow/wchar.h 887325795b ./libstdc++-v3/include/c_shadow/wctype.h 4087026299b ./libstdc++-v3/include/c_std/bits/cmath.tcc ! 4173967768b ./libstdc++-v3/include/c_std/bits/std_cassert.h ! 3755378346b ./libstdc++-v3/include/c_std/bits/std_cctype.h ! 1941333242b ./libstdc++-v3/include/c_std/bits/std_cerrno.h ! 1754745587b ./libstdc++-v3/include/c_std/bits/std_cfloat.h ! 1073898404b ./libstdc++-v3/include/c_std/bits/std_climits.h ! 1419451335b ./libstdc++-v3/include/c_std/bits/std_clocale.h ! 210118b ./libstdc++-v3/include/c_std/bits/std_cmath.h ! 2753276786b ./libstdc++-v3/include/c_std/bits/std_csetjmp.h ! 3019403730b ./libstdc++-v3/include/c_std/bits/std_csignal.h ! 2011156002b ./libstdc++-v3/include/c_std/bits/std_cstdarg.h ! 1885068282b ./libstdc++-v3/include/c_std/bits/std_cstddef.h ! 1711293805b ./libstdc++-v3/include/c_std/bits/std_cstdio.h ! 459786272b ./libstdc++-v3/include/c_std/bits/std_cstdlib.h ! 3134790463b ./libstdc++-v3/include/c_std/bits/std_cstring.h ! 2488914866b ./libstdc++-v3/include/c_std/bits/std_ctime.h ! 2924979082b ./libstdc++-v3/include/c_std/bits/std_cwchar.h ! 1623200046b ./libstdc++-v3/include/c_std/bits/std_cwctype.h 2457699013b ./libstdc++-v3/include/ext/bvector 32562494b ./libstdc++-v3/include/ext/hash_map 1791958016b ./libstdc++-v3/include/ext/hash_set *************** *** 9537,9543 **** 2645437597b ./libstdc++-v3/include/std/utility 2280752861b ./libstdc++-v3/include/std/valarray 392237057b ./libstdc++-v3/include/std/vector ! 3071558991b ./libstdc++-v3/libio/ChangeLog 226381804b ./libstdc++-v3/libio/Makefile.am 1424658516b ./libstdc++-v3/libio/Makefile.in 314955067b ./libstdc++-v3/libio/_G_config.h --- 9554,9560 ---- 2645437597b ./libstdc++-v3/include/std/utility 2280752861b ./libstdc++-v3/include/std/valarray 392237057b ./libstdc++-v3/include/std/vector ! 131300061b ./libstdc++-v3/libio/ChangeLog 226381804b ./libstdc++-v3/libio/Makefile.am 1424658516b ./libstdc++-v3/libio/Makefile.in 314955067b ./libstdc++-v3/libio/_G_config.h *************** *** 9600,9607 **** 805804711b ./libstdc++-v3/mkinclosure 1536428020b ./libstdc++-v3/mknumeric_limits 2605795304b ./libstdc++-v3/porting.texi ! 2780687464b ./libstdc++-v3/src/Makefile.am ! 4194825822b ./libstdc++-v3/src/Makefile.in 1651858599b ./libstdc++-v3/src/bitset.cc 3659270218b ./libstdc++-v3/src/cmath.cc 3763564632b ./libstdc++-v3/src/codecvt.cc --- 9617,9624 ---- 805804711b ./libstdc++-v3/mkinclosure 1536428020b ./libstdc++-v3/mknumeric_limits 2605795304b ./libstdc++-v3/porting.texi ! 4153290084b ./libstdc++-v3/src/Makefile.am ! 3310504969b ./libstdc++-v3/src/Makefile.in 1651858599b ./libstdc++-v3/src/bitset.cc 3659270218b ./libstdc++-v3/src/cmath.cc 3763564632b ./libstdc++-v3/src/codecvt.cc *************** *** 9624,9630 **** 1651008667b ./libstdc++-v3/src/wstring-inst.cc 3407177850b ./libstdc++-v3/testsuite/17_intro/header_cassert.cc 718483329b ./libstdc++-v3/testsuite/17_intro/header_cerrno.cc ! 1494020948b ./libstdc++-v3/testsuite/17_intro/header_ciso646.cc 2740614555b ./libstdc++-v3/testsuite/17_intro/header_csetjmp.cc 4187004662b ./libstdc++-v3/testsuite/17_intro/header_cstdarg.cc 1187341165b ./libstdc++-v3/testsuite/17_intro/header_cstddef.cc --- 9641,9647 ---- 1651008667b ./libstdc++-v3/src/wstring-inst.cc 3407177850b ./libstdc++-v3/testsuite/17_intro/header_cassert.cc 718483329b ./libstdc++-v3/testsuite/17_intro/header_cerrno.cc ! 292833921b ./libstdc++-v3/testsuite/17_intro/header_ciso646.cc 2740614555b ./libstdc++-v3/testsuite/17_intro/header_csetjmp.cc 4187004662b ./libstdc++-v3/testsuite/17_intro/header_cstdarg.cc 1187341165b ./libstdc++-v3/testsuite/17_intro/header_cstddef.cc *************** *** 9632,9711 **** 2612537129b ./libstdc++-v3/testsuite/17_intro/header_cstdlib.cc 4184074218b ./libstdc++-v3/testsuite/17_intro/header_cstring.cc 446409895b ./libstdc++-v3/testsuite/17_intro/header_ctime.cc ! 3925991762b ./libstdc++-v3/testsuite/17_intro/header_cwchar.cc ! 488260507b ./libstdc++-v3/testsuite/17_intro/header_cwctype.cc ! 4080582439b ./libstdc++-v3/testsuite/17_intro/header_fstream.cc ! 2554052199b ./libstdc++-v3/testsuite/17_intro/header_iomanip.cc ! 1960478372b ./libstdc++-v3/testsuite/17_intro/header_ios.cc ! 1010657727b ./libstdc++-v3/testsuite/17_intro/header_iosfwd.cc ! 2496163297b ./libstdc++-v3/testsuite/17_intro/header_iostream.cc ! 341374387b ./libstdc++-v3/testsuite/17_intro/header_istream.cc ! 3410503300b ./libstdc++-v3/testsuite/17_intro/header_ostream.cc ! 2483682048b ./libstdc++-v3/testsuite/17_intro/header_sstream.cc ! 3141274919b ./libstdc++-v3/testsuite/17_intro/header_streambuf.cc 3461116413b ./libstdc++-v3/testsuite/17_intro/headers.cc 2076357409b ./libstdc++-v3/testsuite/17_intro/headers_c++.cc 3404318748b ./libstdc++-v3/testsuite/17_intro/headers_c.cc ! 174189524b ./libstdc++-v3/testsuite/18_support/numeric_limits.cc ! 3698335203b ./libstdc++-v3/testsuite/19_diagnostics/stdexceptions.cc ! 4089433858b ./libstdc++-v3/testsuite/20_util/auto_ptr.cc 4006660250b ./libstdc++-v3/testsuite/20_util/binders.cc ! 1649010988b ./libstdc++-v3/testsuite/21_strings/append.cc ! 856843894b ./libstdc++-v3/testsuite/21_strings/c_strings.cc ! 2618321153b ./libstdc++-v3/testsuite/21_strings/capacity.cc ! 3985370954b ./libstdc++-v3/testsuite/21_strings/char_traits_requirements.cc 4052621376b ./libstdc++-v3/testsuite/21_strings/char_traits_typedefs.cc ! 1265470747b ./libstdc++-v3/testsuite/21_strings/compare.cc ! 1778105169b ./libstdc++-v3/testsuite/21_strings/ctor_copy_dtor.cc ! 4139768422b ./libstdc++-v3/testsuite/21_strings/element_access.cc ! 493313566b ./libstdc++-v3/testsuite/21_strings/find.cc ! 4256816922b ./libstdc++-v3/testsuite/21_strings/insert.cc ! 1875980485b ./libstdc++-v3/testsuite/21_strings/inserters_extractors.cc ! 2582308111b ./libstdc++-v3/testsuite/21_strings/invariants.cc ! 929671461b ./libstdc++-v3/testsuite/21_strings/nonmember.cc ! 627597130b ./libstdc++-v3/testsuite/21_strings/operations.cc ! 169993642b ./libstdc++-v3/testsuite/21_strings/replace.cc ! 1080039855b ./libstdc++-v3/testsuite/21_strings/rfind.cc ! 1797640342b ./libstdc++-v3/testsuite/21_strings/substr.cc ! 43726910b ./libstdc++-v3/testsuite/22_locale/codecvt_char_char.cc ! 2600889589b ./libstdc++-v3/testsuite/22_locale/codecvt_unicode_char.cc ! 3094386971b ./libstdc++-v3/testsuite/22_locale/codecvt_unicode_wchar_t.cc ! 1624488211b ./libstdc++-v3/testsuite/22_locale/codecvt_wchar_t_char.cc ! 3494053967b ./libstdc++-v3/testsuite/22_locale/ctor_copy_dtor.cc 758113484b ./libstdc++-v3/testsuite/22_locale/ctype.cc ! 1655107037b ./libstdc++-v3/testsuite/22_locale/ctype_char_members.cc ! 186356523b ./libstdc++-v3/testsuite/22_locale/ctype_wchar_t_members.cc ! 3393527147b ./libstdc++-v3/testsuite/22_locale/facet.cc ! 4234494707b ./libstdc++-v3/testsuite/22_locale/global_templates.cc ! 1677219878b ./libstdc++-v3/testsuite/22_locale/members.cc 1852213058b ./libstdc++-v3/testsuite/22_locale/numpunct.cc ! 3412735271b ./libstdc++-v3/testsuite/22_locale/numpunct_byname.cc ! 2331480220b ./libstdc++-v3/testsuite/22_locale/numpunct_char_members.cc ! 3239751499b ./libstdc++-v3/testsuite/22_locale/operators.cc ! 3184344053b ./libstdc++-v3/testsuite/22_locale/static_members.cc ! 3678235856b ./libstdc++-v3/testsuite/23_containers/bitset_ctor.cc ! 4155129398b ./libstdc++-v3/testsuite/23_containers/bitset_members.cc ! 4226460375b ./libstdc++-v3/testsuite/23_containers/bitset_shift.cc 3178774718b ./libstdc++-v3/testsuite/23_containers/map_operators.cc 2332883344b ./libstdc++-v3/testsuite/23_containers/multiset.cc 584738240b ./libstdc++-v3/testsuite/23_containers/set_operators.cc ! 37688836b ./libstdc++-v3/testsuite/23_containers/vector_capacity.cc ! 1370781403b ./libstdc++-v3/testsuite/23_containers/vector_ctor.cc ! 2800496824b ./libstdc++-v3/testsuite/23_containers/vector_element_access.cc ! 417244904b ./libstdc++-v3/testsuite/23_containers/vector_modifiers.cc ! 2724503168b ./libstdc++-v3/testsuite/24_iterators/istreambuf_iterator.cc ! 3216307062b ./libstdc++-v3/testsuite/24_iterators/iterator.cc ! 3511007617b ./libstdc++-v3/testsuite/24_iterators/ostreambuf_iterator.cc 499887025b ./libstdc++-v3/testsuite/25_algorithms/equal.cc ! 631583587b ./libstdc++-v3/testsuite/25_algorithms/lower_bound.cc ! 3705954478b ./libstdc++-v3/testsuite/25_algorithms/min_max.cc 825452073b ./libstdc++-v3/testsuite/26_numerics/binary_closure.cc 4174117585b ./libstdc++-v3/testsuite/26_numerics/buggy_complex.cc 477083436b ./libstdc++-v3/testsuite/26_numerics/c99_classification_macros_c++.cc 1943684863b ./libstdc++-v3/testsuite/26_numerics/c99_classification_macros_c.cc ! 2781349120b ./libstdc++-v3/testsuite/26_numerics/c_math.cc ! 4101645345b ./libstdc++-v3/testsuite/26_numerics/complex_inserters_extractors.cc ! 2942362871b ./libstdc++-v3/testsuite/26_numerics/complex_value.cc 2560606731b ./libstdc++-v3/testsuite/26_numerics/fabs_inline.cc 2203801309b ./libstdc++-v3/testsuite/26_numerics/valarray.cc 2289035929b ./libstdc++-v3/testsuite/26_numerics/valarray_const_bracket.cc --- 9649,9729 ---- 2612537129b ./libstdc++-v3/testsuite/17_intro/header_cstdlib.cc 4184074218b ./libstdc++-v3/testsuite/17_intro/header_cstring.cc 446409895b ./libstdc++-v3/testsuite/17_intro/header_ctime.cc ! 545735980b ./libstdc++-v3/testsuite/17_intro/header_cwchar.cc ! 234720762b ./libstdc++-v3/testsuite/17_intro/header_cwctype.cc ! 4050243083b ./libstdc++-v3/testsuite/17_intro/header_fstream.cc ! 31531867b ./libstdc++-v3/testsuite/17_intro/header_iomanip.cc ! 1385850299b ./libstdc++-v3/testsuite/17_intro/header_ios.cc ! 2774643098b ./libstdc++-v3/testsuite/17_intro/header_iosfwd.cc ! 1794666783b ./libstdc++-v3/testsuite/17_intro/header_iostream.cc ! 1280776215b ./libstdc++-v3/testsuite/17_intro/header_istream.cc ! 3671158117b ./libstdc++-v3/testsuite/17_intro/header_ostream.cc ! 161485874b ./libstdc++-v3/testsuite/17_intro/header_sstream.cc ! 553109088b ./libstdc++-v3/testsuite/17_intro/header_streambuf.cc 3461116413b ./libstdc++-v3/testsuite/17_intro/headers.cc 2076357409b ./libstdc++-v3/testsuite/17_intro/headers_c++.cc 3404318748b ./libstdc++-v3/testsuite/17_intro/headers_c.cc ! 1297373821b ./libstdc++-v3/testsuite/18_support/numeric_limits.cc ! 410938608b ./libstdc++-v3/testsuite/19_diagnostics/stdexceptions.cc ! 3136764659b ./libstdc++-v3/testsuite/20_util/auto_ptr.cc 4006660250b ./libstdc++-v3/testsuite/20_util/binders.cc ! 2620430532b ./libstdc++-v3/testsuite/21_strings/append.cc ! 1828225934b ./libstdc++-v3/testsuite/21_strings/c_strings.cc ! 1157819296b ./libstdc++-v3/testsuite/21_strings/capacity.cc ! 2635888646b ./libstdc++-v3/testsuite/21_strings/char_traits_requirements.cc 4052621376b ./libstdc++-v3/testsuite/21_strings/char_traits_typedefs.cc ! 2800726480b ./libstdc++-v3/testsuite/21_strings/compare.cc ! 2548295922b ./libstdc++-v3/testsuite/21_strings/ctor_copy_dtor.cc ! 2661084265b ./libstdc++-v3/testsuite/21_strings/element_access.cc ! 2204151867b ./libstdc++-v3/testsuite/21_strings/find.cc ! 101500475b ./libstdc++-v3/testsuite/21_strings/insert.cc ! 2657132462b ./libstdc++-v3/testsuite/21_strings/inserters_extractors.cc ! 2168000074b ./libstdc++-v3/testsuite/21_strings/invariants.cc ! 1895351902b ./libstdc++-v3/testsuite/21_strings/nonmember.cc ! 1709617082b ./libstdc++-v3/testsuite/21_strings/operations.cc ! 1201188626b ./libstdc++-v3/testsuite/21_strings/replace.cc ! 2718476092b ./libstdc++-v3/testsuite/21_strings/rfind.cc ! 1483165749b ./libstdc++-v3/testsuite/21_strings/substr.cc ! 3866937567b ./libstdc++-v3/testsuite/22_locale/codecvt_char_char.cc ! 636244027b ./libstdc++-v3/testsuite/22_locale/codecvt_unicode_char.cc ! 511768235b ./libstdc++-v3/testsuite/22_locale/codecvt_unicode_wchar_t.cc ! 1812800874b ./libstdc++-v3/testsuite/22_locale/codecvt_wchar_t_char.cc ! 1033440651b ./libstdc++-v3/testsuite/22_locale/ctor_copy_dtor.cc 758113484b ./libstdc++-v3/testsuite/22_locale/ctype.cc ! 985554485b ./libstdc++-v3/testsuite/22_locale/ctype_char_members.cc ! 3584040307b ./libstdc++-v3/testsuite/22_locale/ctype_wchar_t_members.cc ! 2573412066b ./libstdc++-v3/testsuite/22_locale/facet.cc ! 3496730433b ./libstdc++-v3/testsuite/22_locale/global_templates.cc ! 3243201175b ./libstdc++-v3/testsuite/22_locale/members.cc 1852213058b ./libstdc++-v3/testsuite/22_locale/numpunct.cc ! 3463227673b ./libstdc++-v3/testsuite/22_locale/numpunct_byname.cc ! 4085763304b ./libstdc++-v3/testsuite/22_locale/numpunct_char_members.cc ! 1710593315b ./libstdc++-v3/testsuite/22_locale/operators.cc ! 2943563602b ./libstdc++-v3/testsuite/22_locale/static_members.cc ! 3600430355b ./libstdc++-v3/testsuite/23_containers/bitset_ctor.cc ! 475577229b ./libstdc++-v3/testsuite/23_containers/bitset_members.cc ! 897013241b ./libstdc++-v3/testsuite/23_containers/bitset_shift.cc ! 307316045b ./libstdc++-v3/testsuite/23_containers/map_insert.cc 3178774718b ./libstdc++-v3/testsuite/23_containers/map_operators.cc 2332883344b ./libstdc++-v3/testsuite/23_containers/multiset.cc 584738240b ./libstdc++-v3/testsuite/23_containers/set_operators.cc ! 2845787844b ./libstdc++-v3/testsuite/23_containers/vector_capacity.cc ! 2680681229b ./libstdc++-v3/testsuite/23_containers/vector_ctor.cc ! 3683155594b ./libstdc++-v3/testsuite/23_containers/vector_element_access.cc ! 3019110519b ./libstdc++-v3/testsuite/23_containers/vector_modifiers.cc ! 986439371b ./libstdc++-v3/testsuite/24_iterators/istreambuf_iterator.cc ! 1805154351b ./libstdc++-v3/testsuite/24_iterators/iterator.cc ! 1097193416b ./libstdc++-v3/testsuite/24_iterators/ostreambuf_iterator.cc 499887025b ./libstdc++-v3/testsuite/25_algorithms/equal.cc ! 3229510528b ./libstdc++-v3/testsuite/25_algorithms/lower_bound.cc ! 4253988362b ./libstdc++-v3/testsuite/25_algorithms/min_max.cc 825452073b ./libstdc++-v3/testsuite/26_numerics/binary_closure.cc 4174117585b ./libstdc++-v3/testsuite/26_numerics/buggy_complex.cc 477083436b ./libstdc++-v3/testsuite/26_numerics/c99_classification_macros_c++.cc 1943684863b ./libstdc++-v3/testsuite/26_numerics/c99_classification_macros_c.cc ! 162388279b ./libstdc++-v3/testsuite/26_numerics/c_math.cc ! 1078048999b ./libstdc++-v3/testsuite/26_numerics/complex_inserters_extractors.cc ! 4028172023b ./libstdc++-v3/testsuite/26_numerics/complex_value.cc 2560606731b ./libstdc++-v3/testsuite/26_numerics/fabs_inline.cc 2203801309b ./libstdc++-v3/testsuite/26_numerics/valarray.cc 2289035929b ./libstdc++-v3/testsuite/26_numerics/valarray_const_bracket.cc *************** *** 9713,9786 **** 4204648704b ./libstdc++-v3/testsuite/27_io/filebuf-1.txt 655821823b ./libstdc++-v3/testsuite/27_io/filebuf-2.tst 1896106013b ./libstdc++-v3/testsuite/27_io/filebuf-3.tst ! 1237897308b ./libstdc++-v3/testsuite/27_io/filebuf.cc 4294967295b ./libstdc++-v3/testsuite/27_io/filebuf_members-1.tst 4294967295b ./libstdc++-v3/testsuite/27_io/filebuf_members-1.txt ! 3155275885b ./libstdc++-v3/testsuite/27_io/filebuf_members.cc ! 101401905b ./libstdc++-v3/testsuite/27_io/filebuf_virtuals.cc ! 2045761453b ./libstdc++-v3/testsuite/27_io/fpos.cc ! 2710193704b ./libstdc++-v3/testsuite/27_io/fstream_members.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ifstream_members-1.tst 4294967295b ./libstdc++-v3/testsuite/27_io/ifstream_members-1.txt ! 4049414931b ./libstdc++-v3/testsuite/27_io/ifstream_members.cc ! 3127816602b ./libstdc++-v3/testsuite/27_io/ios_base_callbacks.cc 3079502096b ./libstdc++-v3/testsuite/27_io/ios_base_members_static-1.tst ! 220992270b ./libstdc++-v3/testsuite/27_io/ios_base_members_static.cc ! 3625283711b ./libstdc++-v3/testsuite/27_io/ios_base_storage.cc ! 2090651728b ./libstdc++-v3/testsuite/27_io/ios_ctor.cc ! 2561207466b ./libstdc++-v3/testsuite/27_io/ios_init.cc ! 3219580649b ./libstdc++-v3/testsuite/27_io/ios_manip_basefield.cc ! 992448185b ./libstdc++-v3/testsuite/27_io/ios_manip_fmtflags.cc ! 1757256025b ./libstdc++-v3/testsuite/27_io/ios_members.cc 1023084641b ./libstdc++-v3/testsuite/27_io/istream.cc ! 3557806191b ./libstdc++-v3/testsuite/27_io/istream_extractor_arith.cc ! 2209659551b ./libstdc++-v3/testsuite/27_io/istream_extractor_char.cc 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-1.tst 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-1.txt 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-2.tst ! 3295497445b ./libstdc++-v3/testsuite/27_io/istream_extractor_other.cc ! 1835259045b ./libstdc++-v3/testsuite/27_io/istream_manip.cc 3951789237b ./libstdc++-v3/testsuite/27_io/istream_seeks-1.tst 3951789237b ./libstdc++-v3/testsuite/27_io/istream_seeks-1.txt 4294967295b ./libstdc++-v3/testsuite/27_io/istream_seeks-2.tst 2129191219b ./libstdc++-v3/testsuite/27_io/istream_seeks-3.tst ! 1245555215b ./libstdc++-v3/testsuite/27_io/istream_seeks.cc ! 1054070115b ./libstdc++-v3/testsuite/27_io/istream_sentry.cc 38986799b ./libstdc++-v3/testsuite/27_io/istream_unformatted-1.tst 38986799b ./libstdc++-v3/testsuite/27_io/istream_unformatted-1.txt ! 2426526705b ./libstdc++-v3/testsuite/27_io/istream_unformatted.cc ! 262790270b ./libstdc++-v3/testsuite/27_io/istringstream_members.cc ! 868556528b ./libstdc++-v3/testsuite/27_io/narrow_stream_objects.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ofstream_members-1.tst ! 3320775849b ./libstdc++-v3/testsuite/27_io/ofstream_members.cc 1339570826b ./libstdc++-v3/testsuite/27_io/ostream.cc ! 2273977138b ./libstdc++-v3/testsuite/27_io/ostream_inserter_arith.cc 1556078817b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char-1.tst 1556078817b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char-1.txt ! 693260838b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char.cc 4204648704b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other-1.tst 4204648704b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other-2.tst ! 326322335b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other.cc ! 1733584562b ./libstdc++-v3/testsuite/27_io/ostream_manip.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ostream_seeks-1.tst ! 3842422666b ./libstdc++-v3/testsuite/27_io/ostream_seeks.cc ! 1110785128b ./libstdc++-v3/testsuite/27_io/ostream_unformatted.cc ! 679364921b ./libstdc++-v3/testsuite/27_io/ostringstream_members.cc ! 4277495279b ./libstdc++-v3/testsuite/27_io/streambuf.cc ! 1462425224b ./libstdc++-v3/testsuite/27_io/stringbuf.cc ! 2183091853b ./libstdc++-v3/testsuite/27_io/stringbuf_virtuals.cc ! 1703881739b ./libstdc++-v3/testsuite/27_io/stringstream.cc ! 3596528495b ./libstdc++-v3/testsuite/27_io/stringstream_members.cc ! 3615124904b ./libstdc++-v3/testsuite/27_io/wide_stream_objects.cc 2294107082b ./libstdc++-v3/testsuite/Makefile.am 3640355275b ./libstdc++-v3/testsuite/Makefile.in 2848669759b ./libstdc++-v3/testsuite/README 872857903b ./libstdc++-v3/testsuite/config/default.exp - 3288938735b ./libstdc++-v3/testsuite/debug_assert.h 857963154b ./libstdc++-v3/testsuite/ext/headers.cc ! 1821447959b ./libstdc++-v3/testsuite/lib/libstdc++-v3-dg.exp 2361428628b ./libstdc++-v3/testsuite/libstdc++-v3.dg/dg.exp 1352817621b ./libstdc++-v3/testsuite/printnow.c 1283007056b ./libstdc++-v3/testsuite_flags.in 4084702431b ./libtool.m4 2081401147b ./ltcf-c.sh --- 9731,9804 ---- 4204648704b ./libstdc++-v3/testsuite/27_io/filebuf-1.txt 655821823b ./libstdc++-v3/testsuite/27_io/filebuf-2.tst 1896106013b ./libstdc++-v3/testsuite/27_io/filebuf-3.tst ! 3402256454b ./libstdc++-v3/testsuite/27_io/filebuf.cc 4294967295b ./libstdc++-v3/testsuite/27_io/filebuf_members-1.tst 4294967295b ./libstdc++-v3/testsuite/27_io/filebuf_members-1.txt ! 530760041b ./libstdc++-v3/testsuite/27_io/filebuf_members.cc ! 1696922807b ./libstdc++-v3/testsuite/27_io/filebuf_virtuals.cc ! 1987901042b ./libstdc++-v3/testsuite/27_io/fpos.cc ! 358840366b ./libstdc++-v3/testsuite/27_io/fstream_members.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ifstream_members-1.tst 4294967295b ./libstdc++-v3/testsuite/27_io/ifstream_members-1.txt ! 2885752721b ./libstdc++-v3/testsuite/27_io/ifstream_members.cc ! 921559118b ./libstdc++-v3/testsuite/27_io/ios_base_callbacks.cc 3079502096b ./libstdc++-v3/testsuite/27_io/ios_base_members_static-1.tst ! 2904656871b ./libstdc++-v3/testsuite/27_io/ios_base_members_static.cc ! 3946940640b ./libstdc++-v3/testsuite/27_io/ios_base_storage.cc ! 3028704293b ./libstdc++-v3/testsuite/27_io/ios_ctor.cc ! 3943208282b ./libstdc++-v3/testsuite/27_io/ios_init.cc ! 126651840b ./libstdc++-v3/testsuite/27_io/ios_manip_basefield.cc ! 1876828962b ./libstdc++-v3/testsuite/27_io/ios_manip_fmtflags.cc ! 402291869b ./libstdc++-v3/testsuite/27_io/ios_members.cc 1023084641b ./libstdc++-v3/testsuite/27_io/istream.cc ! 773035515b ./libstdc++-v3/testsuite/27_io/istream_extractor_arith.cc ! 262004209b ./libstdc++-v3/testsuite/27_io/istream_extractor_char.cc 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-1.tst 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-1.txt 1013375821b ./libstdc++-v3/testsuite/27_io/istream_extractor_other-2.tst ! 906991134b ./libstdc++-v3/testsuite/27_io/istream_extractor_other.cc ! 3525724471b ./libstdc++-v3/testsuite/27_io/istream_manip.cc 3951789237b ./libstdc++-v3/testsuite/27_io/istream_seeks-1.tst 3951789237b ./libstdc++-v3/testsuite/27_io/istream_seeks-1.txt 4294967295b ./libstdc++-v3/testsuite/27_io/istream_seeks-2.tst 2129191219b ./libstdc++-v3/testsuite/27_io/istream_seeks-3.tst ! 2005418869b ./libstdc++-v3/testsuite/27_io/istream_seeks.cc ! 3260211703b ./libstdc++-v3/testsuite/27_io/istream_sentry.cc 38986799b ./libstdc++-v3/testsuite/27_io/istream_unformatted-1.tst 38986799b ./libstdc++-v3/testsuite/27_io/istream_unformatted-1.txt ! 2745209174b ./libstdc++-v3/testsuite/27_io/istream_unformatted.cc ! 2607021483b ./libstdc++-v3/testsuite/27_io/istringstream_members.cc ! 496005118b ./libstdc++-v3/testsuite/27_io/narrow_stream_objects.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ofstream_members-1.tst ! 2333857258b ./libstdc++-v3/testsuite/27_io/ofstream_members.cc 1339570826b ./libstdc++-v3/testsuite/27_io/ostream.cc ! 2788616858b ./libstdc++-v3/testsuite/27_io/ostream_inserter_arith.cc 1556078817b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char-1.tst 1556078817b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char-1.txt ! 812427060b ./libstdc++-v3/testsuite/27_io/ostream_inserter_char.cc 4204648704b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other-1.tst 4204648704b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other-2.tst ! 493805556b ./libstdc++-v3/testsuite/27_io/ostream_inserter_other.cc ! 962776286b ./libstdc++-v3/testsuite/27_io/ostream_manip.cc 4294967295b ./libstdc++-v3/testsuite/27_io/ostream_seeks-1.tst ! 1270935874b ./libstdc++-v3/testsuite/27_io/ostream_seeks.cc ! 4124709644b ./libstdc++-v3/testsuite/27_io/ostream_unformatted.cc ! 3304429615b ./libstdc++-v3/testsuite/27_io/ostringstream_members.cc ! 57182980b ./libstdc++-v3/testsuite/27_io/streambuf.cc ! 3983604379b ./libstdc++-v3/testsuite/27_io/stringbuf.cc ! 256529737b ./libstdc++-v3/testsuite/27_io/stringbuf_virtuals.cc ! 3323753738b ./libstdc++-v3/testsuite/27_io/stringstream.cc ! 1600633309b ./libstdc++-v3/testsuite/27_io/stringstream_members.cc ! 365205754b ./libstdc++-v3/testsuite/27_io/wide_stream_objects.cc 2294107082b ./libstdc++-v3/testsuite/Makefile.am 3640355275b ./libstdc++-v3/testsuite/Makefile.in 2848669759b ./libstdc++-v3/testsuite/README 872857903b ./libstdc++-v3/testsuite/config/default.exp 857963154b ./libstdc++-v3/testsuite/ext/headers.cc ! 1601794371b ./libstdc++-v3/testsuite/lib/libstdc++-v3-dg.exp 2361428628b ./libstdc++-v3/testsuite/libstdc++-v3.dg/dg.exp 1352817621b ./libstdc++-v3/testsuite/printnow.c + 1460178224b ./libstdc++-v3/testsuite/testsuite_hooks.h 1283007056b ./libstdc++-v3/testsuite_flags.in 4084702431b ./libtool.m4 2081401147b ./ltcf-c.sh *************** *** 9794,9800 **** 902556840b ./move-if-change 1077958069b ./symlink-tree 1370970362b ./ylwrap ! 825175620b ./zlib/ChangeLog 2655845150b ./zlib/ChangeLog.gcj 3874989574b ./zlib/FAQ 467711448b ./zlib/INDEX --- 9812,9818 ---- 902556840b ./move-if-change 1077958069b ./symlink-tree 1370970362b ./ylwrap ! 1295615007b ./zlib/ChangeLog 2655845150b ./zlib/ChangeLog.gcj 3874989574b ./zlib/FAQ 467711448b ./zlib/INDEX diff -Nrc3pad gcc-3.0.1/BUGS gcc-3.0.2/BUGS *** gcc-3.0.1/BUGS Sun Aug 19 17:45:09 2001 --- gcc-3.0.2/BUGS Tue Oct 23 10:56:16 2001 *************** *** 2,8 **** GCC Bugs The latest version of this document is always available at ! [1]http://gcc.gnu.org/bugs.html. _________________________________________________________________ Table of Contents --- 2,8 ---- GCC Bugs The latest version of this document is always available at ! [1]http://www.gnu.org/software/gcc/bugs.html. _________________________________________________________________ Table of Contents *************** Table of Contents *** 31,40 **** reporting system. Before you report a bug, please check the [19]list of well-known bugs ! and, if possible in any way, try a current development snapshot or ! [20]CodeSourcery's Online Test Compilation. If you want to report a ! bug with egcs 1.x or versions of GCC before 3.0 we strongly recommend ! upgrading to the current release first. Before reporting that GCC compiles your code incorrectly, please compile it with gcc -Wall and see whether this shows anything wrong --- 31,39 ---- reporting system. Before you report a bug, please check the [19]list of well-known bugs ! and, if possible in any way, try a current development snapshot. If ! you want to report a bug with versions of GCC before 3.0 we strongly ! recommend upgrading to the current release first. Before reporting that GCC compiles your code incorrectly, please compile it with gcc -Wall and see whether this shows anything wrong *************** Summarized bug reporting instructions *** 98,106 **** Where to post it ! Please submit your bug report directly to the [21]GCC GNATS bug database. If this is not possible, please mail all information to ! [22]gcc-bugs@gcc.gnu.org. Detailed bug reporting instructions --- 97,105 ---- Where to post it ! Please submit your bug report directly to the [20]GCC GNATS bug database. If this is not possible, please mail all information to ! [21]gcc-bugs@gcc.gnu.org. Detailed bug reporting instructions *************** Detailed bug reporting instructions *** 146,152 **** The gcc lists have message size limits (200 kbytes) and bug reports over those limits will currently be bounced. If your bug is larger ! than that, please post it using the [23]GCC GNATS bug database. If you fail to supply enough information for a bug report to be reproduced, someone will probably ask you to post additional --- 145,151 ---- The gcc lists have message size limits (200 kbytes) and bug reports over those limits will currently be bounced. If your bug is larger ! than that, please post it using the [22]GCC GNATS bug database. If you fail to supply enough information for a bug report to be reproduced, someone will probably ask you to post additional *************** General *** 184,191 **** The following bugs are very frequently reported. * GCC 2.95.2 does not build on GNU/Linux systems using glibc 2.2, ! such as Red Hat 7.0. A [24]patch is available. This is fixed in ! GCC 2.95.3 and GCC 3.0. * GCC 2.95.2 crashes when compiling mbx.c from the PINE 4.30 or IMAP2000 distribution on Sparc systems running Solaris. _________________________________________________________________ --- 183,189 ---- The following bugs are very frequently reported. * GCC 2.95.2 does not build on GNU/Linux systems using glibc 2.2, ! such as Red Hat 7.0. This is fixed in GCC 2.95.3 and GCC 3.0. * GCC 2.95.2 crashes when compiling mbx.c from the PINE 4.30 or IMAP2000 distribution on Sparc systems running Solaris. _________________________________________________________________ *************** General *** 193,200 **** Fortran Fortran bugs are documented in the G77 manual rather than explicitly ! listed here. Please see [25]"Known Causes of Trouble with GNU Fortran" ! in the [26]G77 manual. _________________________________________________________________ C --- 191,198 ---- Fortran Fortran bugs are documented in the G77 manual rather than explicitly ! listed here. Please see [23]Known Causes of Trouble with GNU Fortran ! in the G77 manual. _________________________________________________________________ C *************** C *** 222,229 **** There is a common misconception that the GCC developers are responsible for GNU libc. These are in fact two entirely ! separate projects. The appropriate place to ask questions ! relating to GNU libc is [27]libc-alpha@sources.redhat.com. Cannot use preprocessor directive in macro arguments. Let me guess... you wrote code that looks something like this: --- 220,227 ---- There is a common misconception that the GCC developers are responsible for GNU libc. These are in fact two entirely ! separate projects; please check the [24]GNU libc web pages for ! details. Cannot use preprocessor directive in macro arguments. Let me guess... you wrote code that looks something like this: *************** C++ *** 301,307 **** reported very often, but not yet fixed. While it is certainly better to fix bugs instead of documenting them, this document might save people the effort of writing a bug report when the bug is already ! well-known. [28]How to report bugs tells you how to report a bug. There are many reasons why reported bugs don't get fixed. It might be difficult to fix, or fixing it might break compatibility. Often, --- 299,305 ---- reported very often, but not yet fixed. While it is certainly better to fix bugs instead of documenting them, this document might save people the effort of writing a bug report when the bug is already ! well-known. [25]How to report bugs tells you how to report a bug. There are many reasons why reported bugs don't get fixed. It might be difficult to fix, or fixing it might break compatibility. Often, *************** C++ *** 320,331 **** Common problems updating from G++ 2.95 to G++ 3.0 G++ 3.0 conforms much closer to the ISO C++ standard (available at ! [29]http://www.ncits.org/cplusplus.htm). We have also implemented some of the core and library defect reports (available at ! [30]http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/cwg_defects.html & ! [31]http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/lwg-defects.html respectively). * The ABI has changed. This means that both class layout and name mangling is different. You must recompile all c++ libraries (if --- 318,329 ---- Common problems updating from G++ 2.95 to G++ 3.0 G++ 3.0 conforms much closer to the ISO C++ standard (available at ! [26]http://www.ncits.org/cplusplus.htm). We have also implemented some of the core and library defect reports (available at ! [27]http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/cwg_defects.html & ! [28]http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/lwg-defects.html respectively). * The ABI has changed. This means that both class layout and name mangling is different. You must recompile all c++ libraries (if *************** C++ *** 421,427 **** the nearest representable number. This is not a bug in the compiler, but an inherent limitation ! of the float and double types. Please study [32]this paper for more information. Missing features --- 419,425 ---- the nearest representable number. This is not a bug in the compiler, but an inherent limitation ! of the float and double types. Please study [29]this paper for more information. Missing features *************** A B::f1(bool b) *** 511,517 **** References ! 1. http://gcc.gnu.org/bugs.html 2. http://gcc.gnu.org/bugs.html#report 3. http://gcc.gnu.org/bugs.html#need 4. http://gcc.gnu.org/bugs.html#dontwant --- 509,515 ---- References ! 1. http://www.gnu.org/software/gcc/bugs.html 2. http://gcc.gnu.org/bugs.html#report 3. http://gcc.gnu.org/bugs.html#need 4. http://gcc.gnu.org/bugs.html#dontwant *************** References *** 530,545 **** 17. http://gcc.gnu.org/bugs.html#-O3 18. http://gcc.gnu.org/gnats.html 19. http://gcc.gnu.org/bugs.html#known ! 20. http://www.codesourcery.com/gcc-compile.shtml ! 21. http://gcc.gnu.org/gnats.html ! 22. mailto:gcc-bugs@gcc.gnu.org ! 23. http://gcc.gnu.org/gnats.html ! 24. http://gcc.gnu.org/install/glibc-2.2.patch ! 25. http://gcc.gnu.org/onlinedocs/g77_bugs.html ! 26. http://gcc.gnu.org/onlinedocs/g77_toc.html ! 27. mailto:libc-alpha@sources.redhat.com ! 28. http://gcc.gnu.org/bugs.html#report ! 29. http://www.ncits.org/cplusplus.htm ! 30. http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/cwg_defects.html ! 31. http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/lwg-defects.html ! 32. http://www.validgh.com/goldberg/paper.ps --- 528,540 ---- 17. http://gcc.gnu.org/bugs.html#-O3 18. http://gcc.gnu.org/gnats.html 19. http://gcc.gnu.org/bugs.html#known ! 20. http://gcc.gnu.org/gnats.html ! 21. mailto:gcc-bugs@gcc.gnu.org ! 22. http://gcc.gnu.org/gnats.html ! 23. http://gcc.gnu.org/onlinedocs/g77_bugs.html ! 24. http://www.gnu.org/software/glibc/ ! 25. http://gcc.gnu.org/bugs.html#report ! 26. http://www.ncits.org/cplusplus.htm ! 27. http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/cwg_defects.html ! 28. http://anubis.dkuug.dk/jtc1/sc22/wg21/docs/lwg-defects.html ! 29. http://www.validlab.com/goldberg/paper.ps diff -Nrc3pad gcc-3.0.1/ChangeLog gcc-3.0.2/ChangeLog *** gcc-3.0.1/ChangeLog Sun Aug 19 14:08:00 2001 --- gcc-3.0.2/ChangeLog Tue Oct 23 10:18:45 2001 *************** *** 1,3 **** --- 1,15 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + + 2001-10-03 Eric Christopher + + * MAINTAINERS: Replace Gavin with myself as MIPS maintainer. + + 2001-10-02 Joseph S. Myers + + * configure: Handle temporary files securely using mkdir. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/FAQ gcc-3.0.2/FAQ *** gcc-3.0.1/FAQ Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/FAQ Tue Oct 23 10:56:17 2001 *************** *** 2,28 **** GCC Frequently Asked Questions The latest version of this document is always available at ! [1]http://gcc.gnu.org/faq.html. This FAQ tries to answer specific questions concerning GCC. For general information regarding C, C++, resp. Fortran please check the ! [2]comp.lang.c FAQ, [3]comp.lang.c++ FAQ, [4]comp.std.c++ FAQ, and the ! [5]Fortran Information page. ! Other GCC-related FAQs: [6]libstdc++-v3, and [7]GCJ. _________________________________________________________________ Questions ! 1. [8]General information ! 1. [9]What is the relationship between GCC and EGCS? ! 2. [10]What is the relationship between GCC and Cygnus / Red ! Hat? ! 3. [11]What is an open development model? ! 4. [12]How do I report a bug? ! 5. [13]How do I get a bug fixed or a feature added? ! 6. [14]How can I get a development environment for GCC without using CVS? 2. [15]Installation 1. [16]Problems building the Fortran compiler 2. [17]How to install multiple versions of GCC --- 2,28 ---- GCC Frequently Asked Questions The latest version of this document is always available at ! [1]http://www.gnu.org/software/gcc/faq.html. This FAQ tries to answer specific questions concerning GCC. For general information regarding C, C++, resp. Fortran please check the ! [2]comp.lang.c FAQ, [3]comp.std.c++ FAQ, and the [4]Fortran ! Information page. ! Other GCC-related FAQs: [5]libstdc++-v3, and [6]GCJ. _________________________________________________________________ Questions ! 1. [7]General information ! 1. [8]What is the relationship between GCC and EGCS? ! 2. [9]What is the relationship between GCC and Cygnus / Red Hat? ! 3. [10]What is an open development model? ! 4. [11]How do I report a bug? ! 5. [12]How do I get a bug fixed or a feature added? ! 6. [13]How can I get a development environment for GCC without using CVS? + 7. [14]Does GCC work on my platform? 2. [15]Installation 1. [16]Problems building the Fortran compiler 2. [17]How to install multiple versions of GCC *************** *** 35,57 **** 1. [24]Unable to run the testsuite 2. [25]How do I pass flags like -fnew-abi to the testsuite? 3. [26]How can I run the test suite with multiple options? ! 4. [27]Older versions of GCC or EGCS ! 1. [28]Why is there no testsuite in GCC 2.95? ! 2. [29]Is there a stringstream / sstream for gcc 2.95.2? ! 5. [30]Miscellaneous ! 1. [31]Virtual memory exhausted ! 2. [32]Friend Templates ! 3. [33]Why do I need autoconf, bison, xgettext, automake, etc? ! 4. [34]Problems debugging GCC code ! 5. [35]Using GCC with GNAT/Ada ! 6. [36]Why can't I build a shared library? ! 7. [37]How to work around too long C++ symbol names? (-fsquangle) ! 8. [38]When building C++, the linker says my constructors, destructors or virtual tables are undefined, but I defined them ! 9. [39]What is libstdc++-v3 and how can I use it with g++? ! 10. [40]Will GCC someday include an incremental linker? _________________________________________________________________ General information --- 35,53 ---- 1. [24]Unable to run the testsuite 2. [25]How do I pass flags like -fnew-abi to the testsuite? 3. [26]How can I run the test suite with multiple options? ! 4. [27]Older versions of GCC ! 1. [28]Is there a stringstream / sstream for GCC 2.95.2? ! 5. [29]Miscellaneous ! 1. [30]Virtual memory exhausted ! 2. [31]Friend Templates ! 3. [32]Why do I need autoconf, bison, xgettext, automake, etc? ! 4. [33]Why can't I build a shared library? ! 5. [34]How to work around too long C++ symbol names? (-fsquangle) ! 6. [35]When building C++, the linker says my constructors, destructors or virtual tables are undefined, but I defined them ! 7. [36]Will GCC someday include an incremental linker? _________________________________________________________________ General information *************** What is the relationship between GCC and *** 73,79 **** development on the gcc2 compiler and appointed the EGCS project as the official GCC maintainers. The net result was a single project which carries forward GCC development under the ultimate control of the ! [41]GCC Steering Committee. _________________________________________________________________ What is the relationship between GCC and Cygnus / Red Hat? --- 69,75 ---- development on the gcc2 compiler and appointed the EGCS project as the official GCC maintainers. The net result was a single project which carries forward GCC development under the ultimate control of the ! [37]GCC Steering Committee. _________________________________________________________________ What is the relationship between GCC and Cygnus / Red Hat? *************** What is the relationship between GCC and *** 84,90 **** While Red Hat does donate hardware, network connections, code and developer time to GCC development, Red Hat does not control GCC. ! Overall control of GCC is in the hands of the [42]GCC Steering Committee which includes people from a variety of different organizations and backgrounds. The purpose of the steering committee is to make decisions in the best interest of GCC and to help ensure --- 80,86 ---- While Red Hat does donate hardware, network connections, code and developer time to GCC development, Red Hat does not control GCC. ! Overall control of GCC is in the hands of the [38]GCC Steering Committee which includes people from a variety of different organizations and backgrounds. The purpose of the steering committee is to make decisions in the best interest of GCC and to help ensure *************** What is the relationship between GCC and *** 96,102 **** What is an open development model? ! We are using a bazaar style [43][1] approach to GCC development: we make snapshots publicly available to anyone who wants to try them; we welcome anyone to join the development mailing list. All of the discussions on the development mailing list are available via the web. --- 92,98 ---- What is an open development model? ! We are using a bazaar style [39][1] approach to GCC development: we make snapshots publicly available to anyone who wants to try them; we welcome anyone to join the development mailing list. All of the discussions on the development mailing list are available via the web. *************** What is an open development model? *** 134,146 **** the past few months. The paper which started all of this introduced two terms: A cathedral development model versus a bazaar development model. The paper is written by Eric S. Raymond, it is ! called ``[44]The Cathedral and the Bazaar''. The paper is a useful starting point for discussions. _________________________________________________________________ How do I report a bug? ! There are complete instructions [45]here. _________________________________________________________________ How do I get a bug fixed or a feature added? --- 130,142 ---- the past few months. The paper which started all of this introduced two terms: A cathedral development model versus a bazaar development model. The paper is written by Eric S. Raymond, it is ! called ``[40]The Cathedral and the Bazaar''. The paper is a useful starting point for discussions. _________________________________________________________________ How do I report a bug? ! There are complete instructions [41]here. _________________________________________________________________ How do I get a bug fixed or a feature added? *************** How do I get a bug fixed or a feature ad *** 155,168 **** * Hire someone to fix it for you. There are various companies and individuals providing support for GCC. This alternative costs money, but is relatively likely to get results. ! * Report the problem to gcc-bugs and hope that someone will be kind ! enough to fix it for you. While this is certainly possible, and ! often happens, there is no guarantee that it will. You should not ! expect the same response from gcc-bugs that you would see from a ! commercial support organization since the people who read ! gcc-bugs, if they choose to help you, will be volunteering their ! time. This alternative will work best if you follow the directions ! on [46]submitting bugreports. * Fix it yourself. This alternative will probably bring results, if you work hard enough, but will probably take a lot of time, and, depending on the quality of your work and the perceived benefits --- 151,165 ---- * Hire someone to fix it for you. There are various companies and individuals providing support for GCC. This alternative costs money, but is relatively likely to get results. ! * [42]Report the problem to the GCC GNATS bug tracking system and ! hope that someone will be kind enough to fix it for you. While ! this is certainly possible, and often happens, there is no ! guarantee that it will. You should not expect the same response ! from this method that you would see from a commercial support ! organization since the people who read GCC bug reports, if they ! choose to help you, will be volunteering their time. This ! alternative will work best if you follow the directions on ! [43]submitting bugreports. * Fix it yourself. This alternative will probably bring results, if you work hard enough, but will probably take a lot of time, and, depending on the quality of your work and the perceived benefits *************** How do I get a bug fixed or a feature ad *** 173,179 **** How can I get a development environment for GCC without using CVS? GCC snapshots are available from the FTP server and its mirrors; see ! the [47]GCC mirror list. _________________________________________________________________ Installation --- 170,186 ---- How can I get a development environment for GCC without using CVS? GCC snapshots are available from the FTP server and its mirrors; see ! the [44]GCC mirror list. ! _________________________________________________________________ ! ! Does GCC work on my platform? ! ! The host/target specific installation notes for GCC include ! information about known problems with installing or using GCC on ! particular platforms. These are included in the sources for a release ! in INSTALL/specific.html, and the [45]latest version is always ! available at the GCC web site. Reports of successful builds for GCC ! versions [46]3.0 and [47]2.95 are also available at the web site. _________________________________________________________________ Installation *************** Problems building the Fortran compiler *** 187,197 **** In particular, instead of using "make" to build GCC, you should use "make bootstrap" if you are building a native compiler or "make cross" if you are building a cross compiler. - - It has also been reported that the Fortran compiler can not be built - on Red Hat 4.X GNU/Linux for the Alpha. Fixing this may require - upgrading binutils or to Red Hat 5.0; we'll provide more information - as it becomes available. _________________________________________________________________ How to install multiple versions of GCC --- 194,199 ---- *************** How can I run the test suite with multip *** 387,404 **** Older versions of GCC and EGCS ! Why is there no testsuite in GCC 2.95? ! ! The GCC testsuite is not included in the GCC 2.95 release due to the ! uncertain copyright status of some tests. ! ! The GCC team has reviewed the entire testsuite to find and remove any ! tests with uncertain copyright status, following guidelines from Prof. ! Eben Moglen. The testsuite is included in GCC 3.0 and subsequent ! releases. Only a few tests needed to be removed from the testsuite. ! _________________________________________________________________ ! ! Is there a stringstream / sstream for gcc 2.95.2? Yes, it's at: [51]http://gcc.gnu.org/ml/libstdc++/2000-q2/msg00700/sstream. --- 389,395 ---- Older versions of GCC and EGCS ! Is there a stringstream / sstream for GCC 2.95.2? Yes, it's at: [51]http://gcc.gnu.org/ml/libstdc++/2000-q2/msg00700/sstream. *************** Why do I need autoconf, bison, xgettext, *** 501,523 **** of packages. _________________________________________________________________ - Problems debugging GCC code - - On some systems GCC will produce dwarf debug records by default; - however the gdb-4.16 release may not be able to read such debug - records. - - You can either use the argument "-gstabs" instead of "-g" or pick up a - copy of gdb-4.17 to work around the problem. - _________________________________________________________________ - - Using GCC with GNAT/Ada - - The GNU Ada front-end is not currently supported by GCC, but work is - in progress to integrate GNU Ada into the GCC CVS repository and - produce new releases based on current versions of GCC. - _________________________________________________________________ - Why can't I build a shared library? When building a shared library you may get an error message from the --- 492,497 ---- *************** tables are undefined, but I defined them *** 585,600 **** declared pure-virtual [class.dtor]/7. _________________________________________________________________ - What is libstdc++-v3 and how can I use it with g++? - - From the [54]libstdc++-v3 FAQ: "The GNU Standard C++ Library v3, or - libstdc++-2.9x, is an ongoing project to implement the ISO 14882 - Standard C++ library as described in chapters 17 through 27 and annex - D." - - libstdc++-v3 is enabled by default in 3.x releases of GCC. - _________________________________________________________________ - Will GCC someday include an incremental linker? Incremental linking is part of the linker, not the compiler. As such, --- 559,564 ---- *************** Will GCC someday include an incremental *** 604,623 **** References ! 1. http://gcc.gnu.org/faq.html 2. http://www.eskimo.com/~scs/C-faq/top.html ! 3. http://www.cerfnet.com/~mpcline/On-Line-C++-FAQs/ ! 4. http://reality.sgi.com/austern_mti/std-c++/faq.html ! 5. http://www.fortran.com/fortran/info.html ! 6. http://gcc.gnu.org/onlinedocs/libstdc++/faq/index.html ! 7. http://gcc.gnu.org/java/faq.html ! 8. http://gcc.gnu.org/faq.html#general ! 9. http://gcc.gnu.org/faq.html#gcc ! 10. http://gcc.gnu.org/faq.html#cygnus ! 11. http://gcc.gnu.org/faq.html#open-development ! 12. http://gcc.gnu.org/faq.html#bugreport ! 13. http://gcc.gnu.org/faq.html#support ! 14. http://gcc.gnu.org/faq.html#noncvs 15. http://gcc.gnu.org/faq.html#installation 16. http://gcc.gnu.org/faq.html#fortran 17. http://gcc.gnu.org/faq.html#multiple --- 568,587 ---- References ! 1. http://www.gnu.org/software/gcc/faq.html 2. http://www.eskimo.com/~scs/C-faq/top.html ! 3. http://reality.sgi.com/austern_mti/std-c++/faq.html ! 4. http://www.fortran.com/fortran/info.html ! 5. http://gcc.gnu.org/onlinedocs/libstdc++/faq/index.html ! 6. http://gcc.gnu.org/java/faq.html ! 7. http://gcc.gnu.org/faq.html#general ! 8. http://gcc.gnu.org/faq.html#gcc ! 9. http://gcc.gnu.org/faq.html#cygnus ! 10. http://gcc.gnu.org/faq.html#open-development ! 11. http://gcc.gnu.org/faq.html#bugreport ! 12. http://gcc.gnu.org/faq.html#support ! 13. http://gcc.gnu.org/faq.html#noncvs ! 14. http://gcc.gnu.org/faq.html#platforms 15. http://gcc.gnu.org/faq.html#installation 16. http://gcc.gnu.org/faq.html#fortran 17. http://gcc.gnu.org/faq.html#multiple *************** References *** 631,660 **** 25. http://gcc.gnu.org/faq.html#testoptions 26. http://gcc.gnu.org/faq.html#multipletests 27. http://gcc.gnu.org/faq.html#old ! 28. http://gcc.gnu.org/faq.html#2.95suite ! 29. http://gcc.gnu.org/faq.html#2.95sstream ! 30. http://gcc.gnu.org/faq.html#misc ! 31. http://gcc.gnu.org/faq.html#memexhausted ! 32. http://gcc.gnu.org/faq.html#friend ! 33. http://gcc.gnu.org/faq.html#generated_files ! 34. http://gcc.gnu.org/faq.html#gdb ! 35. http://gcc.gnu.org/faq.html#gnat ! 36. http://gcc.gnu.org/faq.html#picflag-needed ! 37. http://gcc.gnu.org/faq.html#squangle ! 38. http://gcc.gnu.org/faq.html#vtables ! 39. http://gcc.gnu.org/faq.html#libstdc++ ! 40. http://gcc.gnu.org/faq.html#incremental ! 41. http://gcc.gnu.org/steering.html ! 42. http://gcc.gnu.org/steering.html ! 43. http://gcc.gnu.org/faq.html#cathedral-vs-bazaar ! 44. http://www.tuxedo.org/~esr/writings/cathedral-bazaar/ ! 45. http://gcc.gnu.org/bugs.html ! 46. http://gcc.gnu.org/bugs.html ! 47. http://gcc.gnu.org/mirrors.html 48. http://gcc.gnu.org/faq.html#gas 49. http://gcc.gnu.org/install/specific.html 50. http://www.gnu.org/software/dejagnu/dejagnu.html 51. http://gcc.gnu.org/ml/libstdc++/2000-q2/msg00700/sstream 52. ftp://ftp.gnu.org/gnu/ 53. ftp://gcc.gnu.org/pub/gcc/infrastructure/ - 54. http://gcc.gnu.org/onlinedocs/libstdc++/faq/index.html --- 595,623 ---- 25. http://gcc.gnu.org/faq.html#testoptions 26. http://gcc.gnu.org/faq.html#multipletests 27. http://gcc.gnu.org/faq.html#old ! 28. http://gcc.gnu.org/faq.html#2.95sstream ! 29. http://gcc.gnu.org/faq.html#misc ! 30. http://gcc.gnu.org/faq.html#memexhausted ! 31. http://gcc.gnu.org/faq.html#friend ! 32. http://gcc.gnu.org/faq.html#generated_files ! 33. http://gcc.gnu.org/faq.html#picflag-needed ! 34. http://gcc.gnu.org/faq.html#squangle ! 35. http://gcc.gnu.org/faq.html#vtables ! 36. http://gcc.gnu.org/faq.html#incremental ! 37. http://gcc.gnu.org/steering.html ! 38. http://gcc.gnu.org/steering.html ! 39. http://gcc.gnu.org/faq.html#cathedral-vs-bazaar ! 40. http://www.tuxedo.org/~esr/writings/cathedral-bazaar/ ! 41. http://gcc.gnu.org/bugs.html ! 42. http://gcc.gnu.org/bugs.html ! 43. http://gcc.gnu.org/bugs.html ! 44. http://gcc.gnu.org/mirrors.html ! 45. http://gcc.gnu.org/install/specific.html ! 46. http://gcc.gnu.org/gcc-3.0/buildstat.html ! 47. http://gcc.gnu.org/gcc-2.95/buildstat.html 48. http://gcc.gnu.org/faq.html#gas 49. http://gcc.gnu.org/install/specific.html 50. http://www.gnu.org/software/dejagnu/dejagnu.html 51. http://gcc.gnu.org/ml/libstdc++/2000-q2/msg00700/sstream 52. ftp://ftp.gnu.org/gnu/ 53. ftp://gcc.gnu.org/pub/gcc/infrastructure/ diff -Nrc3pad gcc-3.0.1/GNATS gcc-3.0.2/GNATS *** gcc-3.0.1/GNATS Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/GNATS Tue Oct 23 10:56:17 2001 *************** *** 64,69 **** --- 64,72 ---- This indicates the GCC subproject which is affected by the problem. Currently, it can be one of + ada + A problem with the Ada compiler, libraries or tools. + bootstrap GCC fails to bootstrap. This should be filed only if a bootstrap failure prevails for an extended period of time diff -Nrc3pad gcc-3.0.1/INSTALL/binaries.html gcc-3.0.2/INSTALL/binaries.html *** gcc-3.0.1/INSTALL/binaries.html Sun Aug 19 17:45:11 2001 --- gcc-3.0.2/INSTALL/binaries.html Tue Oct 23 10:56:17 2001 *************** contact their makers. *** 27,37 ****
  • DOS--DJGPP;
  • HP-UX Porting Center;
  • SCO OpenServer/Unixware; !
  • Solaris (SPARC, Intel)--Sunfreeware;
  • SGI--SGI Freeware; --- 27,42 ----
  • DOS--DJGPP; +
  • HP-UX: + +
  • SCO OpenServer/Unixware; !
  • Solaris 2 (SPARC, Intel)--Sunfreeware;
  • SGI--SGI Freeware; diff -Nrc3pad gcc-3.0.1/INSTALL/build.html gcc-3.0.2/INSTALL/build.html *** gcc-3.0.1/INSTALL/build.html Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/INSTALL/build.html Tue Oct 23 10:56:17 2001 *************** Other broken versions may recompile part *** 20,26 **** installing the compiler.)

    Some commands executed when making the compiler may fail (return a ! non-zero status) and be ignored by make. These failures, which are often due to files that were not found, are expected, and can safely be ignored. --- 20,26 ---- installing the compiler.)

    Some commands executed when making the compiler may fail (return a ! nonzero status) and be ignored by make. These failures, which are often due to files that were not found, are expected, and can safely be ignored. diff -Nrc3pad gcc-3.0.1/INSTALL/configure.html gcc-3.0.2/INSTALL/configure.html *** gcc-3.0.1/INSTALL/configure.html Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/INSTALL/configure.html Tue Oct 23 10:56:17 2001 *************** defaults to /usr/local unle *** 217,223 **** target system triple, such as sparc-sun-solaris2.7, and version denotes the GCC version, such as 3.0.

  • Check operating system specific directories (e.g. /usr/ccs/bin on ! Sun Solaris). Note that these rules do not check for the value of PATH. You may want to use --with-as if no assembler is installed in the --- 217,223 ---- target system triple, such as sparc-sun-solaris2.7, and version denotes the GCC version, such as 3.0.
  • Check operating system specific directories (e.g. /usr/ccs/bin on ! Sun Solaris 2). Note that these rules do not check for the value of PATH. You may want to use --with-as if no assembler is installed in the diff -Nrc3pad gcc-3.0.1/INSTALL/finalinstall.html gcc-3.0.2/INSTALL/finalinstall.html *** gcc-3.0.1/INSTALL/finalinstall.html Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/INSTALL/finalinstall.html Tue Oct 23 10:56:17 2001 *************** that you successfully built and installe *** 31,37 ****

    Include the output from running srcdir/config.guess. (Do not send us the config.guess file itself, just the one-line output from ! running it!) Also specify which version you built.

    We'd also like to know if the host/target specific installation notes --- 31,42 ----

    Include the output from running srcdir/config.guess. (Do not send us the config.guess file itself, just the one-line output from ! running it!) Also specify which version you built. ! If the build was for GNU/Linux, also include the distribution name and version ! (e.g., Red Hat 7.1 or Debian 2.2.3, available from /etc/issue) ! and the version of glibc you used; for RPM-based systems like Red Hat, ! Mandrake, and SuSE type rpm -q glibc to get the glibc version, ! and on systems like Debian and Progeny use dpkg -l libc6.

    We'd also like to know if the host/target specific installation notes diff -Nrc3pad gcc-3.0.1/INSTALL/specific.html gcc-3.0.2/INSTALL/specific.html *** gcc-3.0.1/INSTALL/specific.html Sun Aug 19 17:45:10 2001 --- gcc-3.0.2/INSTALL/specific.html Tue Oct 23 10:56:17 2001 *************** as new information becomes available. *** 54,59 **** --- 54,60 ----

  • i?86-sequent-ptx1* i?86-sequent-ptx2*
  • i?86-*-sysv3*
  • i860-intel-osf* +
  • ia64-*-linux
  • *-lynx-lynxos
  • *-ibm-aix*
  • m32r-*-elf *************** as new information becomes available. *** 98,108 ****
  • romp-*-aos romp-*-mach
  • #s390-*-linux*
  • #s390x-*-linux* !
  • *-*-solaris* !
  • sparc-sun-solaris*
  • sparc-sun-solaris2.7 !
  • *-sun-solaris2.8 !
  • sparc-sun-sunos*
  • sparc-unknown-linux-gnulibc1
  • sparc64-*-*
  • *-*-sysv* --- 99,109 ----
  • romp-*-aos romp-*-mach
  • #s390-*-linux*
  • #s390x-*-linux* !
  • *-*-solaris2* !
  • sparc-sun-solaris2*
  • sparc-sun-solaris2.7 !
  • *-*-solaris2.8 !
  • sparc-sun-sunos4*
  • sparc-unknown-linux-gnulibc1
  • sparc64-*-*
  • *-*-sysv* *************** as new information becomes available. *** 114,120 **** --- 115,121 ---- *************** extern int vsprintf(char *, const char *** 777,783 ****


    !

    *-lynx-lynxos

    LynxOS 2.2 and earlier comes with GCC 1.x already installed as /bin/gcc. You should compile with this instead of /bin/cc. --- 778,809 ----


    !

    ia64-*-linux

    ! !

    IA-64 processor (also known as IPF, or Itanium Processor Family) ! running GNU/Linux. ! !

    The toolchain is not completely finished, so requirements will continue ! to change. ! GCC 3.0.1 and later require glibc 2.2.4. ! GCC 3.0.2 requires binutils from 2001-09-05 or later. ! GCC 3.0.1 requires binutils 2.11.1 or later. ! !

    None of the following versions of GCC has an ABI that is compatible ! with any of the other versions in this list, with the exception that ! Red Hat 2.96 and Trillian 000171 are compatible with each other: ! 3.0.2, 3.0.1, 3.0, Red Hat 2.96, and Trillian 000717. ! This primarily affects C++ programs and programs that create shared libraries. ! Because of these ABI incompatibilities, GCC 3.0.2 is not recommended for ! user programs on GNU/Linux systems built using earlier compiler releases. ! GCC 3.0.2 is recommended for compiling linux, the kernel. ! GCC 3.0.2 is believed to be fully ABI compliant, and hence no more major ! ABI changes are expected. ! !

    !
    ! !

    *-lynx-lynxos

    LynxOS 2.2 and earlier comes with GCC 1.x already installed as /bin/gcc. You should compile with this instead of /bin/cc. *************** installed tools, which produce a.o *** 790,796 ****


    !

    *-ibm-aix*

    AIX Make frequently has problems with GCC makefiles. GNU Make 3.76 or newer is recommended to build on this platform. --- 816,822 ----


    !

    *-ibm-aix*

    AIX Make frequently has problems with GCC makefiles. GNU Make 3.76 or newer is recommended to build on this platform. *************** and function declarations in the origina *** 820,825 **** --- 846,862 ---- not prevent the linker from producing a correct library or runnable executable. +

    GCC's exception handling implementation stores process-specific data in + the shared library which prevents exception handling from working + correctly on AIX in a default installation. To work around this, the + shared objects need to be loaded in the process private segment to + prevent them from being shared and marked read-only. This is + accomplished on AIX by installing the shared libraries + (libgcc_s.a and libstdc++.a) with file permissions + disallowing read-other (chmod a+x,o-r). If the shared libraries + have been used, the shared library segment can be cleaned using the + /usr/sbin/slibclean command. +

    AIX 4.3 utilizes a "large format" archive to support both 32-bit and 64-bit object modules. The routines provided in AIX 4.3.0 and AIX 4.3.1 to parse archive libraries did not handle the new format correctly. *************** linking such as "not a COFF file". The *** 828,853 **** with AIX 4.3.1 should work for a 32-bit environment. The -g option of the archive command may be used to create archives of 32-bit objects using the original "small format". A correct version of the ! routines is shipped with AIX 4.3.2.

    Some versions of the AIX binder (linker) can fail with a relocation overflow severe error when the -bbigtoc option is used to link GCC-produced object files into an executable that overflows the TOC. A fix for APAR IX75823 (OVERFLOW DURING LINK WHEN USING GCC AND -BBIGTOC) is available from IBM Customer Support and from its ! service.boulder.ibm.com website as PTF U455193.

    The AIX 4.3.2.1 linker (bos.rte.bind_cmds Level 4.3.2.1) will dump core with a segmentation fault when invoked by any version of GCC. A fix for APAR IX87327 is available from IBM Customer Support and from its ! service.boulder.ibm.com website as PTF U461879. This fix is incorporated in AIX 4.3.3 and above.

    The initial assembler shipped with AIX 4.3.0 generates incorrect object files. A fix for APAR IX74254 (64BIT DISASSEMBLED OUTPUT FROM COMPILER FAILS TO ASSEMBLE/BIND) is available from IBM Customer Support and from its ! service.boulder.ibm.com website as PTF U453956. This fix is incorporated in AIX 4.3.1 and above.

    AIX provides National Language Support (NLS). Compilers and assemblers --- 865,890 ---- with AIX 4.3.1 should work for a 32-bit environment. The -g option of the archive command may be used to create archives of 32-bit objects using the original "small format". A correct version of the ! routines is shipped with AIX 4.3.2 and above.

    Some versions of the AIX binder (linker) can fail with a relocation overflow severe error when the -bbigtoc option is used to link GCC-produced object files into an executable that overflows the TOC. A fix for APAR IX75823 (OVERFLOW DURING LINK WHEN USING GCC AND -BBIGTOC) is available from IBM Customer Support and from its ! techsupport.services.ibm.com website as PTF U455193.

    The AIX 4.3.2.1 linker (bos.rte.bind_cmds Level 4.3.2.1) will dump core with a segmentation fault when invoked by any version of GCC. A fix for APAR IX87327 is available from IBM Customer Support and from its ! techsupport.services.ibm.com website as PTF U461879. This fix is incorporated in AIX 4.3.3 and above.

    The initial assembler shipped with AIX 4.3.0 generates incorrect object files. A fix for APAR IX74254 (64BIT DISASSEMBLED OUTPUT FROM COMPILER FAILS TO ASSEMBLE/BIND) is available from IBM Customer Support and from its ! techsupport.services.ibm.com website as PTF U453956. This fix is incorporated in AIX 4.3.1 and above.

    AIX provides National Language Support (NLS). Compilers and assemblers *************** environment variable to C o *** 861,873 ****

    By default, GCC for AIX 4.1 and above produces code that can be used on both Power or PowerPC processors. !

    You can specify a default version for the -mcpu=cpu_type ! switch by using the configure option --with-cpu-cpu_type.


    !

    m32r-*-elf

    Mitsubishi M32R processor. This configuration is intended for embedded systems. --- 898,910 ----

    By default, GCC for AIX 4.1 and above produces code that can be used on both Power or PowerPC processors. !

    A default can be specified with the -mcpu=cpu_type ! switch and using the configure option --with-cpu-cpu_type.


    !

    m32r-*-elf

    Mitsubishi M32R processor. This configuration is intended for embedded systems. *************** This configuration is intended for embed *** 875,881 ****


    !

    m68000-hp-bsd

    HP 9000 series 200 running BSD. Note that the C compiler that comes with this system cannot compile GCC; contact law@cygnus.com --- 912,918 ----


    !

    m68000-hp-bsd

    HP 9000 series 200 running BSD. Note that the C compiler that comes with this system cannot compile GCC; contact law@cygnus.com *************** to get binaries of GCC for bootstrapping *** 884,890 ****


    !

    m6811-elf

    Motorola 68HC11 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. --- 921,927 ----


    !

    m6811-elf

    Motorola 68HC11 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. *************** applications. There are no standard Uni *** 892,898 ****


    !

    m6812-elf

    Motorola 68HC12 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. --- 929,935 ----


    !

    m6812-elf

    Motorola 68HC12 family micro controllers. These are used in embedded applications. There are no standard Unix configurations. *************** applications. There are no standard Uni *** 900,906 ****


    !

    m68k-altos

    Altos 3068. You must use the GNU assembler, linker and debugger. Also, you must fix a kernel bug. --- 937,943 ----


    !

    m68k-altos

    Altos 3068. You must use the GNU assembler, linker and debugger. Also, you must fix a kernel bug. *************** Also, you must fix a kernel bug. *** 908,914 ****


    !

    m68k-apple-aux

    Apple Macintosh running A/UX. You may configure GCC to use either the system assembler and --- 945,951 ----


    !

    m68k-apple-aux

    Apple Macintosh running A/UX. You may configure GCC to use either the system assembler and *************** raises some of the arbitrary limits foun *** 926,932 ****


    !

    m68k-att-sysv

    AT&T 3b1, a.k.a. 7300 PC. This version of GCC cannot be compiled with the system C compiler, which is too buggy. --- 963,969 ----


    !

    m68k-att-sysv

    AT&T 3b1, a.k.a. 7300 PC. This version of GCC cannot be compiled with the system C compiler, which is too buggy. *************** bootstrap. Binaries are available from *** 937,943 ****


    !

    m68k-bull-sysv

    Bull DPX/2 series 200 and 300 with BOS-2.00.45 up to BOS-2.01. GCC works either with native assembler or GNU assembler. You can use --- 974,980 ----


    !

    m68k-bull-sysv

    Bull DPX/2 series 200 and 300 with BOS-2.00.45 up to BOS-2.01. GCC works either with native assembler or GNU assembler. You can use *************** assembler or for availability of the DPX *** 950,956 ****


    !

    m68k-crds-unox

    Use configure unos for building on Unos. --- 987,993 ----


    !

    m68k-crds-unox

    Use configure unos for building on Unos. *************** and linking from that library. *** 988,994 ****


    !

    m68k-hp-hpux

    HP 9000 series 300 or 400 running HP-UX. HP-UX version 8.0 has a bug in the assembler that prevents compilation of GCC. This --- 1025,1031 ----


    !

    m68k-hp-hpux

    HP 9000 series 300 or 400 running HP-UX. HP-UX version 8.0 has a bug in the assembler that prevents compilation of GCC. This *************** to look like: *** 1043,1049 ****


    !

    m68k-*-nextstep*

    Current GCC versions probably do not work on version 2 of the NeXT operating system. --- 1080,1086 ----


    !

    m68k-*-nextstep*

    Current GCC versions probably do not work on version 2 of the NeXT operating system. *************** for this sequence to work. *** 1089,1095 ****


    !

    m68k-ncr-*

    On the Tower models 4n0 and 6n0, by default a process is not allowed to have more than one megabyte of memory. GCC cannot compile --- 1126,1132 ----


    !

    m68k-ncr-*

    On the Tower models 4n0 and 6n0, by default a process is not allowed to have more than one megabyte of memory. GCC cannot compile *************** to the configuration file: *** 1104,1110 ****


    !

    m68k-sun

    Sun 3. We do not provide a configuration file to use the Sun FPA by default, because programs that establish signal handlers for floating --- 1141,1147 ----


    !

    m68k-sun

    Sun 3. We do not provide a configuration file to use the Sun FPA by default, because programs that establish signal handlers for floating *************** point traps inherently cannot work with *** 1113,1126 ****


    !

    m68k-sun-sunos4.1.1

    It is reported that you may need the GNU assembler on this platform.


    !

    m88k-*-svr3

    Motorola m88k running the AT&T/Unisoft/Motorola V.3 reference port. These systems tend to use the Green Hills C, revision 1.8.5, as the --- 1150,1163 ----


    !

    m68k-sun-sunos4.1.1

    It is reported that you may need the GNU assembler on this platform.


    !

    m88k-*-svr3

    Motorola m88k running the AT&T/Unisoft/Motorola V.3 reference port. These systems tend to use the Green Hills C, revision 1.8.5, as the *************** if you have one. *** 1137,1143 ****


    !

    m88k-*-dgux

    Motorola m88k running DG/UX. To build 88open BCS native or cross compilers on DG/UX, specify the configuration name as --- 1174,1180 ----


    !

    m88k-*-dgux

    Motorola m88k running DG/UX. To build 88open BCS native or cross compilers on DG/UX, specify the configuration name as *************** configuration based on the current softw *** 1154,1160 ****


    !

    m88k-tektronix-sysv3

    Tektronix XD88 running UTekV 3.2e. Do not turn on optimization while building stage1 if you bootstrap with --- 1191,1197 ----


    !

    m88k-tektronix-sysv3

    Tektronix XD88 running UTekV 3.2e. Do not turn on optimization while building stage1 if you bootstrap with *************** between stages. *** 1167,1173 ****


    !

    mips-*-*

    If you use the 1.31 version of the MIPS assembler (such as was shipped with Ultrix 3.1), you will need to use the -fno-delayed-branch switch --- 1204,1210 ----


    !

    mips-*-*

    If you use the 1.31 version of the MIPS assembler (such as was shipped with Ultrix 3.1), you will need to use the -fno-delayed-branch switch *************** To protect against this, GCC passes -shared or -call_shared switch. !

    mips-mips-bsd

    MIPS machines running the MIPS operating system in BSD mode. It's possible that some old versions of the system lack the functions --- 1237,1243 ---- linker unless you pass an explicit -shared or -call_shared switch. !

    mips-mips-bsd

    MIPS machines running the MIPS operating system in BSD mode. It's possible that some old versions of the system lack the functions *************** compilers, you may need to add -Wf *** 1220,1226 ****


    !

    mips-dec-*

    MIPS-based DECstations can support three different personalities: Ultrix, DEC OSF/1, and OSF/rose. (Alpha-based DECstation products have --- 1257,1263 ----


    !

    mips-dec-*

    MIPS-based DECstations can support three different personalities: Ultrix, DEC OSF/1, and OSF/rose. (Alpha-based DECstation products have *************** compilers, you may need to add -Wf *** 1252,1258 ****


    !

    mips-mips-riscos*

    If you use the MIPS C compiler to bootstrap, it may be necessary to increase its table size for switch statements with the --- 1289,1295 ----


    !

    mips-mips-riscos*

    If you use the MIPS C compiler to bootstrap, it may be necessary to increase its table size for switch statements with the *************** avoiding a linker bug. *** 1292,1298 ****


    !

    mips-sgi-irix4

    In order to compile GCC on an SGI running IRIX 4, the "c.hdr.lib" option must be installed from the CD-ROM supplied from Silicon Graphics. --- 1329,1335 ----


    !

    mips-sgi-irix4

    In order to compile GCC on an SGI running IRIX 4, the "c.hdr.lib" option must be installed from the CD-ROM supplied from Silicon Graphics. *************** ignored. *** 1322,1328 ****


    !

    mips-sgi-irix5

    This configuration has considerable problems, which will be fixed in a future release. --- 1359,1365 ----


    !

    mips-sgi-irix5

    This configuration has considerable problems, which will be fixed in a future release. *************** not have GNU make available *** 1367,1373 ****


    !

    mips-sgi-irix6

    If you are using IRIX cc as your bootstrap compiler, you must ensure that the N32 ABI is in use. To test this, compile a simple C --- 1404,1410 ----


    !

    mips-sgi-irix6

    If you are using IRIX cc as your bootstrap compiler, you must ensure that the N32 ABI is in use. To test this, compile a simple C *************** information about using GCC on IRIX plat *** 1442,1448 ****


    !

    mips-sony-sysv

    Sony MIPS NEWS. This works in NEWSOS 5.0.1, but not in 5.0.2 (which uses ELF instead of COFF). Support for 5.0.2 will probably be provided --- 1479,1485 ----


    !

    mips-sony-sysv

    Sony MIPS NEWS. This works in NEWSOS 5.0.1, but not in 5.0.2 (which uses ELF instead of COFF). Support for 5.0.2 will probably be provided *************** code generated by GCC when shared librar *** 1452,1465 ****


    !

    ns32k-encore

    Encore ns32000 system. Encore systems are supported only under BSD.


    !

    ns32k-*-genix

    National Semiconductor ns32000 system. Genix has bugs in alloca and malloc; you must get the compiled versions of these from GNU --- 1489,1502 ----


    !

    ns32k-encore

    Encore ns32000 system. Encore systems are supported only under BSD.


    !

    ns32k-*-genix

    National Semiconductor ns32000 system. Genix has bugs in alloca and malloc; you must get the compiled versions of these from GNU *************** Emacs. *** 1468,1481 ****


    !

    ns32k-sequent

    Go to the Berkeley universe before compiling.


    !

    ns32k-utek

    UTEK ns32000 system ("merlin"). The C compiler that comes with this system cannot compile GCC; contact tektronix!reed!mason to get --- 1505,1518 ----


    !

    ns32k-sequent

    Go to the Berkeley universe before compiling.


    !

    ns32k-utek

    UTEK ns32000 system ("merlin"). The C compiler that comes with this system cannot compile GCC; contact tektronix!reed!mason to get *************** binaries of GCC for bootstrapping. *** 1484,1490 ****


    !

    powerpc-*-*

    You can specify a default version for the -mcpu=cpu_type switch by using the configure option --with-cpu-cpu_type. --- 1521,1527 ----


    !

    powerpc-*-*

    You can specify a default version for the -mcpu=cpu_type switch by using the configure option --with-cpu-cpu_type. *************** switch by using the configure option


    !

    powerpc-*-elf, powerpc-*-sysv4

    PowerPC system in big endian mode, running System V.4.


    !

    powerpc-*-linux-gnu*

    You will need binutils 2.9.4.0.8 --- 1529,1542 ----


    !

    powerpc-*-elf, powerpc-*-sysv4

    PowerPC system in big endian mode, running System V.4.


    !

    powerpc-*-linux-gnu*

    You will need binutils 2.9.4.0.8 *************** if you initially built it with gcc-2.7.2 *** 1509,1515 ****


    !

    powerpc-*-eabiaix

    Embedded PowerPC system in big endian mode with -mcall-aix selected as the default. --- 1546,1552 ----


    !

    powerpc-*-eabiaix

    Embedded PowerPC system in big endian mode with -mcall-aix selected as the default. *************** the default. *** 1517,1523 ****


    !

    powerpc-*-eabisim

    Embedded PowerPC system in big endian mode for use in running under the PSIM simulator. --- 1554,1560 ----


    !

    powerpc-*-eabisim

    Embedded PowerPC system in big endian mode for use in running under the PSIM simulator. *************** PSIM simulator. *** 1525,1545 ****


    !

    powerpc-*-eabi

    Embedded PowerPC system in big endian mode.


    !

    powerpcle-*-elf, powerpcle-*-sysv4

    PowerPC system in little endian mode, running System V.4.


    !

    powerpcle-*-eabisim

    Embedded PowerPC system in little endian mode for use in running under the PSIM simulator. --- 1562,1582 ----


    !

    powerpc-*-eabi

    Embedded PowerPC system in big endian mode.


    !

    powerpcle-*-elf, powerpcle-*-sysv4

    PowerPC system in little endian mode, running System V.4.


    !

    powerpcle-*-eabisim

    Embedded PowerPC system in little endian mode for use in running under the PSIM simulator. *************** the PSIM simulator. *** 1547,1567 ****


    !

    powerpcle-*-eabi

    Embedded PowerPC system in little endian mode.


    !

    powerpcle-*-winnt, powerpcle-*-pe

    PowerPC system in little endian mode running Windows NT.


    !

    romp-*-aos, romp-*-mach

    The only operating systems supported for the IBM RT PC are AOS and MACH. GCC does not support AIX running on the RT. We recommend you --- 1584,1604 ----


    !

    powerpcle-*-eabi

    Embedded PowerPC system in little endian mode.


    !

    powerpcle-*-winnt, powerpcle-*-pe

    PowerPC system in little endian mode running Windows NT.


    !

    romp-*-aos, romp-*-mach

    The only operating systems supported for the IBM RT PC are AOS and MACH. GCC does not support AIX running on the RT. We recommend you *************** can be safely ignored; the stage 3 compi *** 1574,1618 ****


    !

    s390-*-linux*

    IBM S/390 system running Linux for S/390.


    !

    s390x-*-linux*

    IBM zSeries system (64 bit) running Linux for zSeries.


    !

    *-*-solaris*

    !

    Sun does not ship a C compiler with Solaris. To bootstrap and install GCC you first have to install a pre-built compiler, see our binaries page for details. !

    Solaris' /bin/sh will often fail to configure libstdc++-v3, boehm-gc or libjava. If you encounter this problem, set CONFIG_SHELL to /bin/ksh in your environment and run make bootstrap again. Another possibility that sometimes helps is to remove ! *-*-solaris*/config.cache.

    Solaris 2 comes with a number of optional OS packages. Some of these packages are needed to use GCC fully, namely SUNWarc, SUNWbtool, SUNWesu, SUNWhea, SUNWlibm, SUNWsprot, and SUNWtoo. If you did not install all ! optional packages when installing Solaris, you will need to verify that the packages that GCC needs are installed.

    To check whether an optional package is installed, use the pkginfo command. To add an optional package, use the ! pkgadd command. For further details, see the Solaris documentation. !

    On some versions of Solaris, trying to use the linker and other tools in /usr/ucb to install GCC has been observed to cause trouble. For example, the linker may hang indefinitely. The fix is to remove /usr/ucb from your PATH. --- 1611,1656 ----


    !

    s390-*-linux*

    IBM S/390 system running Linux for S/390.


    !

    s390x-*-linux*

    IBM zSeries system (64 bit) running Linux for zSeries.


    !

    *-*-solaris2*

    !

    Sun does not ship a C compiler with Solaris 2. To bootstrap and install GCC you first have to install a pre-built compiler, see our binaries page for details. !

    The Solaris 2 /bin/sh will often fail to configure ! libstdc++-v3, boehm-gc or libjava. If you encounter this problem, set CONFIG_SHELL to /bin/ksh in your environment and run make bootstrap again. Another possibility that sometimes helps is to remove ! *-*-solaris2*/config.cache.

    Solaris 2 comes with a number of optional OS packages. Some of these packages are needed to use GCC fully, namely SUNWarc, SUNWbtool, SUNWesu, SUNWhea, SUNWlibm, SUNWsprot, and SUNWtoo. If you did not install all ! optional packages when installing Solaris 2, you will need to verify that the packages that GCC needs are installed.

    To check whether an optional package is installed, use the pkginfo command. To add an optional package, use the ! pkgadd command. For further details, see the Solaris 2 documentation. !

    Trying to use the linker and other tools in /usr/ucb to install GCC has been observed to cause trouble. For example, the linker may hang indefinitely. The fix is to remove /usr/ucb from your PATH. *************** For example, the linker may hang indefin *** 1621,1652 **** platform. We recommend the use of GNU binutils 2.11.2 or the vendor tools (Sun as, Sun ld). !

    Unfortunately, C++ shared libraries, including libstdc++, won't work ! properly if assembled with Sun as: the linker will complain about ! relocations in read-only sections, in the definition of virtual ! tables. Also, Sun as fails to process long symbols resulting from ! mangling template-heavy C++ function names.


    !

    sparc-sun-solaris*

    !

    Sun as 4.X is broken in that it cannot cope with long symbol names. A typical error message might look similar to the following:

    /usr/ccs/bin/as: "/var/tmp/ccMsw135.s", line 11041: error: can't compute value of an expression involving an external symbol. !

    This is Sun bug 4237974. This is fixed with patch 108908-02 and has ! been fixed in later (5.x) versions of the assembler.


    !

    sparc-sun-solaris2.7

    !

    Sun patch 107058-01 (1999-01-13) for SPARC Solaris 7 triggers a bug in the dynamic linker. This problem (Sun bug 4210064) affects GCC 2.8 and later, including all EGCS releases. Sun formerly recommended 107058-01 for all Solaris 7 users, but around 1999-09-01 it started to --- 1659,1711 ---- platform. We recommend the use of GNU binutils 2.11.2 or the vendor tools (Sun as, Sun ld). !

    Sun bug 4296832 turns up when compiling X11 headers with GCC 2.95 or ! newer: g++ will complain that types are missing. These headers assume ! that omitting the type means int; this assumption worked for C89 but ! is wrong for C++, and is now wrong for C99 also. ! !

    g++ accepts such (illegal) constructs with the option ! -fpermissive; it ! will assume that any missing type is int (as defined by C89). ! !

    There are patches for Solaris 2.6 (105633-56 or newer for SPARC, ! 106248-42 or newer for Intel), Solaris 7 (108376-21 or newer for SPARC, ! 108377-20 for Intel), and Solaris 8 (108652-24 or newer for SPARC, ! 108653-22 for Intel) that fix this bug.


    !

    sparc-sun-solaris2*

    !

    Sun as 4.x is broken in that it cannot cope with long symbol names. A typical error message might look similar to the following:

    /usr/ccs/bin/as: "/var/tmp/ccMsw135.s", line 11041: error: can't compute value of an expression involving an external symbol. !

    This is Sun bug 4237974. This is fixed with patch 108908-02 for Solaris ! 2.6 and has been fixed in later (5.x) versions of the assembler, ! starting with Solaris 7. ! !

    Starting with Solaris 7, the operating system is capable of executing ! 64-bit SPARC V9 binaries. GCC 3.0 doesn't properly support this yet. ! Although some patches or recipes to enable this support have been posted ! to various newsgroups and mailing lists, we recommend against using ! them, since the compiler may either crash or, worse, silently generate ! bad code. If you really need this capability now, you might try a CVS ! version of GCC 3.1, which will fully support this. If all you want is ! code tuned for the UltraSPARC CPU, you should try the ! -mtune=ultrasparc option instead, which should be safe from ! those bugs and produce code that, unlike full 64-bit code, can still run ! on non-UltraSPARC machines.


    !

    sparc-sun-solaris2.7

    !

    Sun patch 107058-01 (1999-01-13) for Solaris 7/SPARC triggers a bug in the dynamic linker. This problem (Sun bug 4210064) affects GCC 2.8 and later, including all EGCS releases. Sun formerly recommended 107058-01 for all Solaris 7 users, but around 1999-09-01 it started to *************** recommend it only for people who use Sun *** 1657,1663 ****

  • Do not install Sun patch 107058-01 until after Sun releases a complete patch for bug 4210064. This is the simplest course to take, unless you must also use Sun's C compiler. Unfortunately 107058-01 ! is preinstalled on some new Solaris-based hosts, so you may have to back it out.
  • Copy the original, unpatched Solaris 7 --- 1716,1722 ----
  • Do not install Sun patch 107058-01 until after Sun releases a complete patch for bug 4210064. This is the simplest course to take, unless you must also use Sun's C compiler. Unfortunately 107058-01 ! is preinstalled on some new Solaris 7-based hosts, so you may have to back it out.
  • Copy the original, unpatched Solaris 7 *************** run code generated by GCC; it doesn't su *** 1674,1710 **** the hosts that run GCC itself. Second, Sun says that 106950-03 is only a partial fix for bug 4210064, but Sun doesn't know whether the partial fix is adequate for GCC. Revision -08 or later should fix ! the bug, but (as of 1999-10-06) it is still being tested.


    - - -

    *-sun-solaris2.8

    - -

    Sun bug 4296832 turns up when compiling X11 headers with GCC 2.95 or - newer: g++ will complain that types are missing. These headers assume - that omitting the type means int; this assumption worked for C89 but - is wrong for C++, and is now wrong for C99 also. - -

    g++ accepts such (illegal) constructs with the option -fpermissive; it - will assume that any missing type is int (as defined by C89). !

    For Solaris 8, this is fixed by revision 24 or later of patch 108652 ! (for SPARCs) or 108653 (for Intels). !

    Solaris 8's linker fails to link some libjava programs if previously-installed GCC java libraries already exist in the configured prefix. For this reason, libgcj is disabled by default on Solaris 8. ! If you use GNU ld, or if you don't have a previously-installed libgcj in the same prefix, use --enable-libgcj to build and install the Java libraries.


    !

    sparc-sun-sunos*

    A bug in the SunOS 4 linker will cause it to crash when linking -fPIC compiled objects (and will therefore not allow you to build --- 1733,1758 ---- the hosts that run GCC itself. Second, Sun says that 106950-03 is only a partial fix for bug 4210064, but Sun doesn't know whether the partial fix is adequate for GCC. Revision -08 or later should fix ! the bug. The current (as of 2001-09-24) revision is -14, and is included in ! the Solaris 7 Recommended Patch Cluster.


    !

    *-*-solaris2.8

    !

    The Solaris 8 linker fails to link some libjava programs if previously-installed GCC java libraries already exist in the configured prefix. For this reason, libgcj is disabled by default on Solaris 8. ! If you use GNU ld, or if you don't have a previously-installed libgcj in the same prefix, use --enable-libgcj to build and install the Java libraries.


    !

    sparc-sun-sunos4*

    A bug in the SunOS 4 linker will cause it to crash when linking -fPIC compiled objects (and will therefore not allow you to build *************** be due to a bug in sh. You *** 1723,1729 ****


    !

    sparc-unknown-linux-gnulibc1

    It has been reported that you might need binutils 2.8.1.0.23 --- 1771,1777 ----


    !

    sparc-unknown-linux-gnulibc1

    It has been reported that you might need binutils 2.8.1.0.23 *************** for this platform, too. *** 1732,1738 ****


    !

    sparc64-*-*

    GCC version 2.95 is not able to compile code correctly for sparc64 targets. Users of the Linux kernel, at least, --- 1780,1786 ----


    !

    sparc64-*-*

    GCC version 2.95 is not able to compile code correctly for sparc64 targets. Users of the Linux kernel, at least, *************** recognize (via uname -a) th *** 1743,1749 ****


    !

    *-*-sysv*

    On System V release 3, you may get this error message while linking: --- 1791,1797 ----


    !

    *-*-sysv*

    On System V release 3, you may get this error message while linking: *************** is said to work. Smaller values may als *** 1775,1781 ****


    !

    vax-dec-ultrix

    Don't try compiling with VAX C (vcc). It produces incorrect code in some cases (for example, when alloca is used). --- 1823,1829 ----


    !

    vax-dec-ultrix

    Don't try compiling with VAX C (vcc). It produces incorrect code in some cases (for example, when alloca is used). *************** in some cases (for example, when a *** 1783,1789 ****


    !

    we32k-*-*

    These computers are also known as the 3b2, 3b5, 3b20 and other similar names. (However, the 3b1 is actually a 68000.) --- 1831,1837 ----


    !

    we32k-*-*

    These computers are also known as the 3b2, 3b5, 3b20 and other similar names. (However, the 3b1 is actually a 68000.) *************** as the file cc1plus is larg *** 1819,1825 ****


    !

    Microsoft Windows (32 bit)

    A port of GCC 2.95.x is included with the Cygwin environment. --- 1867,1873 ----


    !

    Microsoft Windows (32 bit)

    A port of GCC 2.95.x is included with the Cygwin environment. *************** without modification. *** 1830,1839 ****


    !

    OS/2

    GCC does not currently support OS/2. However, Andrew Zabolotny has been ! working on a generic OS/2 port with pgcc. The current code code can be found at http://www.goof.com/pcg/os2/.

    An older copy of GCC 2.8.1 is included with the EMX tools available at --- 1878,1887 ----


    !

    OS/2

    GCC does not currently support OS/2. However, Andrew Zabolotny has been ! working on a generic OS/2 port with pgcc. The current code can be found at http://www.goof.com/pcg/os2/.

    An older copy of GCC 2.8.1 is included with the EMX tools available at *************** at Older systems

    GCC contains support files for many older (1980s and early 1990s) Unix variants. For the most part, support for these systems --- 1890,1896 ----


    !

    Older systems

    GCC contains support files for many older (1980s and early 1990s) Unix variants. For the most part, support for these systems *************** current GCC) is to be found in the GCC t *** 1885,1891 ****


    !

    all ELF targets (SVR4, Solaris, etc.)

    C++ support is significantly better on ELF targets if you use the GNU linker; duplicate copies of --- 1933,1939 ----


    !

    all ELF targets (SVR4, Solaris 2, etc.)

    C++ support is significantly better on ELF targets if you use the GNU linker; duplicate copies of diff -Nrc3pad gcc-3.0.1/MAINTAINERS gcc-3.0.2/MAINTAINERS *** gcc-3.0.1/MAINTAINERS Fri Aug 10 15:06:30 2001 --- gcc-3.0.2/MAINTAINERS Wed Oct 3 17:46:36 2001 *************** m68k port (?) Jeff Law law@redhat.com *** 37,43 **** m68k-motorola-sysv port Philippe De Muyter phdm@macqel.be rs6000 port Geoff Keating geoffk@redhat.com rs6000 port David Edelsohn dje@watson.ibm.com ! mips port Gavin Romig-Koch gavin@redhat.com ia64 port Jim Wilson wilson@redhat.com i860 port Jason Eckhardt jle@redhat.com i960 port Jim Wilson wilson@redhat.com --- 37,43 ---- m68k-motorola-sysv port Philippe De Muyter phdm@macqel.be rs6000 port Geoff Keating geoffk@redhat.com rs6000 port David Edelsohn dje@watson.ibm.com ! mips port Eric Christopher echristo@redhat.com ia64 port Jim Wilson wilson@redhat.com i860 port Jason Eckhardt jle@redhat.com i960 port Jim Wilson wilson@redhat.com *************** John Wehle john@feith.com *** 177,180 **** Mark Wielaard mark@gcc.gnu.org * Indicates folks we need to get Kerberos/ssh accounts ready so they can write in the source tree - --- 177,179 ---- diff -Nrc3pad gcc-3.0.1/boehm-gc/ChangeLog gcc-3.0.2/boehm-gc/ChangeLog *** gcc-3.0.1/boehm-gc/ChangeLog Sun Aug 19 14:08:01 2001 --- gcc-3.0.2/boehm-gc/ChangeLog Tue Oct 23 10:18:51 2001 *************** *** 1,3 **** --- 1,28 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + + 2001-09-26 Rainer Orth + + * mach_dep.c (GC_push_regs) [I386 && (SVR4 || SCO || SCO_ELF) + && __GNUC__ ]: Call GC_push_one in C to allow for PIC code. + Fixes PR bootstrap/4162. + + 2001-09-26 Rainer Orth + + * solaris_threads.c (MAX_ORIG_STACK_SIZE) [I386]: Provide special + Solaris 2/Intel definition. + (GC_get_orig_stack_size): NL-terminate warning message. + + * configure.in (i?86-*-solaris2.[89]*): Define + SOLARIS25_PROC_VDB_BUG_FIXED. + * gcconfig.h [I386 && SUNOS5]: Use it. + * configure: Regenerate. + + * gcconfig.h [I386 && SUNOS5] (DATASTART): Use _etext. + (DATAEND): Define using _end. + (STACKBOTTOM): Define. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/boehm-gc/configure gcc-3.0.2/boehm-gc/configure *** gcc-3.0.1/boehm-gc/configure Tue Jul 3 15:29:46 2001 --- gcc-3.0.2/boehm-gc/configure Tue Oct 23 10:56:01 2001 *************** program_suffix=NONE *** 57,63 **** program_transform_name=s,x,x, silent= site= - sitefile= srcdir= target=NONE verbose= --- 57,62 ---- *************** Configuration: *** 172,178 **** --help print this message --no-create do not create output files --quiet, --silent do not print \`checking...' messages - --site-file=FILE use FILE as the site file --version print the version of autoconf that created configure Directory and file names: --prefix=PREFIX install architecture-independent files in PREFIX --- 171,176 ---- *************** EOF *** 343,353 **** -site=* | --site=* | --sit=*) site="$ac_optarg" ;; - -site-file | --site-file | --site-fil | --site-fi | --site-f) - ac_prev=sitefile ;; - -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*) - sitefile="$ac_optarg" ;; - -srcdir | --srcdir | --srcdi | --srcd | --src | --sr) ac_prev=srcdir ;; -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*) --- 341,346 ---- *************** fi *** 513,528 **** srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` # Prefer explicitly selected file to automatically selected ones. ! if test -z "$sitefile"; then ! if test -z "$CONFIG_SITE"; then ! if test "x$prefix" != xNONE; then ! CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" ! else ! CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" ! fi fi - else - CONFIG_SITE="$sitefile" fi for ac_site_file in $CONFIG_SITE; do if test -r "$ac_site_file"; then --- 506,517 ---- srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` # Prefer explicitly selected file to automatically selected ones. ! if test -z "$CONFIG_SITE"; then ! if test "x$prefix" != xNONE; then ! CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" ! else ! CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" fi fi for ac_site_file in $CONFIG_SITE; do if test -r "$ac_site_file"; then *************** fi *** 574,580 **** # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 ! echo "configure:578: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 563,569 ---- # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 ! echo "configure:567: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** test -z "$INSTALL_SCRIPT" && INSTALL_SCR *** 627,633 **** test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6 ! echo "configure:631: checking whether build environment is sane" >&5 # Just in case sleep 1 echo timestamp > conftestfile --- 616,622 ---- test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6 ! echo "configure:620: checking whether build environment is sane" >&5 # Just in case sleep 1 echo timestamp > conftestfile *************** test "$program_suffix" != NONE && *** 684,690 **** test "$program_transform_name" = "" && program_transform_name="s,x,x," echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 ! echo "configure:688: checking whether ${MAKE-make} sets \${MAKE}" >&5 set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 673,679 ---- test "$program_transform_name" = "" && program_transform_name="s,x,x," echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 ! echo "configure:677: checking whether ${MAKE-make} sets \${MAKE}" >&5 set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** else *** 717,728 **** fi echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 ! echo "configure:721: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&6 ! echo "configure:710: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else --- 722,728 ---- return __CYGWIN__; ; return 0; } EOF ! if { (eval echo configure:726: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else *************** echo "$ac_t""$ac_cv_cygwin" 1>&6 *** 750,768 **** CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 ! echo "configure:754: checking for mingw32 environment" >&5 if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_mingw32=yes else --- 739,757 ---- CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 ! echo "configure:743: checking for mingw32 environment" >&5 if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_mingw32=yes else *************** else { echo "configure: error: can not r *** 873,879 **** fi echo $ac_n "checking host system type""... $ac_c" 1>&6 ! echo "configure:877: checking host system type" >&5 host_alias=$host case "$host_alias" in --- 862,868 ---- fi echo $ac_n "checking host system type""... $ac_c" 1>&6 ! echo "configure:866: checking host system type" >&5 host_alias=$host case "$host_alias" in *************** host_os=`echo $host | sed 's/^\([^-]*\)- *** 894,900 **** echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 ! echo "configure:898: checking target system type" >&5 target_alias=$target case "$target_alias" in --- 883,889 ---- echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 ! echo "configure:887: checking target system type" >&5 target_alias=$target case "$target_alias" in *************** target_os=`echo $target | sed 's/^\([^-] *** 912,918 **** echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 ! echo "configure:916: checking build system type" >&5 build_alias=$build case "$build_alias" in --- 901,907 ---- echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 ! echo "configure:905: checking build system type" >&5 build_alias=$build case "$build_alias" in *************** fi *** 952,958 **** missing_dir=`cd $ac_aux_dir && pwd` echo $ac_n "checking for working aclocal""... $ac_c" 1>&6 ! echo "configure:956: checking for working aclocal" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. --- 941,947 ---- missing_dir=`cd $ac_aux_dir && pwd` echo $ac_n "checking for working aclocal""... $ac_c" 1>&6 ! echo "configure:945: checking for working aclocal" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. *************** else *** 965,971 **** fi echo $ac_n "checking for working autoconf""... $ac_c" 1>&6 ! echo "configure:969: checking for working autoconf" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. --- 954,960 ---- fi echo $ac_n "checking for working autoconf""... $ac_c" 1>&6 ! echo "configure:958: checking for working autoconf" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. *************** else *** 978,984 **** fi echo $ac_n "checking for working automake""... $ac_c" 1>&6 ! echo "configure:982: checking for working automake" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. --- 967,973 ---- fi echo $ac_n "checking for working automake""... $ac_c" 1>&6 ! echo "configure:971: checking for working automake" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. *************** else *** 991,997 **** fi echo $ac_n "checking for working autoheader""... $ac_c" 1>&6 ! echo "configure:995: checking for working autoheader" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. --- 980,986 ---- fi echo $ac_n "checking for working autoheader""... $ac_c" 1>&6 ! echo "configure:984: checking for working autoheader" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. *************** else *** 1004,1010 **** fi echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6 ! echo "configure:1008: checking for working makeinfo" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. --- 993,999 ---- fi echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6 ! echo "configure:997: checking for working makeinfo" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. *************** fi *** 1030,1036 **** # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1034: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1019,1025 ---- # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1023: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** if test -z "$CC"; then *** 1060,1066 **** # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1064: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1049,1055 ---- # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1053: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 1109,1115 **** fi echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 ! echo "configure:1113: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1098,1104 ---- fi echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 ! echo "configure:1102: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** else *** 1118,1124 **** yes; #endif EOF ! if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1122: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no --- 1107,1113 ---- yes; #endif EOF ! if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1111: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no *************** if test $ac_cv_prog_gcc = yes; then *** 1133,1139 **** ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 ! echo "configure:1137: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1122,1128 ---- ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 ! echo "configure:1126: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** do *** 1170,1176 **** # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1174: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CXX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1159,1165 ---- # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1163: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CXX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** test -n "$CXX" || CXX="gcc" *** 1203,1209 **** test -z "$CXX" && { echo "configure: error: no acceptable c++ found in \$PATH" 1>&2; exit 1; } echo $ac_n "checking whether we are using GNU C++""... $ac_c" 1>&6 ! echo "configure:1207: checking whether we are using GNU C++" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gxx'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1192,1198 ---- test -z "$CXX" && { echo "configure: error: no acceptable c++ found in \$PATH" 1>&2; exit 1; } echo $ac_n "checking whether we are using GNU C++""... $ac_c" 1>&6 ! echo "configure:1196: checking whether we are using GNU C++" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gxx'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** else *** 1212,1218 **** yes; #endif EOF ! if { ac_try='${CXX-g++} -E conftest.C'; { (eval echo configure:1216: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gxx=yes else ac_cv_prog_gxx=no --- 1201,1207 ---- yes; #endif EOF ! if { ac_try='${CXX-g++} -E conftest.C'; { (eval echo configure:1205: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gxx=yes else ac_cv_prog_gxx=no *************** if test $ac_cv_prog_gxx = yes; then *** 1227,1233 **** ac_save_CXXFLAGS="$CXXFLAGS" CXXFLAGS= echo $ac_n "checking whether ${CXX-g++} accepts -g""... $ac_c" 1>&6 ! echo "configure:1231: checking whether ${CXX-g++} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cxx_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1216,1222 ---- ac_save_CXXFLAGS="$CXXFLAGS" CXXFLAGS= echo $ac_n "checking whether ${CXX-g++} accepts -g""... $ac_c" 1>&6 ! echo "configure:1220: checking whether ${CXX-g++} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cxx_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 1260,1266 **** # NEWLIB_CONFIGURE, which doesn't work because that means that it will # be run before AC_CANONICAL_HOST. echo $ac_n "checking build system type""... $ac_c" 1>&6 ! echo "configure:1264: checking build system type" >&5 build_alias=$build case "$build_alias" in --- 1249,1255 ---- # NEWLIB_CONFIGURE, which doesn't work because that means that it will # be run before AC_CANONICAL_HOST. echo $ac_n "checking build system type""... $ac_c" 1>&6 ! echo "configure:1253: checking build system type" >&5 build_alias=$build case "$build_alias" in *************** echo "$ac_t""$build" 1>&6 *** 1281,1287 **** # Extract the first word of "${ac_tool_prefix}as", so it can be a program name with args. set dummy ${ac_tool_prefix}as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1285: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1270,1276 ---- # Extract the first word of "${ac_tool_prefix}as", so it can be a program name with args. set dummy ${ac_tool_prefix}as; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1274: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AS'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 1313,1319 **** # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. set dummy ${ac_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1317: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1302,1308 ---- # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. set dummy ${ac_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1306: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 1345,1351 **** # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1349: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1334,1340 ---- # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1338: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** if test -n "$ac_tool_prefix"; then *** 1377,1383 **** # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1381: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1366,1372 ---- # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:1370: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 1422,1428 **** # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 ! echo "configure:1426: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 1411,1417 ---- # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 ! echo "configure:1415: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** test -z "$INSTALL_DATA" && INSTALL_DATA= *** 1476,1482 **** echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 ! echo "configure:1480: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" --- 1465,1471 ---- echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 ! echo "configure:1469: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" *************** if false; then *** 1510,1516 **** echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 ! echo "configure:1514: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1499,1505 ---- echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 ! echo "configure:1503: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** else *** 1520,1529 **** rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= ! if { (eval echo configure:1524: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in ! *.c | *.o | *.obj | *.ilk | *.pdb) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done --- 1509,1518 ---- rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= ! if { (eval echo configure:1513: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in ! *.c | *.o | *.obj) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done *************** ac_prog=ld *** 1643,1649 **** if test "$GCC" = yes; then # Check if gcc -print-prog-name=ld gives a path. echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6 ! echo "configure:1647: checking for ld used by GCC" >&5 case $host in *-*-mingw*) # gcc leaves a trailing carriage return which upsets mingw --- 1632,1638 ---- if test "$GCC" = yes; then # Check if gcc -print-prog-name=ld gives a path. echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6 ! echo "configure:1636: checking for ld used by GCC" >&5 case $host in *-*-mingw*) # gcc leaves a trailing carriage return which upsets mingw *************** echo "configure:1647: checking for ld us *** 1673,1682 **** esac elif test "$with_gnu_ld" = yes; then echo $ac_n "checking for GNU ld""... $ac_c" 1>&6 ! echo "configure:1677: checking for GNU ld" >&5 else echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6 ! echo "configure:1680: checking for non-GNU ld" >&5 fi if eval "test \"`echo '$''{'lt_cv_path_LD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 1662,1671 ---- esac elif test "$with_gnu_ld" = yes; then echo $ac_n "checking for GNU ld""... $ac_c" 1>&6 ! echo "configure:1666: checking for GNU ld" >&5 else echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6 ! echo "configure:1669: checking for non-GNU ld" >&5 fi if eval "test \"`echo '$''{'lt_cv_path_LD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** else *** 1711,1717 **** fi test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; } echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6 ! echo "configure:1715: checking if the linker ($LD) is GNU ld" >&5 if eval "test \"`echo '$''{'lt_cv_prog_gnu_ld'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1700,1706 ---- fi test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; } echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6 ! echo "configure:1704: checking if the linker ($LD) is GNU ld" >&5 if eval "test \"`echo '$''{'lt_cv_prog_gnu_ld'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** with_gnu_ld=$lt_cv_prog_gnu_ld *** 1728,1734 **** echo $ac_n "checking for $LD option to reload object files""... $ac_c" 1>&6 ! echo "configure:1732: checking for $LD option to reload object files" >&5 if eval "test \"`echo '$''{'lt_cv_ld_reload_flag'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1717,1723 ---- echo $ac_n "checking for $LD option to reload object files""... $ac_c" 1>&6 ! echo "configure:1721: checking for $LD option to reload object files" >&5 if eval "test \"`echo '$''{'lt_cv_ld_reload_flag'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** reload_flag=$lt_cv_ld_reload_flag *** 1740,1746 **** test -n "$reload_flag" && reload_flag=" $reload_flag" echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6 ! echo "configure:1744: checking for BSD-compatible nm" >&5 if eval "test \"`echo '$''{'lt_cv_path_NM'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1729,1735 ---- test -n "$reload_flag" && reload_flag=" $reload_flag" echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6 ! echo "configure:1733: checking for BSD-compatible nm" >&5 if eval "test \"`echo '$''{'lt_cv_path_NM'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** NM="$lt_cv_path_NM" *** 1778,1784 **** echo "$ac_t""$NM" 1>&6 echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6 ! echo "configure:1782: checking whether ln -s works" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1767,1773 ---- echo "$ac_t""$NM" 1>&6 echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6 ! echo "configure:1771: checking whether ln -s works" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** else *** 1799,1805 **** fi echo $ac_n "checking how to recognise dependant libraries""... $ac_c" 1>&6 ! echo "configure:1803: checking how to recognise dependant libraries" >&5 if eval "test \"`echo '$''{'lt_cv_deplibs_check_method'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1788,1794 ---- fi echo $ac_n "checking how to recognise dependant libraries""... $ac_c" 1>&6 ! echo "configure:1792: checking how to recognise dependant libraries" >&5 if eval "test \"`echo '$''{'lt_cv_deplibs_check_method'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** file_magic_cmd=$lt_cv_file_magic_cmd *** 1963,1975 **** deplibs_check_method=$lt_cv_deplibs_check_method echo $ac_n "checking for object suffix""... $ac_c" 1>&6 ! echo "configure:1967: checking for object suffix" >&5 if eval "test \"`echo '$''{'ac_cv_objext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else rm -f conftest* echo 'int i = 1;' > conftest.$ac_ext ! if { (eval echo configure:1973: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then for ac_file in conftest.*; do case $ac_file in *.c) ;; --- 1952,1964 ---- deplibs_check_method=$lt_cv_deplibs_check_method echo $ac_n "checking for object suffix""... $ac_c" 1>&6 ! echo "configure:1956: checking for object suffix" >&5 if eval "test \"`echo '$''{'ac_cv_objext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else rm -f conftest* echo 'int i = 1;' > conftest.$ac_ext ! if { (eval echo configure:1962: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then for ac_file in conftest.*; do case $ac_file in *.c) ;; *************** case $deplibs_check_method in *** 1993,1999 **** file_magic*) if test "$file_magic_cmd" = '$MAGIC_CMD'; then echo $ac_n "checking for ${ac_tool_prefix}file""... $ac_c" 1>&6 ! echo "configure:1997: checking for ${ac_tool_prefix}file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 1982,1988 ---- file_magic*) if test "$file_magic_cmd" = '$MAGIC_CMD'; then echo $ac_n "checking for ${ac_tool_prefix}file""... $ac_c" 1>&6 ! echo "configure:1986: checking for ${ac_tool_prefix}file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 2055,2061 **** if test -z "$lt_cv_path_MAGIC_CMD"; then if test -n "$ac_tool_prefix"; then echo $ac_n "checking for file""... $ac_c" 1>&6 ! echo "configure:2059: checking for file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2044,2050 ---- if test -z "$lt_cv_path_MAGIC_CMD"; then if test -n "$ac_tool_prefix"; then echo $ac_n "checking for file""... $ac_c" 1>&6 ! echo "configure:2048: checking for file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** esac *** 2126,2132 **** # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2130: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2115,2121 ---- # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2119: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** if test -n "$ac_tool_prefix"; then *** 2158,2164 **** # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2162: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2147,2153 ---- # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2151: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** fi *** 2193,2199 **** # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2197: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2182,2188 ---- # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2186: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** if test -n "$ac_tool_prefix"; then *** 2225,2231 **** # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2229: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2214,2220 ---- # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 ! echo "configure:2218: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** test x"$pic_mode" = xno && libtool_flags *** 2292,2299 **** case $host in *-*-irix6*) # Find out which ABI we are using. ! echo '#line 2296 "configure"' > conftest.$ac_ext ! if { (eval echo configure:2297: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" --- 2281,2288 ---- case $host in *-*-irix6*) # Find out which ABI we are using. ! echo '#line 2285 "configure"' > conftest.$ac_ext ! if { (eval echo configure:2286: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" *************** case $host in *** 2314,2320 **** SAVE_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS -belf" echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6 ! echo "configure:2318: checking whether the C compiler needs -belf" >&5 if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2303,2309 ---- SAVE_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS -belf" echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6 ! echo "configure:2307: checking whether the C compiler needs -belf" >&5 if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** ac_link='${CC-cc} -o conftest${ac_exeext *** 2327,2340 **** cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* lt_cv_cc_needs_belf=yes else --- 2316,2329 ---- cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* lt_cv_cc_needs_belf=yes else *************** echo "$ac_t""$lt_cv_cc_needs_belf" 1>&6 *** 2364,2370 **** esac echo $ac_n "checking how to run the C++ preprocessor""... $ac_c" 1>&6 ! echo "configure:2368: checking how to run the C++ preprocessor" >&5 if test -z "$CXXCPP"; then if eval "test \"`echo '$''{'ac_cv_prog_CXXCPP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 2353,2359 ---- esac echo $ac_n "checking how to run the C++ preprocessor""... $ac_c" 1>&6 ! echo "configure:2357: checking how to run the C++ preprocessor" >&5 if test -z "$CXXCPP"; then if eval "test \"`echo '$''{'ac_cv_prog_CXXCPP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** ac_link='${CXX-g++} -o conftest${ac_exee *** 2377,2388 **** cross_compiling=$ac_cv_prog_cxx_cross CXXCPP="${CXX-g++} -E" cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" ! { (eval echo configure:2386: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : --- 2366,2377 ---- cross_compiling=$ac_cv_prog_cxx_cross CXXCPP="${CXX-g++} -E" cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" ! { (eval echo configure:2375: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : *************** fi *** 2529,2535 **** echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 ! echo "configure:2533: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" --- 2518,2524 ---- echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 ! echo "configure:2522: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" *************** if test "x" = "y"; then *** 2558,2564 **** echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 ! echo "configure:2562: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else --- 2547,2553 ---- echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 ! echo "configure:2551: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else *************** else *** 2568,2577 **** rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= ! if { (eval echo configure:2572: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in ! *.c | *.o | *.obj | *.ilk | *.pdb) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done --- 2557,2566 ---- rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= ! if { (eval echo configure:2561: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in ! *.c | *.o | *.obj) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done *************** ac_exeext=$EXEEXT *** 2591,2597 **** fi echo $ac_n "checking for thread model used by GCC""... $ac_c" 1>&6 ! echo "configure:2595: checking for thread model used by GCC" >&5 THREADS=`$CC -v 2>&1 | sed -n 's/^Thread model: //p'` echo "$ac_t""$THREADS" 1>&6 --- 2580,2586 ---- fi echo $ac_n "checking for thread model used by GCC""... $ac_c" 1>&6 ! echo "configure:2584: checking for thread model used by GCC" >&5 THREADS=`$CC -v 2>&1 | sed -n 's/^Thread model: //p'` echo "$ac_t""$THREADS" 1>&6 *************** esac *** 2643,2649 **** echo $ac_n "checking for dlopen in -ldl""... $ac_c" 1>&6 ! echo "configure:2647: checking for dlopen in -ldl" >&5 ac_lib_var=`echo dl'_'dlopen | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 --- 2632,2638 ---- echo $ac_n "checking for dlopen in -ldl""... $ac_c" 1>&6 ! echo "configure:2636: checking for dlopen in -ldl" >&5 ac_lib_var=`echo dl'_'dlopen | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 *************** else *** 2651,2657 **** ac_save_LIBS="$LIBS" LIBS="-ldl $LIBS" cat > conftest.$ac_ext < conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else --- 2651,2657 ---- dlopen() ; return 0; } EOF ! if { (eval echo configure:2655: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else *************** case "$host" in *** 2734,2739 **** --- 2723,2734 ---- # alpha*-*-*) # machdep="alpha_mach_dep.lo" # ;; + i?86-*-solaris2.[89]*) + cat >> confdefs.h <<\EOF + #define SOLARIS25_PROC_VDB_BUG_FIXED 1 + EOF + + ;; mipstx39-*-elf*) machdep="mips_ultrix_mach_dep.lo" cat >> confdefs.h <<\EOF diff -Nrc3pad gcc-3.0.1/boehm-gc/configure.in gcc-3.0.2/boehm-gc/configure.in *** gcc-3.0.1/boehm-gc/configure.in Fri Jun 8 10:59:15 2001 --- gcc-3.0.2/boehm-gc/configure.in Wed Sep 26 06:10:55 2001 *************** case "$host" in *** 105,110 **** --- 105,113 ---- # alpha*-*-*) # machdep="alpha_mach_dep.lo" # ;; + i?86-*-solaris2.[[89]]*) + AC_DEFINE(SOLARIS25_PROC_VDB_BUG_FIXED) + ;; mipstx39-*-elf*) machdep="mips_ultrix_mach_dep.lo" AC_DEFINE(STACKBASE, __stackbase) diff -Nrc3pad gcc-3.0.1/boehm-gc/gcconfig.h gcc-3.0.2/boehm-gc/gcconfig.h *** gcc-3.0.1/boehm-gc/gcconfig.h Wed Apr 4 17:13:13 2001 --- gcc-3.0.2/boehm-gc/gcconfig.h Wed Sep 26 06:10:55 2001 *************** *** 722,733 **** # endif # ifdef SUNOS5 # define OS_TYPE "SUNOS5" ! extern int etext, _start; extern char * GC_SysVGetDataStart(); ! # define DATASTART GC_SysVGetDataStart(0x1000, &etext) ! # define STACKBOTTOM ((ptr_t)(&_start)) /** At least in Solaris 2.5, PROC_VDB gives wrong values for dirty bits. */ ! /*# define PROC_VDB*/ # define DYNAMIC_LOADING # ifndef USE_MMAP # define USE_MMAP --- 722,737 ---- # endif # ifdef SUNOS5 # define OS_TYPE "SUNOS5" ! extern int _etext, _end; extern char * GC_SysVGetDataStart(); ! # define DATASTART GC_SysVGetDataStart(0x1000, &_etext) ! # define DATAEND (&_end) ! # include ! # define STACKBOTTOM USRSTACK /** At least in Solaris 2.5, PROC_VDB gives wrong values for dirty bits. */ ! # ifdef SOLARIS25_PROC_VDB_BUG_FIXED ! # define PROC_VDB ! # endif # define DYNAMIC_LOADING # ifndef USE_MMAP # define USE_MMAP diff -Nrc3pad gcc-3.0.1/boehm-gc/mach_dep.c gcc-3.0.2/boehm-gc/mach_dep.c *** gcc-3.0.1/boehm-gc/mach_dep.c Wed Apr 26 17:43:33 2000 --- gcc-3.0.2/boehm-gc/mach_dep.c Wed Sep 26 09:22:08 2001 *************** void GC_push_regs() *** 281,286 **** --- 281,298 ---- # if defined(I386) && (defined(SVR4) || defined(SCO) || defined(SCO_ELF)) /* I386 code, SVR4 variant, generic code does not appear to work */ + # ifdef __GNUC__ + /* This is necessary to support PIC code. */ + # define call_push(REGNAME) \ + { register word reg __asm__( #REGNAME ); GC_push_one (reg); } + + # ifndef PIC + call_push(ebx) + # endif + call_push(ebp) + call_push(esi) + call_push(edi) + # else /* !__GNUC__ */ asm("pushl %eax"); asm("call GC_push_one"); asm("addl $4,%esp"); asm("pushl %ebx"); asm("call GC_push_one"); asm("addl $4,%esp"); asm("pushl %ecx"); asm("call GC_push_one"); asm("addl $4,%esp"); *************** void GC_push_regs() *** 288,293 **** --- 300,306 ---- asm("pushl %ebp"); asm("call GC_push_one"); asm("addl $4,%esp"); asm("pushl %esi"); asm("call GC_push_one"); asm("addl $4,%esp"); asm("pushl %edi"); asm("call GC_push_one"); asm("addl $4,%esp"); + # endif /* !__GNUC__ */ # endif # ifdef NS32K diff -Nrc3pad gcc-3.0.1/boehm-gc/solaris_threads.c gcc-3.0.2/boehm-gc/solaris_threads.c *** gcc-3.0.1/boehm-gc/solaris_threads.c Wed Apr 19 03:09:58 2000 --- gcc-3.0.2/boehm-gc/solaris_threads.c Wed Sep 26 06:10:56 2001 *************** GC_thread GC_lookup_thread(thread_t id) *** 616,622 **** --- 616,633 ---- return(p); } + /* Solaris 2/Intel uses an initial stack size limit slightly bigger than the + SPARC default of 8 MB. Account for this to warn only if the user has + raised the limit beyond the default. + + This is identical to DFLSSIZ defined in . This file + is installed in /usr/platform/`uname -m`/include, which is not in the + default include directory list, so copy the definition here. */ + #ifdef I386 + # define MAX_ORIG_STACK_SIZE (8 * 1024 * 1024 + ((USRSTACK) & 0x3FFFFF)) + #else # define MAX_ORIG_STACK_SIZE (8 * 1024 * 1024) + #endif word GC_get_orig_stack_size() { struct rlimit rl; *************** word GC_get_orig_stack_size() { *** 627,633 **** result = (word)rl.rlim_cur & ~(HBLKSIZE-1); if (result > MAX_ORIG_STACK_SIZE) { if (!warned) { ! WARN("Large stack limit(%ld): only scanning 8 MB", result); warned = 1; } result = MAX_ORIG_STACK_SIZE; --- 638,644 ---- result = (word)rl.rlim_cur & ~(HBLKSIZE-1); if (result > MAX_ORIG_STACK_SIZE) { if (!warned) { ! WARN("Large stack limit(%ld): only scanning 8 MB\n", result); warned = 1; } result = MAX_ORIG_STACK_SIZE; diff -Nrc3pad gcc-3.0.1/bugs.html gcc-3.0.2/bugs.html *** gcc-3.0.1/bugs.html Sun Aug 19 17:45:06 2001 --- gcc-3.0.2/bugs.html Tue Oct 23 10:56:06 2001 *************** *** 8,15 ****

    GCC Bugs

    The latest version of this document is always available at ! ! http://gcc.gnu.org/bugs.html.


    --- 8,14 ----

    GCC Bugs

    The latest version of this document is always available at ! http://www.gnu.org/software/gcc/bugs.html.


    *************** http://gcc.gnu.org/bugs.html.

    *** 53,63 ****

    Before you report a bug, please check the list of well-known bugs and, if possible ! in any way, try a current development snapshot or ! CodeSourcery's ! Online Test Compilation. If you want to report a bug ! with egcs 1.x or versions of GCC before 3.0 we strongly recommend ! upgrading to the current release first.

    Before reporting that GCC compiles your code incorrectly, please compile it with gcc -Wall and see whether this shows --- 52,60 ----

    Before you report a bug, please check the list of well-known bugs and, if possible ! in any way, try a current development snapshot. ! If you want to report a bug with versions of GCC before 3.0 we strongly ! recommend upgrading to the current release first.

    Before reporting that GCC compiles your code incorrectly, please compile it with gcc -Wall and see whether this shows *************** contributors.

    *** 244,251 ****
    • GCC 2.95.2 does not build on GNU/Linux systems using glibc 2.2, ! such as Red Hat 7.0. A patch is ! available. This is fixed in GCC 2.95.3 and GCC 3.0.
    • GCC 2.95.2 crashes when compiling mbx.c from the PINE 4.30 or IMAP2000 distribution on Sparc systems running Solaris.
    • --- 241,247 ----
      • GCC 2.95.2 does not build on GNU/Linux systems using glibc 2.2, ! such as Red Hat 7.0. This is fixed in GCC 2.95.3 and GCC 3.0.
      • GCC 2.95.2 crashes when compiling mbx.c from the PINE 4.30 or IMAP2000 distribution on Sparc systems running Solaris.
      • *************** available. This is fixed in GCC 2.95.3 *** 256,265 ****

        Fortran

        !

        Fortran bugs are documented in the G77 manual rather than explicitly listed here. Please see ! "Known Causes of Trouble with GNU ! Fortran" in the G77 manual.


        --- 252,261 ----

        Fortran

        !

        Fortran bugs are documented in the G77 manual rather than explicitly listed here. Please see ! Known Causes of ! Trouble with GNU Fortran in the G77 manual.


        *************** main.

        *** 294,302 ****

        There is a common misconception that the GCC developers are responsible for GNU libc. These are in fact two entirely separate ! projects. The appropriate place to ask questions relating to GNU libc ! is ! libc-alpha@sources.redhat.com.

        Cannot use preprocessor directive in macro arguments.
        --- 290,298 ----

        There is a common misconception that the GCC developers are responsible for GNU libc. These are in fact two entirely separate ! projects; please check the ! GNU libc web pages ! for details.

        Cannot use preprocessor directive in macro arguments.
        *************** to round to the nearest representable nu *** 548,554 ****

        This is not a bug in the compiler, but an inherent limitation of the float and double types. Please study ! this paper for more information.

        --- 544,550 ----

        This is not a bug in the compiler, but an inherent limitation of the float and double types. Please study ! this paper for more information.

        diff -Nrc3pad gcc-3.0.1/config/ChangeLog gcc-3.0.2/config/ChangeLog *** gcc-3.0.1/config/ChangeLog Sun Aug 19 14:08:02 2001 --- gcc-3.0.2/config/ChangeLog Tue Oct 23 10:18:59 2001 *************** *** 1,3 **** --- 1,7 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/config/mpw/ChangeLog gcc-3.0.2/config/mpw/ChangeLog *** gcc-3.0.1/config/mpw/ChangeLog Sun Aug 19 14:08:03 2001 --- gcc-3.0.2/config/mpw/ChangeLog Tue Oct 23 10:18:55 2001 *************** *** 1,3 **** --- 1,7 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/configure gcc-3.0.2/configure *** gcc-3.0.1/configure Sat Feb 17 05:16:58 2001 --- gcc-3.0.2/configure Mon Oct 1 23:50:12 2001 *************** *** 3,9 **** ### WARNING: this file contains embedded tabs. Do not run untabify on this file. # Configuration script ! # Copyright (C) 1988, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999 # Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify --- 3,9 ---- ### WARNING: this file contains embedded tabs. Do not run untabify on this file. # Configuration script ! # Copyright (C) 1988, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999, 2000, 2001 # Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify *************** subdirs= *** 89,95 **** target_alias=NOTARGET target_makefile_frag= undefs=NOUNDEFS ! version="$Revision: 1.34.2.1 $" x11=default bindir='${exec_prefix}/bin' sbindir='${exec_prefix}/sbin' --- 89,95 ---- target_alias=NOTARGET target_makefile_frag= undefs=NOUNDEFS ! version="$Revision: 1.34.2.2 $" x11=default bindir='${exec_prefix}/bin' sbindir='${exec_prefix}/sbin' *************** case "${TMPDIR}" in *** 663,675 **** esac # keep this filename short for &%*%$*# 14 char file names and 8+3 file names ! tmpfile=${TMPDIR}/cNf$$ # Note that under many versions of sh a trap handler for 0 will *override* any # exit status you explicitly specify! At this point, the only non-error exit # is at the end of the script; these actions are duplicated there, minus # the "exit 1". Don't use "exit 0" anywhere after this without resetting the # trap handler, or you'll lose. ! trap "rm -f Makefile.tem ${tmpfile}.com ${tmpfile}.tgt ${tmpfile}.hst ${tmpfile}.pos; exit 1" 0 1 2 15 # split ${srcdir}/configure.in into common, per-host, per-target, # and post-target parts. Post-target is optional. --- 663,677 ---- esac # keep this filename short for &%*%$*# 14 char file names and 8+3 file names ! tmpdir=${TMPDIR}/cNf$$ ! mkdir ${tmpdir} || exit 1 ! tmpfile=${tmpdir}/cNf$$ # Note that under many versions of sh a trap handler for 0 will *override* any # exit status you explicitly specify! At this point, the only non-error exit # is at the end of the script; these actions are duplicated there, minus # the "exit 1". Don't use "exit 0" anywhere after this without resetting the # trap handler, or you'll lose. ! trap "rm -rf Makefile.tem ${tmpdir}; exit 1" 0 1 2 15 # split ${srcdir}/configure.in into common, per-host, per-target, # and post-target parts. Post-target is optional. *************** if test -f skip-this-dir; then *** 696,702 **** # Perform the same cleanup as the trap handler, minus the "exit 1" of course, # and reset the trap handler. trap 0 ! rm -f Makefile* ${tmpfile}.com ${tmpfile}.tgt ${tmpfile}.hst ${tmpfile}.pos # Execute the final clean-up actions ${config_shell} skip-this-dir # and stop configuring this directory. --- 698,704 ---- # Perform the same cleanup as the trap handler, minus the "exit 1" of course, # and reset the trap handler. trap 0 ! rm -rf Makefile* ${tmpdir} # Execute the final clean-up actions ${config_shell} skip-this-dir # and stop configuring this directory. *************** fi *** 1600,1606 **** # Perform the same cleanup as the trap handler, minus the "exit 1" of course, # and reset the trap handler. ! rm -f ${tmpfile}.com ${tmpfile}.tgt ${tmpfile}.hst ${tmpfile}.pos trap 0 exit 0 --- 1602,1608 ---- # Perform the same cleanup as the trap handler, minus the "exit 1" of course, # and reset the trap handler. ! rm -rf ${tmpdir} trap 0 exit 0 diff -Nrc3pad gcc-3.0.1/contrib/ChangeLog gcc-3.0.2/contrib/ChangeLog *** gcc-3.0.1/contrib/ChangeLog Sun Aug 19 14:08:04 2001 --- gcc-3.0.2/contrib/ChangeLog Tue Oct 23 10:19:03 2001 *************** *** 1,3 **** --- 1,11 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + + 2001-08-24 Mark Mitchell + + * gcc_release: Correct quoting. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/contrib/gcc_release gcc-3.0.2/contrib/gcc_release *** gcc-3.0.1/contrib/gcc_release Mon Aug 13 22:36:42 2001 --- gcc-3.0.2/contrib/gcc_release Fri Aug 24 13:16:05 2001 *************** EOF *** 131,137 **** for x in gcc/version.c; do y=`basename ${x}` (changedir `dirname ${SOURCE_DIRECTORY}/${x}` && \ ! sed -e 's|= \".*\"|= \"${RELEASE}\"|g' < ${y} > ${y}.new && \ mv ${y}.new ${y} && \ ${CVS} ci -m 'Update version' ${y}) || \ error "Could not update ${x}" --- 131,137 ---- for x in gcc/version.c; do y=`basename ${x}` (changedir `dirname ${SOURCE_DIRECTORY}/${x}` && \ ! sed -e 's|= \".*\"|= \"'${RELEASE}'\"|g' < ${y} > ${y}.new && \ mv ${y}.new ${y} && \ ${CVS} ci -m 'Update version' ${y}) || \ error "Could not update ${x}" *************** EOF *** 155,161 **** # Tag the sources. if [ -n "${TAG}" ]; then inform "Tagging release sources" ! ${CVS} rtag -r ${BRANCH} ${TAG} gcc || \ error "Could not tag release sources" BRANCH=$TAG fi --- 155,161 ---- # Tag the sources. if [ -n "${TAG}" ]; then inform "Tagging release sources" ! ${CVS} rtag -r ${BRANCH} -F ${TAG} gcc || \ error "Could not tag release sources" BRANCH=$TAG fi diff -Nrc3pad gcc-3.0.1/faq.html gcc-3.0.2/faq.html *** gcc-3.0.1/faq.html Sun Aug 19 17:45:09 2001 --- gcc-3.0.2/faq.html Tue Oct 23 10:56:16 2001 *************** *** 9,21 ****

        GCC Frequently Asked Questions

        The latest version of this document is always available at ! http://gcc.gnu.org/faq.html.

        This FAQ tries to answer specific questions concerning GCC. For general information regarding C, C++, resp. Fortran please check the comp.lang.c FAQ, - - comp.lang.c++ FAQ, comp.std.c++ FAQ, and the Fortran Information --- 9,19 ----

        GCC Frequently Asked Questions

        The latest version of this document is always available at ! http://www.gnu.org/software/gcc/faq.html.

        This FAQ tries to answer specific questions concerning GCC. For general information regarding C, C++, resp. Fortran please check the comp.lang.c FAQ, comp.std.c++ FAQ, and the Fortran Information *************** page.

        *** 37,42 **** --- 35,41 ----
      • How do I report a bug?
      • How do I get a bug fixed or a feature added?
      • How can I get a development environment for GCC without using CVS?
      • +
      • Does GCC work on my platform?
      • Installation *************** page.

        *** 58,67 ****
      • How can I run the test suite with multiple options?
      • !
      • Older versions of GCC or EGCS
          !
        1. Why is there no testsuite in GCC 2.95?
        2. !
        3. Is there a stringstream / sstream for gcc 2.95.2?
      • Miscellaneous --- 57,65 ----
      • How can I run the test suite with multiple options?
      • !
      • Older versions of GCC
          !
        1. Is there a stringstream / sstream for GCC 2.95.2?
      • Miscellaneous *************** page.

        *** 69,81 ****
      • Virtual memory exhausted
      • Friend Templates
      • Why do I need autoconf, bison, xgettext, automake, etc?
      • -
      • Problems debugging GCC code
      • -
      • Using GCC with GNAT/Ada
      • Why can't I build a shared library?
      • How to work around too long C++ symbol names? (-fsquangle)
      • When building C++, the linker says my constructors, destructors or virtual tables are undefined, but I defined them
      • -
      • What is libstdc++-v3 and how can I use it with g++?
      • Will GCC someday include an incremental linker?
      • --- 67,76 ---- *************** disadvantages.

        *** 197,208 **** individuals providing support for GCC. This alternative costs money, but is relatively likely to get results. !
      • Report the problem to gcc-bugs and hope that someone will be kind enough to fix it for you. While this is certainly possible, and often happens, there is no guarantee that it will. You should ! not expect the same response from gcc-bugs that you would see from a commercial support organization since the people who read ! gcc-bugs, if they choose to help you, will be volunteering their time. This alternative will work best if you follow the directions on submitting bugreports.
      • --- 192,204 ---- individuals providing support for GCC. This alternative costs money, but is relatively likely to get results. !
      • Report the problem to the GCC GNATS bug tracking system ! and hope that someone will be kind enough to fix it for you. While this is certainly possible, and often happens, there is no guarantee that it will. You should ! not expect the same response from this method that you would see from a commercial support organization since the people who read ! GCC bug reports, if they choose to help you, will be volunteering their time. This alternative will work best if you follow the directions on submitting bugreports.
      • *************** disadvantages.

        *** 219,226 **** without using CVS?

        GCC snapshots are available from the FTP server and its mirrors; ! see the GCC mirror list.


        --- 215,235 ---- without using CVS?

        GCC snapshots are available from the FTP server and its mirrors; ! see the GCC mirror list.

        ! !
        +

        Does GCC work on my platform?

        + +

        The host/target specific installation notes for GCC include information + about known problems with installing or using GCC on particular platforms. + These are included in the sources for a release in INSTALL/specific.html, + and the latest version + is always available at the GCC web site. + Reports of successful builds for GCC versions + 3.0 and + 2.95 + are also available at the web site.


        *************** do not follow the install instructions c *** 236,245 **** "make bootstrap" if you are building a native compiler or "make cross" if you are building a cross compiler.

        -

        It has also been reported that the Fortran compiler can not be built - on Red Hat 4.X GNU/Linux for the Alpha. Fixing this may require upgrading - binutils or to Red Hat 5.0; we'll provide more information as it becomes - available.


        How to install multiple versions of GCC

        --- 245,250 ---- *************** may have to take one of the following ac *** 355,361 **** the GNU versions of those programs.

        To ensure that GCC finds the GNU assembler (the GNU loader), which ! are required by some configurations, you should configure these with the same --prefix option as you used for GCC. Then build & install GNU as (GNU ld) and proceed with building GCC.

        --- 360,367 ---- the GNU versions of those programs.

        To ensure that GCC finds the GNU assembler (the GNU loader), which ! are required by some ! configurations, you should configure these with the same --prefix option as you used for GCC. Then build & install GNU as (GNU ld) and proceed with building GCC.

        *************** no additional flags.

        *** 458,476 ****

        Older versions of GCC and EGCS

        !

        Why is there no testsuite in GCC 2.95?

        ! !

        The GCC testsuite is not included in the GCC 2.95 release due to the ! uncertain copyright status of some tests.

        ! !

        The GCC team has reviewed the entire testsuite to find and remove ! any tests with uncertain copyright status, following guidelines from ! Prof. Eben Moglen. The testsuite is included in GCC 3.0 and ! subsequent releases. Only a few tests needed to be removed from the ! testsuite.

        ! !
        !

        Is there a stringstream / sstream for gcc 2.95.2?

        Yes, it's at: --- 464,470 ----

        Older versions of GCC and EGCS

        !

        Is there a stringstream / sstream for GCC 2.95.2?

        Yes, it's at: *************** testsuite.

        *** 480,485 **** --- 474,481 ----

        Miscellaneous

        + +

        Virtual memory exhausted error

        This error means your system ran out of memory; this can happen for large *************** of packages.

        *** 583,604 ****
        -

        Problems debugging GCC code

        - -

        On some systems GCC will produce dwarf debug records by default; however - the gdb-4.16 release may not be able to read such debug records.

        - -

        You can either use the argument "-gstabs" instead of "-g" or pick up - a copy of gdb-4.17 to work around the problem. - -


        -

        Using GCC with GNAT/Ada

        -

        The GNU Ada front-end is not currently supported by GCC, but work - is in progress to integrate GNU Ada into the GCC CVS repository and - produce new releases based on current versions of GCC.

        - - -

        Why can't I build a shared library?

        When building a shared library you may get an error message from the --- 579,584 ---- *************** done.

        *** 669,684 **** pure are defined. Note that a destructor must be defined even if it is declared pure-virtual [class.dtor]/7.

        -
        -

        What is libstdc++-v3 and how can I use it with g++?

        - -

        From the - libstdc++-v3 FAQ: - "The GNU Standard C++ Library v3, or libstdc++-2.9x, is an ongoing - project to implement the ISO 14882 Standard C++ library as described - in chapters 17 through 27 and annex D."

        - -

        libstdc++-v3 is enabled by default in 3.x releases of GCC.


        Will GCC someday include an incremental linker?

        --- 649,654 ---- diff -Nrc3pad gcc-3.0.1/fastjar/ChangeLog gcc-3.0.2/fastjar/ChangeLog *** gcc-3.0.1/fastjar/ChangeLog Sun Aug 19 14:08:05 2001 --- gcc-3.0.2/fastjar/ChangeLog Tue Oct 23 10:19:07 2001 *************** *** 1,3 **** --- 1,7 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + 2001-08-19 Release Manager * GCC 3.0.1 Released. diff -Nrc3pad gcc-3.0.1/gcc/ChangeLog gcc-3.0.2/gcc/ChangeLog *** gcc-3.0.1/gcc/ChangeLog Sun Aug 19 14:08:08 2001 --- gcc-3.0.2/gcc/ChangeLog Tue Oct 23 10:19:18 2001 *************** *** 1,3 **** --- 1,524 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + + 2001-10-23 Joseph S. Myers + + * doc/gcc.texi (Sending Patches): Remove. + + 2001-10-17 Joseph S. Myers + + * doc/gcc.1: Regenerate. + + 2001-10-16 Matt Kraai + + * c-tree.texi: Eliminate duplicated word. + * cpp.texi: Likewise. + * install.texi: Likewise. + * invoke.texi: Likewise. + * tm.texi: Likewise. + + 2001-10-14 Craig Rodrigues + + PR c/4157 + * config/i386/cygwin.h: Add missing space to MINGW_INCLUDES. + + 2001-10-13 Craig Rodrigues + + * doc/invoke.texi: Remove -fvtable-gc. + * doc/gcc.1: Likewise. + + 2001-10-12 Joseph S. Myers + + * doc/cpp.1, doc/gcc.1, doc/gcov.1: Regenerate. + + 2001-10-11 Franz Sirl + + * unroll.c (loop_iterations): Extend check for multiple back edges. + + 2001-10-11 Mark Mitchell + + Revert these changes: + + 2001-10-10 Franz Sirl + PR c++/4512 + * unroll.c (loop_iterations): Ignore insns generated by loop + unrolling. + 2001-10-08 Franz Sirl + * unroll.c (loop_iterations): Extend check for multiple back edges. + + 2001-10-10 Danny Smith + + * config/i386/mingw32.h (WIN32_NO_ABSOLUTE_INST_DIRS): New define. + (Thanks to Chris Faylor for suggesting macro name). + (CPP_PREDEFINES): Define __MINGW32__ but don't set value; add more + WIN32 defines. + (STANDARD_INCLUDE_DIR): Remove i386- from directory name. + (STANDARD_INCLUDE_COMPONENT): Change to MINGW. + (MATH_LIBRARY): Undef before definition. + (OUTPUT_QUOTED_STRING): Likewise. + * config/i386/cygwin.h: Use WIN32_NO_ABSOLUTE_INST_DIRS. + + 2001-10-10 Franz Sirl + + PR c++/4512 + * unroll.c (loop_iterations): Ignore insns generated by loop + unrolling. + + 2001-10-10 Hartmut Schirmer + + * config/float-i128.h: Make sure __STDC__VERSION__ is defined + before using it. + * config/float/i32.h: Likewise. + * config/float-i386.h: Likewise. + * config/float-i64.h: Likewise. + * config/float-m68k.h: Likewise. + * config/float-sh.h: Likewise. + * config/float-sparc.h: Likewise. + + 2001-10-09 Danny Smith + + * config.gcc (i[34567]86-*-mingw32*): Make msvcrt-dependent + version default. + + 2001-10-10 Joseph S. Myers + + * doc/c-tree.texi, doc/extend.texi, doc/install.texi, doc/md.texi, + doc/rtl.texi, doc/tm.texi: Consistently use "nonzero" instead of + "non-zero". + + 2001-10-09 Kazu Hirata + + * doc/cpp.texi: Fix typos. + * doc/c-tree.texi: Likewise. + * doc/extend.texi: Likewise. + * doc/invoke.texi: Likewise. + * doc/objc.texi: Likewise. + + 2001-10-09 Joseph S. Myers + + * doc/gcc.texi: Document preference for "nonzero" over "non-zero". + + 2001-10-08 Neil Booth + + * doc/cpp.texi: Update. + + 2001-10-08 Neil Booth + + * cppmacro.c (_cpp_create_definition): Leave comments off. + * cpplex.c (_cpp_lex_token): Don't save comments if skipping. + + * doc/cpp.texi: Update. + + 2001-10-08 Franz Sirl + + * unroll.c (loop_iterations): Extend check for multiple back edges. + + 2001-10-08 Jeffrey A Law + + * sibcall.c (optimize_sibling_and_tail_recursive_calls): Call + purge_mem_unchanging_flag on all instructions, not just on those + before NOTE_INSN_FUNCTION_BEG. + + 2001-10-07 Joseph S. Myers + + * doc/gcc.texi: Fix spelling error of "separate" as "seperate". + + 2001-10-07 Joseph S. Myers + + * doc/c-tree.texi, doc/tm.texi: Consistently put NULL and + NULL_TREE inside @code. + + 2001-10-07 Joseph S. Myers + + * doc/gcc.texi: Document consistent style of "32-bit", + "Objective-C", and "@code{NULL}". + + 2001-10-05 Richard Henderson + + * i386.md (movsi_xor): Export. + (setcc peep2): Use it when available. + + 2001-10-05 Richard Henderson + + * dwarf2out.c (FRAME_BEGIN_LABEL): New. + (output_call_frame_info): Use it instead of __FRAME_BEGIN__ and + the gas section-name-as-label feature. + + 2001-10-04 Loren J. Rittle + + * Makefile.in (STAGE2_FLAGS_TO_PASS): Remove patch which + propagated HOST_CC. + + Thu Oct 4 16:18:12 CEST 2001 Jan Hubicka + + * gcc.c (main): Set this_file_error if the appropriate + compiler for a language has not been installed. + + 2001-10-01 Loren J. Rittle + + * Makefile.in (STAGE2_FLAGS_TO_PASS): Propagate HOST_CC. + (fixinc.sh): Map CC, CFLAGS and LDFLAGS to HOST_* versions for + later recursive make invocation. + + 2001-10-01 Stephane Carrez + + * config/m68hc11/m68hc11.md ("add-split"): Fix add split when + operand 2 is the stack pointer. + ("addr-peephole"): Fix address computation peephole when operand 2 + is the stack pointer. + + 2001-09-30 Stephane Carrez + + * config/m68hc11/m68hc11.md ("cmpqi_1"): Fix constraints. + ("tsthi_1"): Avoid allocation in register y. + ("*movqi_68hc12"): Reorganize and fix constraints. + ("zero_extendqisi2"): Prefer d over x and y for operand 1. + ("addqi3"): Likewise. + ("addhi3"): Fix constraints. + ("*logicalhi3_zexthi"): Disparage soft registers. + + 2001-09-30 Stephane Carrez + + * config/m68hc11/m68hc11.c (m68hc11_gen_movhi): Fix move of sp + to tmp reg. + + 2001-09-30 Stephane Carrez + + * config/m68hc11/m68hc11.h(INCOMING_RETURN_ADDR_RTX): Remove so + that we use setjmp/longjmp exceptions. + + 2001-09-30 Ulrich Weigand + + * config/s390/s390.c (s390_adjust_cost): Fixed incorrect scheduling. + * config/s390/s390.md (function units): Likewise. + + * config/s390/s390.md (addsi3_cc, addsi3_cconly, addsi3_cconly2, + subsi3_cc, subsi3_cconly): Removed. + + * config/s390/s390.c (legitimate_la_operand_p): New. + * config/s390/s390-protos.h (legitimate_la_operand_p): Add. + * config/s390/s390.md (movsi): Convert load address patterns to + arithmetic operations when necessary. + (addaddr_picR, addaddr_picL, addaddr_picN): Removed. + (do_la): Renamed to *do_la and use legitimate_la_operand_p. + (*do_la_reg_0): Don't use before reload. + + * config/s390/s390.c (legitimize_address): Make more efficient + use of two-register addressing mode. + + * config/s390/s390.c (s390_function_prologue): Fix incorrect prolog + with -mno-backchain in some corner cases. + + * config/s390/s390.md (cmpsi_cct): Operands 0 and 1 do not commute. + + 2001-09-29 Alexandre Oliva + + * reload.c (find_reloads): Mark new USE insns with QImode. + (find_reloads_toplev, find_reloads_address, subst_reg_equivs, + find_reloads_subreg_address): Likewise. + * regrename.c (note_sets, clear_dead_regs): Abort if pseudos are + encountered. + * reload1.c (reload_combine_note_use): Likewise, inside USEs and + CLOBBERs. + (reload): Make sure there are no USEs with mode other than + VOIDmode. At the end, remove those marked with QImode. + + 2001-09-28 Rainer Orth + + * config/i386/sol2.h (CPLUSPLUS_CPP_SPEC): Define. + + 2001-09-27 Richard Henderson + + * dwarf2out.c (dwarf2out_frame_finish): Never elide .debug_frame + in favour of .eh_frame; fix eh test wrt USING_SJLJ_EXCEPTIONS. + + Tue Sep 25 15:09:03 2001 Rainer Orth + + * doc/install.texi (Specific, sparc-sun-solaris2*): Document + 64-bit support. + + 2001-09-25 Janis Johnson + Jim Wilson + + * doc/install.texi (Specific, ia64-*-linux): Document. + + 2001-09-24 David Edelsohn + + * rs6000.c (lwa_operand): Address must be word aligned. + + 2001-09-24 Janis Johnson + + * doc/install.texi (Final install): Request additional information + in mail about successful builds. + + 2001-09-24 Rainer Orth + + * doc/install.texi: Markup fixes. + Use Solaris 2, SunOS 4 as appropriate. + (Specific, *-*-solaris2*): Explain this. + Unconditionally warn against /usr/ucb tools. + Remove Sun as warning, obsolete. + Move X11 header bug workaround here, update patches. + (Specific, sparc-sun-solaris2*): Detail Sun as fix status. + (Specific, sparc-sun-solaris2.7): Update patch 106950 status. + + 2001-09-21 Richard Henderson + + * tree.def (FDESC_EXPR): New. + * expr.c (expand_expr): Handle it. + * varasm.c (initializer_constant_valid_p): Likewise. + (output_constant): Likewise. + * defaults.h (TARGET_VTABLE_USES_DESCRIPTORS): New. + * config/ia64/ia64.h (TARGET_VTABLE_USES_DESCRIPTORS): New. + (ASM_OUTPUT_FDESC): New. + + 2001-09-20 Andrew MacLeod + + * testsuite/gcc.c-torture/execute/990208-1.x: New. XFAIL at -O3 + on ia64. + + Thu Sep 20 12:49:34 2001 J"orn Rennecke + + * sh.c (shiftcosts): Don't use shiftcosts array for modes wider + than SImode. + + Thu Sep 20 12:18:41 2001 J"orn Rennecke + + * sh.c (initial_elimination_offset): When seeing + RETURN_ADDRESS_POINTER_REGNUM, force pr to be live. + Fix FROM == RETURN_ADDRESS_POINTER_REGNUM case. + + 2001-08-21 Richard Henderson + + * config/ia64/ia64.c (ia64_return_in_memory): True for variable + sized types. + + 2001-06-19 Bernd Schmidt + + * regmove.c (optimize_reg_copy_3): Do nothing if previous insn + carries a REG_EQUIV note. If it carries REG_EQUAL, delete the + note. + + 2001-09-18 Philip Blundell + + * config/arm/lib1funcs.asm (L_dvmd_lnx): Don't rely on kernel + header files. + + 2001-09-17 Jeff Sturm + + * except.c (dw2_build_landing_pads): New local + clobbers_hard_regs. Emit an ASM_INPUT as a scheduling + barrier after clobbers. Fixes c++/4012. + + 2001-09-17 Franz Sirl + + * gcse.c (hash_scan_set): Fix merge glitch in last patch. + + 2001-09-17 Joseph S. Myers + + * listing: Remove obsolete file. + + 2001-09-15 Richard Henderson + + * c-typeck.c (comptypes): Handle zero-length arrays properly. + + 2001-09-15 David Edelsohn + + * doc/install.texi: Explain AIX exception handling work-around. + Update URL for AIX fixes. + + 2001-09-15 Neil Booth + + * cpplib.c (do_pragma): Never expand macros. + + 2001-09-14 Richard Henderson + + * config/i386/i386.c (internal_label_prefix): New. + (internal_label_prefix_len): New. + (override_options): Set them. + (local_symbolic_operand): New. + (legitimate_pic_address_disp_p): Use it. + (legitimize_pic_address): Likewise. + + 2001-09-14 Marc Espie + + * config/i386/unix.h (ASM_OUTPUT_MI_THUNK): Generate reference to GOT + correctly. + + 2001-09-13 Markus Werle + Gerald Pfeifer + + * doc/install.texi (Binaries): Add "Binaries for HP-UX 11.00 at + Aachen University of Technology". + + 2001-09-13 Andreas Schwab + + * config/float-m68k.h: Define DECIMAL_DIG and FLT_EVAL_METHOD for + C99. + + 2001-09-12 Josh Martin + + * fixinc/inclhack.def(hpux11_size_t): Keep HP-UX headers from + defining __size_t and leaving size_t undefined. + + 2001-09-12 Jakub Jelinek + + * gcse.c (gcse_main): Fix comment typo. + (delete_null_pointer_check): Likewise. + (hash_scan_set): Don't consider sets with REG_EQUIV MEM notes. + * cse.c (cse_insn): Likewise. + * function.c (fixup_var_refs_insns_with_hash): The sequence is + toplevel. + + 2001-09-11 Jim Wilson + + * alias.c (clear_reg_alias_info): Only handle pseudo registers. + + 2001-09-10 Tim Freeman + + * dwarf2out.c (incomplete_types, decl_scope_table): Make them + into varray's and register them as roots with the garbage + collector so they are not collected too soon. + + 2001-09-10 David Edelsohn + + * config/rs6000/rs6000.c (scc_eq_operand): New predicate. + * config/rs6000/rs6000-protos.h: Declare it. + * config/rs6000/rs6000.h (PREDICATE_CODES): Add it. + * config/rs6000/rs6000.md (SCC eq:DI): Use it. + * config/rs6000/t-aix43 (SHLIB_INSTALL): Use mode 751 (a+x,r-o). + + 2001-09-07 Jim Wilson + + * alias.c (clear_reg_alias_info): New. + * flow.c (attempt_auto_inc): Call clear_reg_alias_info. + * rtl.h (clear_reg_alias_info): Declare. + + 2001-09-06 Richard Henderson + + * simplify-rtx.c (simplify_binary_operation): Revert last change. + + 2001-09-06 Richard Henderson + + * simplify-rtx.c (simplify_binary_operation): Simplify contents + of CONST. + + 2001-09-06 Franz Sirl + + * config/rs6000/rs6000.c (rs6000_emit_prologue): Fix DWARF2 register + number used for CR register. + + 2001-09-06 Alan Modra + + * config/rs6000/rs6000.c (mask_operand): Use signed vars to avoid + compiler warnings. + (mask64_operand): Likewise. + (includes_rldic_lshift_p): Likewise. + (includes_rldicr_lshift_p): Likewise. + + 2001-09-05 Alan Modra + + * config/rs6000/rs6000.c (mask_operand): Rewrite without + bit-shifting loop. + (mask64_operand): Likewise. + (rldic_operand): Delete. + (includes_lshift64_p): Delete. + (includes_rldic_lshift_p): New function. + (includes_rldicr_lshift_p): New function. + (print_operand): Don't call rldic_operand in case 'W'. + * config/rs6000/rs6000-protos.h (rldic_operand): Remove. + (includes_lshift64_p): Remove. + (includes_rldic_lshift_p): Declare. + (includes_rldicr_lshift_p): Declare. + * config/rs6000/rs6000.h (PREDICATE_CODES): Remove rldic_operand. + * config/rs6000/rs6000.md : + Replace match_operand rldic_operand predicate with + const_int_operand. Replace includes_lshift64_p condition with + includes_rldic_lshift_p. + : New. + + 2001-09-05 David S. Miller + + * config/sparc/linux.h: Set CPLUSPLUS_CPP_SPEC. + * config/sparc/linux64.h: Likewise. + + 2001-09-05 Andreas Jaeger + + * doc/invoke.texi (i386 Options): -mwide-multiply is not + available anymore, remove the documentation. + (i386 Options): Fix typo, cleanup index entries. + + 2001-09-05 Jakub Jelinek + + * stor-layout.c (layout_type) [ARRAY_TYPE]: Copy elements + TYPE_USER_ALIGN. + + * loop.c (express_from_1): Fix CONSTANT_P(a) case. + + 2001-09-04 Richard Henderson + + * unwind.h (_UA_END_OF_STACK): New flag. + * unwind.inc (_Unwind_ForcedUnwind_Phase2): Set it. + + Thu Aug 30 18:50:37 2001 J"orn Rennecke + + * t-h8300 (LIB1ASMFUNCS): Add _fixunssfdi and _fixunssfsi_asm. + (LIB2FUNCS_EXTRA): Define. + config/h8300/lib1funcs.asm: New part: L_fixunssfsi_asm . + config/h8300/fixunssfsi.c: New file. + + Thu Aug 30 16:00:31 2001 J"orn Rennecke + + * h8300.c (dosize): Fix test for "sub". + + 2001-08-29 Kazu Hirata + + * config/h8300/lib1funcs.asm: Update the copyright. Fix + comment typos. + + 2001-08-29 Kazu Hirata + + * config/h8300/h8300.md (anonymous movhi pattern): Don't move + (reg n) to (mem (pre_dec (reg n)). + (anonymous movsi pattern): Likewise. + + 2001-08-29 Kazu Hirata + + * config/h8300/h8300.h (RETURN_ADDR_RTX): New. + + 2001-08-29 Kazu Hirata + + * config/h8300/lib1funcs.asm: Fix comment typos. + + 2001-08-28 Richard Henderson + + * config/ia64/ia64.md (andcmbi3, iorcmbi3): Fix typos. + (one_cmplbi2 splitter): Remove redundant test. + + 2001-08-28 Danny Smith + + * config/i386/cygwin.h (BIGGEST_FIELD_ALIGNMENT): Set to 64. + + 2001-08-24 David Edelsohn + + * config/rs6000/rs6000.c (rs6000_initialize_trampoline): Function + descriptor members are pointer size, not constant 4. + + 2001-08-23 Neil Booth + + * cppmacro.c (enter_macro_context): Push macro expansions even + if empty. + + 2001-08-23 Kazu Hirata + + * config/h8300/h8300.md (zero_extendqihi2): Correct the insn + length. + 2001-08-19 Release Manager * GCC 3.0.1 Released. *************** *** 14,20 **** 2001-08-17 Gerald Pfeifer ! * doc/invoke.texi (Optimize Options): The default for -finline-limit is 600. 2001-08-16 Joel Sherrill --- 535,541 ---- 2001-08-17 Gerald Pfeifer ! * doc/invoke.texi (Optimize Options): The default for -finline-limit is 600. 2001-08-16 Joel Sherrill *************** *** 27,33 **** * config/s390/linux64.h (CPP_PREDEFINES): Define __s390__ also on 64-bit s390x targets. ! 2001-08-14 Gerald Pfeifer * doc/install.texi (Specific, avr): Fix markup. --- 548,554 ---- * config/s390/linux64.h (CPP_PREDEFINES): Define __s390__ also on 64-bit s390x targets. ! 2001-08-14 Gerald Pfeifer * doc/install.texi (Specific, avr): Fix markup. *************** *** 62,79 **** * doc/install.texi (Specific, c4x): Fix cross-reference to the main manual to work both for info and HTML versions. ! 2001-08-10 Ulrich Weigand - - * glimits.h (__LONG_MAX__): Add s390x as 64-bit architecture. ! * config/s390/s390.c (legitimize_pic_address): Don't generate unnecessary moves (to avoid confusing loop optimization). ! (check_and_change_labels): Replace jump_long by indirect_jump. ! (s390_final_chunkify): Don't start a new literal pool on section switch in 64-bit code. (s390_va_start, s390_va_arg): Fixed incorrect sizes for 64-bit. ! * config/s390/s390.h (HARD_REGNO_MODE_OK, RETURN_IN_MEMORY): Support complex integer modes correctly. (reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Remove CC_REGS. --- 583,600 ---- * doc/install.texi (Specific, c4x): Fix cross-reference to the main manual to work both for info and HTML versions. ! 2001-08-10 Ulrich Weigand ! * glimits.h (__LONG_MAX__): Add s390x as 64-bit architecture. ! ! * config/s390/s390.c (legitimize_pic_address): Don't generate unnecessary moves (to avoid confusing loop optimization). ! (check_and_change_labels): Replace jump_long by indirect_jump. ! (s390_final_chunkify): Don't start a new literal pool on section switch in 64-bit code. (s390_va_start, s390_va_arg): Fixed incorrect sizes for 64-bit. ! * config/s390/s390.h (HARD_REGNO_MODE_OK, RETURN_IN_MEMORY): Support complex integer modes correctly. (reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Remove CC_REGS. *************** *** 82,89 **** * config/s390/s390.md (divsi3, modsi3): Clobber low word of divmoddisi3 before shifting (to avoid confusing flow analysis). ! (cjump_long, icjump_long, jump_long, indirect_jump, casesi_jump): ! Never use "address_operand" without "p" or "memory_operand" without mode. (builtin_setjmp_setup, builtin_setjmp_receiver, builtin_longjmp): Fixed broken setjmp/longjmp handling. --- 603,610 ---- * config/s390/s390.md (divsi3, modsi3): Clobber low word of divmoddisi3 before shifting (to avoid confusing flow analysis). ! (cjump_long, icjump_long, jump_long, indirect_jump, casesi_jump): ! Never use "address_operand" without "p" or "memory_operand" without mode. (builtin_setjmp_setup, builtin_setjmp_receiver, builtin_longjmp): Fixed broken setjmp/longjmp handling. *************** *** 119,126 **** 2001-08-07 Daniel Jacobowitz ! * config.gcc: Quote target_cpu_default2 correctly for ! powerpc*-*-* targets. 2001-08-07 David Edelsohn --- 640,647 ---- 2001-08-07 Daniel Jacobowitz ! * config.gcc: Quote target_cpu_default2 correctly for ! powerpc*-*-* targets. 2001-08-07 David Edelsohn *************** *** 159,165 **** 2001-08-04 Stephane Carrez ! * config/m68hc11/m68hc11.md ("cmphi_1", "cmpqi_1"): Allow memory and soft register for operand 0. ("cmphi_z_used", "cmpqi_z_used"): Allow memory for operand 0. --- 680,686 ---- 2001-08-04 Stephane Carrez ! * config/m68hc11/m68hc11.md ("cmphi_1", "cmpqi_1"): Allow memory and soft register for operand 0. ("cmphi_z_used", "cmpqi_z_used"): Allow memory for operand 0. *************** *** 200,221 **** (DTORS_SECTION_FUNCTION): Likewise for __do_global_dtors. 2001-08-03 Ulrich Weigand ! ! * config.gcc (s390-*-linux*, s390x-*-linux*): Added. ! * doc/install.texi: Add s390 and s390x targets. ! * doc/invoke.texi: Add s390 and s390x target options. ! * doc/md.texi: Add s390 and s390x extra constraints. ! * config/s390/s390.c: New. Subroutines for code generation. ! * config/s390/s390.h: New. Definitions for S/390. ! * config/s390/s390-protos.h: New. Prototypes. ! * config/s390/linux.h: New. Definitions for Linux for S/390. ! * config/s390/linux64.h: New. Definitions for Linux for zSeries. ! * config/s390/t-linux: New. Makefile fragment. ! * config/s390/s390.md: New. Machine description for S/390 and zSeries. ! * config/s390/xm-390.h: New. Host definitions for S/390. ! * config/s390/xm-390x.h: New. Host definitions for zSeries. ! * config/s390/fixdfdi.h: New. Fix L_fix*di. ! 2001-08-03 Neil Booth * cpplex.c (parse_string): Warn once per string. --- 721,742 ---- (DTORS_SECTION_FUNCTION): Likewise for __do_global_dtors. 2001-08-03 Ulrich Weigand ! ! * config.gcc (s390-*-linux*, s390x-*-linux*): Added. ! * doc/install.texi: Add s390 and s390x targets. ! * doc/invoke.texi: Add s390 and s390x target options. ! * doc/md.texi: Add s390 and s390x extra constraints. ! * config/s390/s390.c: New. Subroutines for code generation. ! * config/s390/s390.h: New. Definitions for S/390. ! * config/s390/s390-protos.h: New. Prototypes. ! * config/s390/linux.h: New. Definitions for Linux for S/390. ! * config/s390/linux64.h: New. Definitions for Linux for zSeries. ! * config/s390/t-linux: New. Makefile fragment. ! * config/s390/s390.md: New. Machine description for S/390 and zSeries. ! * config/s390/xm-390.h: New. Host definitions for S/390. ! * config/s390/xm-390x.h: New. Host definitions for zSeries. ! * config/s390/fixdfdi.h: New. Fix L_fix*di. ! 2001-08-03 Neil Booth * cpplex.c (parse_string): Warn once per string. *************** *** 226,232 **** * doc/install.texi (Configuration): Fix markup. (Specific, i?86-*-udk): Likewise. (Specific, alpha*-dec-osf*): Warn against --with-gnu-as, ! --with-gnu-ld. Document --enable-threads and --enable-libgcj status. (Specific, mips-sgi-irix*): Canonicalize triples. (Specific, mips-sgi-irix5): Warn about problems with this config. --- 747,753 ---- * doc/install.texi (Configuration): Fix markup. (Specific, i?86-*-udk): Likewise. (Specific, alpha*-dec-osf*): Warn against --with-gnu-as, ! --with-gnu-ld. Document --enable-threads and --enable-libgcj status. (Specific, mips-sgi-irix*): Canonicalize triples. (Specific, mips-sgi-irix5): Warn about problems with this config. *************** *** 258,266 **** 2001-08-01 Hartmut Penner ! * varasm.c (decode_rtx_const): Allow unspec (symbol_ref) in constant pool to be identical by string address and index. ! 2001-08-01 Gerald Pfeifer * params.def (PARAM_MAX_INLINE_INSNS): Change default to 600. --- 779,787 ---- 2001-08-01 Hartmut Penner ! * varasm.c (decode_rtx_const): Allow unspec (symbol_ref) in constant pool to be identical by string address and index. ! 2001-08-01 Gerald Pfeifer * params.def (PARAM_MAX_INLINE_INSNS): Change default to 600. diff -Nrc3pad gcc-3.0.1/gcc/Makefile.in gcc-3.0.2/gcc/Makefile.in *** gcc-3.0.1/gcc/Makefile.in Wed Aug 8 19:26:11 2001 --- gcc-3.0.2/gcc/Makefile.in Thu Oct 4 15:59:02 2001 *************** fixinc.sh: $(FIXINCSRCDIR)/mkfixinc.sh $ *** 2157,2163 **** $(FIXINCSRCDIR)/server.c $(FIXINCSRCDIR)/gnu-regex.h \ $(FIXINCSRCDIR)/server.h $(FIXINCSRCDIR)/inclhack.def specs.ready (MAKE="$(MAKE)"; srcdir=`cd $(srcdir)/fixinc && pwd` ; \ ! CC="$(CC)"; CFLAGS="$(CFLAGS)"; LDFLAGS="$(LDFLAGS)"; \ WARN_CFLAGS="$(WARN_CFLAGS)"; \ export MAKE srcdir CC CFLAGS LDFLAGS WARN_CFLAGS; cd ./fixinc && \ $(SHELL) $${srcdir}/mkfixinc.sh $(build_canonical) $(target)) --- 2157,2163 ---- $(FIXINCSRCDIR)/server.c $(FIXINCSRCDIR)/gnu-regex.h \ $(FIXINCSRCDIR)/server.h $(FIXINCSRCDIR)/inclhack.def specs.ready (MAKE="$(MAKE)"; srcdir=`cd $(srcdir)/fixinc && pwd` ; \ ! CC="$(HOST_CC)"; CFLAGS="$(HOST_CFLAGS)"; LDFLAGS="$(HOST_LDFLAGS)"; \ WARN_CFLAGS="$(WARN_CFLAGS)"; \ export MAKE srcdir CC CFLAGS LDFLAGS WARN_CFLAGS; cd ./fixinc && \ $(SHELL) $${srcdir}/mkfixinc.sh $(build_canonical) $(target)) diff -Nrc3pad gcc-3.0.1/gcc/NEWS gcc-3.0.2/gcc/NEWS *** gcc-3.0.1/gcc/NEWS Sun Aug 19 17:45:13 2001 --- gcc-3.0.2/gcc/NEWS Tue Oct 23 10:56:23 2001 *************** on the line of development that led to G *** 7,26 **** ====================================================================== http://gcc.gnu.org/gcc-3.0/gcc-3.0.html ! GCC 3.0 ! June 18, 2001 The [1]GNU project and the GCC developers are pleased to announce the ! release of GCC version 3.0. GCC used to stand for the GNU C Compiler, but since the compiler supports several other languages aside from C, it now stands for the GNU Compiler Collection. ! GCC 3.0 has several new optimizations, new targets, new languages and ! many other new features. See the [2]new features page for a more ! complete list. A list of [3]successful builds is updated as new information becomes available. --- 7,30 ---- ====================================================================== http://gcc.gnu.org/gcc-3.0/gcc-3.0.html ! June 18, 2001: GCC 3.0 has been released. ! _________________________________________________________________ ! ! GCC 3.0.1 ! August 20, 2001 The [1]GNU project and the GCC developers are pleased to announce the ! release of GCC 3.0.1, which is a bug-fix release following GCC 3.0 ! released on June 18, 2001. GCC used to stand for the GNU C Compiler, but since the compiler supports several other languages aside from C, it now stands for the GNU Compiler Collection. ! GCC 3.0.x has several new optimizations, new targets, new languages ! and many other new features, relative to GCC 2.95.x. See the [2]new ! features page for a more complete list. A list of [3]successful builds is updated as new information becomes available. *************** http://gcc.gnu.org/gcc-3.0/gcc-3.0.html *** 30,36 **** [4]amazing group of volunteers is what makes GCC successful. And finally, we can't in good conscience fail to mention some ! [5]caveats to using GCC 3.0. For additional information about GCC please refer to the [6]GCC project web site or contact the [7]GCC development mailing list. --- 34,40 ---- [4]amazing group of volunteers is what makes GCC successful. And finally, we can't in good conscience fail to mention some ! [5]caveats to using GCC 3.0.x. For additional information about GCC please refer to the [6]GCC project web site or contact the [7]GCC development mailing list. *************** http://gcc.gnu.org/gcc-3.0/gcc-3.0.html *** 49,55 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 53,59 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/gcc-3.0/features.html *** 133,151 **** + HPUX 11 support contributed. + Improved PowerPC code generation, including scheduled prologue and epilogue. ! + Port of gcc to Intel's IA-64 processor contributed. ! + Port of gcc to Motorola's MCore 210 and 340 contributed. + New unified back-end for Arm, Thumb and StrongArm contributed. ! + Port of gcc to Intel's XScale processor contributed. ! + Port of gcc to Atmel's AVR microcontrollers contributed. ! + Port of gcc to Mitsubishi's D30V processor contributed. ! + Port of gcc to Matsushita's AM33 processor (a member of the MN10300 processor family) contributed. ! + Port of gcc to Fujitsu's FR30 processor contributed. ! + Port of gcc to Motorola's 68HC11 and 68HC12 processors contributed. ! + Port of gcc to Sun's picoJava processor core contributed. * Documentation improvements: + Substantially rewritten and improved C preprocessor manual. + Many improvements to other documentation. --- 137,155 ---- + HPUX 11 support contributed. + Improved PowerPC code generation, including scheduled prologue and epilogue. ! + Port of GCC to Intel's IA-64 processor contributed. ! + Port of GCC to Motorola's MCore 210 and 340 contributed. + New unified back-end for Arm, Thumb and StrongArm contributed. ! + Port of GCC to Intel's XScale processor contributed. ! + Port of GCC to Atmel's AVR microcontrollers contributed. ! + Port of GCC to Mitsubishi's D30V processor contributed. ! + Port of GCC to Matsushita's AM33 processor (a member of the MN10300 processor family) contributed. ! + Port of GCC to Fujitsu's FR30 processor contributed. ! + Port of GCC to Motorola's 68HC11 and 68HC12 processors contributed. ! + Port of GCC to Sun's picoJava processor core contributed. * Documentation improvements: + Substantially rewritten and improved C preprocessor manual. + Many improvements to other documentation. *************** http://gcc.gnu.org/gcc-3.0/features.html *** 183,188 **** --- 187,200 ---- and -falign-jumps. * Plus a great many bugfixes and almost all the [12]features found in GCC 2.95. + * Additional changes in GCC 3.0.1 + + C++ fixes for incorrect code-generation. + + Improved cross-compiling support for the C++ standard + library. + + Fixes for some embedded targets that worked in GCC 2.95.3, + but not in GCC 3.0. + + Fixes for various exception-handling bugs. + + A port to the S/390 architecture. _________________________________________________________________ *************** http://gcc.gnu.org/gcc-3.0/features.html *** 195,201 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 207,213 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/gcc-3.0/caveats.html *** 260,266 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 272,278 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/gcc-2.95/gcc-2.95.3.h *** 353,359 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 365,371 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 361,367 **** 2. http://gcc.gnu.org/gcc-2.95/regress.html 3. http://gcc.gnu.org/gcc-2.95/othertest.html 4. http://gcc.gnu.org/gcc-2.95/features.html ! 5. http://gcc.gnu.org/install/index.html 6. http://gcc.gnu.org/gcc-2.95/buildstat.html 7. http://gcc.gnu.org/thanks.html 8. http://gcc.gnu.org/gcc-2.95/caveats.html --- 373,379 ---- 2. http://gcc.gnu.org/gcc-2.95/regress.html 3. http://gcc.gnu.org/gcc-2.95/othertest.html 4. http://gcc.gnu.org/gcc-2.95/features.html ! 5. http://gcc.gnu.org/install/ 6. http://gcc.gnu.org/gcc-2.95/buildstat.html 7. http://gcc.gnu.org/thanks.html 8. http://gcc.gnu.org/gcc-2.95/caveats.html *************** http://gcc.gnu.org/gcc-2.95/gcc-2.95.2.h *** 513,519 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 525,531 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/gcc-2.95/gcc-2.95.1.h *** 628,637 **** [7]caveats to using GCC 2.95.1. Download GCC 2.95.1 from the [8]GNU FTP server (ftp://ftp.gnu.org) ! Download GCC 2.95.1 from the [9]GCC/EGCS FTP server ! (ftp://go.cygnus.com) [10]Find a GNU mirror site ! [11]Find a GCC/EGCS mirror site For additional information about GCC please see the [12]GCC project web server or contact the [13]GCC development mailing list. --- 640,648 ---- [7]caveats to using GCC 2.95.1. Download GCC 2.95.1 from the [8]GNU FTP server (ftp://ftp.gnu.org) ! Download GCC 2.95.1 from the [9]GCC FTP server [10]Find a GNU mirror site ! [11]Find a GCC mirror site For additional information about GCC please see the [12]GCC project web server or contact the [13]GCC development mailing list. *************** http://gcc.gnu.org/gcc-2.95/gcc-2.95.1.h *** 647,653 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 658,664 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 659,665 **** 6. http://gcc.gnu.org/thanks.html 7. http://gcc.gnu.org/gcc-2.95/caveats.html 8. ftp://ftp.gnu.org/pub/gnu/gcc/ ! 9. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html 10. http://www.gnu.org/order/ftp.html 11. http://gcc.gnu.org/mirrors.html 12. http://gcc.gnu.org/index.html --- 670,676 ---- 6. http://gcc.gnu.org/thanks.html 7. http://gcc.gnu.org/gcc-2.95/caveats.html 8. ftp://ftp.gnu.org/pub/gnu/gcc/ ! 9. ftp://gcc.gnu.org/pub/gcc/releases/index.html 10. http://www.gnu.org/order/ftp.html 11. http://gcc.gnu.org/mirrors.html 12. http://gcc.gnu.org/index.html *************** http://gcc.gnu.org/gcc-2.95/gcc-2.95.htm *** 726,732 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 737,743 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/gcc-2.95/features.htm *** 770,776 **** * New Languages and Language specific improvements + [9]Many C++ improvements. + [10]Many Fortran improvements. ! + [11]Java front-end has been integrated. A [12]runtime library is available separately. + [13]ISO C99 support + [14]Chill front-end and runtime has been integrated. --- 781,787 ---- * New Languages and Language specific improvements + [9]Many C++ improvements. + [10]Many Fortran improvements. ! + [11]Java front-end has been integrated. [12]runtime library is available separately. + [13]ISO C99 support + [14]Chill front-end and runtime has been integrated. *************** http://gcc.gnu.org/gcc-2.95/features.htm *** 827,833 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 838,844 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 841,847 **** 8. http://gcc.gnu.org/fom_serv/cache/24.html 9. http://gcc.gnu.org/gcc-2.95/c++features.html 10. http://gcc.gnu.org/onlinedocs/g77_news.html ! 11. http://sources.redhat.com/java/gcj-announce.txt 12. http://gcc.gnu.org/news/javaannounce.html 13. http://gcc.gnu.org/c99status.html 14. http://gcc.gnu.org/news/chill.html --- 852,858 ---- 8. http://gcc.gnu.org/fom_serv/cache/24.html 9. http://gcc.gnu.org/gcc-2.95/c++features.html 10. http://gcc.gnu.org/onlinedocs/g77_news.html ! 11. http://gcc.gnu.org/java/gcj-announce.txt 12. http://gcc.gnu.org/news/javaannounce.html 13. http://gcc.gnu.org/c99status.html 14. http://gcc.gnu.org/news/chill.html *************** http://gcc.gnu.org/gcc-2.95/caveats.html *** 909,915 **** Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-08-19. References --- 920,926 ---- Suite 330, Boston, MA 02111, USA. Verbatim copying and distribution of this entire article is permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** http://gcc.gnu.org/egcs-1.1/egcs-1.1.2.h *** 1045,1060 **** group of volunteers is what makes EGCS successful. And finally, we can't in good conscience fail to mention some ! [5]caveats to using EGCS 1.1.2. [6]Download EGCS 1.1.2 from ! egcs.cygnus.com (USA California) --> ! [7]Download EGCS 1.1.2 from go.cygnus.com (USA California - High speed ! link provided by Stanford) ! The EGCS 1.1.2 release is also available on many [8]mirror sites. _________________________________________________________________ ! Last modified on July 28, 1999. References --- 1056,1080 ---- group of volunteers is what makes EGCS successful. And finally, we can't in good conscience fail to mention some ! [5]caveats to using EGCS 1.1.2. ! Download EGCS from egcs.cygnus.com (USA California) ! . ! The EGCS 1.1.2 release is also available on many [6]mirror sites. _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1063,1071 **** 3. http://gcc.gnu.org/egcs-1.1/buildstat.html 4. http://gcc.gnu.org/thanks.html 5. http://gcc.gnu.org/egcs-1.1/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 8. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.1/egcs-1.1.1.html --- 1083,1094 ---- 3. http://gcc.gnu.org/egcs-1.1/buildstat.html 4. http://gcc.gnu.org/thanks.html 5. http://gcc.gnu.org/egcs-1.1/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.1/egcs-1.1.1.html *************** http://gcc.gnu.org/egcs-1.1/egcs-1.1.1.h *** 1162,1174 **** And finally, we can't in good conscience fail to mention some [5]caveats to using EGCS 1.1.1. ! [6]Download EGCS 1.1.1 from egcs.cygnus.com (USA California) The EGCS 1.1.1 release is also available on many mirror sites. ! [7]Goto mirror list to find a closer site _________________________________________________________________ ! Last modified on July 28, 1999. References --- 1185,1208 ---- And finally, we can't in good conscience fail to mention some [5]caveats to using EGCS 1.1.1. ! Download EGCS from egcs.cygnus.com (USA California) ! . The EGCS 1.1.1 release is also available on many mirror sites. ! [6]Goto mirror list to find a closer site _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1177,1184 **** 3. http://gcc.gnu.org/egcs-1.1/buildstat.html 4. http://gcc.gnu.org/thanks.html 5. http://gcc.gnu.org/egcs-1.1/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.1/egcs-1.1.html --- 1211,1222 ---- 3. http://gcc.gnu.org/egcs-1.1/buildstat.html 4. http://gcc.gnu.org/thanks.html 5. http://gcc.gnu.org/egcs-1.1/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.1/egcs-1.1.html *************** http://gcc.gnu.org/egcs-1.1/egcs-1.1.htm *** 1210,1244 **** * Fixes for the /tmp symlink race security problems. * New targets including mips16, arm-thumb and 64 bit PowerPC. * Improvements to GNU Fortran (g77) compiler and runtime library ! made since [5]g77 version 0.5.23. ! See the [6]new features page for a more complete list of new features found in EGCS 1.1 releases. The EGCS 1.1 release includes installation instructions in both HTML and plaintext forms (see the INSTALL directory in the toplevel directory of the EGCS 1.1 distribution). However, we also keep the ! most up to date [7]installation instructions and [8]build/test status on our web page. We will update those pages as new information becomes available. The EGCS project would like to thank the numerous people that have ! contributed new features, test results, bugfixes, etc. This [9]amazing group of volunteers is what makes EGCS successful. And finally, we can't in good conscience fail to mention some ! [10]caveats to using EGCS 1.1. ! ! [11]Download EGCS 1.1 from egcs.cygnus.com (USA California) ! [12]Download EGCS 1.1 from go.cygnus.com (USA California -- High speed ! link provided by Stanford) The EGCS 1.1 release is also available on many mirror sites. ! [13]Goto mirror list to find a closer site _________________________________________________________________ ! Last modified on September 4, 1999. References --- 1248,1290 ---- * Fixes for the /tmp symlink race security problems. * New targets including mips16, arm-thumb and 64 bit PowerPC. * Improvements to GNU Fortran (g77) compiler and runtime library ! made since g77 version 0.5.23. ! See the [5]new features page for a more complete list of new features found in EGCS 1.1 releases. The EGCS 1.1 release includes installation instructions in both HTML and plaintext forms (see the INSTALL directory in the toplevel directory of the EGCS 1.1 distribution). However, we also keep the ! most up to date [6]installation instructions and [7]build/test status on our web page. We will update those pages as new information becomes available. The EGCS project would like to thank the numerous people that have ! contributed new features, test results, bugfixes, etc. This [8]amazing group of volunteers is what makes EGCS successful. And finally, we can't in good conscience fail to mention some ! [9]caveats to using EGCS 1.1. ! Download EGCS from egcs.cygnus.com (USA California) ! . The EGCS 1.1 release is also available on many mirror sites. ! [10]Goto mirror list to find a closer site _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [11]gnu@gnu.org. ! There are also [12]other ways to contact the FSF. ! These pages are maintained by [13]The GCC team. ! Please send comments on these web pages and GCC to ! [14]gcc@gcc.gnu.org, send other questions to [15]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1246,1260 **** 2. http://gcc.gnu.org/news/gcse.html 3. http://gcc.gnu.org/news/alias.html 4. http://gcc.gnu.org/egcs-1.1/c++features.html ! 5. http://gcc.gnu.org/onlinedocs/g77_news.html ! 6. http://gcc.gnu.org/egcs-1.1/features.html ! 7. http://gcc.gnu.org/install/index.html ! 8. http://gcc.gnu.org/egcs-1.1/buildstat.html ! 9. http://gcc.gnu.org/thanks.html ! 10. http://gcc.gnu.org/egcs-1.1/caveats.html ! 11. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 12. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 13. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.1/features.html --- 1292,1308 ---- 2. http://gcc.gnu.org/news/gcse.html 3. http://gcc.gnu.org/news/alias.html 4. http://gcc.gnu.org/egcs-1.1/c++features.html ! 5. http://gcc.gnu.org/egcs-1.1/features.html ! 6. http://gcc.gnu.org/install/index.html ! 7. http://gcc.gnu.org/egcs-1.1/buildstat.html ! 8. http://gcc.gnu.org/thanks.html ! 9. http://gcc.gnu.org/egcs-1.1/caveats.html ! 10. http://gcc.gnu.org/mirrors.html ! 11. mailto:gnu@gnu.org ! 12. http://www.gnu.org/home.html#ContactInfo ! 13. http://gcc.gnu.org/about.html ! 14. mailto:gcc@gcc.gnu.org ! 15. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.1/features.html *************** http://gcc.gnu.org/egcs-1.1/features.htm *** 1323,1332 **** + M68k has many micro-optimizations and Coldfire fixes. * Core compiler is based on the GCC development tree from June 9, 1998, so we have all of the [5]features found in GCC 2.8. ! ! [6]Return to the EGCS home page ! Last modified: September 4, 1999 References --- 1371,1389 ---- + M68k has many micro-optimizations and Coldfire fixes. * Core compiler is based on the GCC development tree from June 9, 1998, so we have all of the [5]features found in GCC 2.8. ! _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [6]gnu@gnu.org. There ! are also [7]other ways to contact the FSF. ! These pages are maintained by [8]The GCC team. ! Please send comments on these web pages and GCC to ! [9]gcc@gcc.gnu.org, send other questions to [10]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1335,1341 **** 3. http://gcc.gnu.org/news/gcse.html 4. http://gcc.gnu.org/news/alias.html 5. http://gcc.gnu.org/egcs-1.0/features-2.8.html ! 6. http://gcc.gnu.org/index.html ====================================================================== http://gcc.gnu.org/egcs-1.1/caveats.html --- 1392,1402 ---- 3. http://gcc.gnu.org/news/gcse.html 4. http://gcc.gnu.org/news/alias.html 5. http://gcc.gnu.org/egcs-1.0/features-2.8.html ! 6. mailto:gnu@gnu.org ! 7. http://www.gnu.org/home.html#ContactInfo ! 8. http://gcc.gnu.org/about.html ! 9. mailto:gcc@gcc.gnu.org ! 10. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.1/caveats.html *************** http://gcc.gnu.org/egcs-1.1/caveats.html *** 1343,1350 **** * EGCS has an integrated libstdc++, but does not have an integrated libg++. Furthermore old libg++ releases will not work with EGCS; ! HJ Lu has made a [1]libg++ snapshot available which may work with ! EGCS. Note most C++ programs only need libstdc++. * Exception handling may not work with shared libraries, particularly on alphas, hppas, rs6000/powerpc and mips based --- 1404,1411 ---- * EGCS has an integrated libstdc++, but does not have an integrated libg++. Furthermore old libg++ releases will not work with EGCS; ! HJ Lu has made a libg++-2.8.1.2 snapshot available which may work ! with EGCS. Note most C++ programs only need libstdc++. * Exception handling may not work with shared libraries, particularly on alphas, hppas, rs6000/powerpc and mips based *************** http://gcc.gnu.org/egcs-1.1/caveats.html *** 1352,1358 **** platforms with shared libraries. * Some versions of the Linux kernel have bugs which prevent them from being compiled or from running when compiled by EGCS. See ! [2]the FAQ for additional information. * In general, EGCS is more rigorous about rejecting invalid C++ code or deprecated C++ constructs than g++-2.7, g++-2.8 or EGCS 1.0. As a result it may be necessary to fix C++ code before it will --- 1413,1419 ---- platforms with shared libraries. * Some versions of the Linux kernel have bugs which prevent them from being compiled or from running when compiled by EGCS. See ! [1]the FAQ for additional information. * In general, EGCS is more rigorous about rejecting invalid C++ code or deprecated C++ constructs than g++-2.7, g++-2.8 or EGCS 1.0. As a result it may be necessary to fix C++ code before it will *************** http://gcc.gnu.org/egcs-1.1/caveats.html *** 1363,1378 **** * EGCS 1.1 compiled C++ code is not binary compatible with EGCS 1.0.x or GCC 2.8.x due to changes necessary to support thread safe exception handling. ! ! [3]Return to the GCC home page ! Last modified: July 28, 1999 References ! 1. ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1.2.tar.gz ! 2. http://gcc.gnu.org/fom_serv/cache/24.html ! 3. http://gcc.gnu.org/index.html ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.3.html --- 1424,1451 ---- * EGCS 1.1 compiled C++ code is not binary compatible with EGCS 1.0.x or GCC 2.8.x due to changes necessary to support thread safe exception handling. ! _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [2]gnu@gnu.org. There ! are also [3]other ways to contact the FSF. ! These pages are maintained by [4]The GCC team. ! Please send comments on these web pages and GCC to ! [5]gcc@gcc.gnu.org, send other questions to [6]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References ! 1. http://gcc.gnu.org/fom_serv/cache/24.html ! 2. mailto:gnu@gnu.org ! 3. http://www.gnu.org/home.html#ContactInfo ! 4. http://gcc.gnu.org/about.html ! 5. mailto:gcc@gcc.gnu.org ! 6. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.3.html *************** http://gcc.gnu.org/egcs-1.0/egcs-1.0.3.h *** 1439,1458 **** Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! [6]Download EGCS 1.0.3 from ftp.cygnus.com (USA California) ! ! [7]Download EGCS 1.0.3 from go.cygnus.com (USA California -- High ! speed link provided by Stanford) The EGCS 1.0.3 release is also available on many mirror sites. ! [8]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! Last modified on February 22, 1999. References --- 1512,1539 ---- Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! Download EGCS from ftp.cygnus.com (USA California) or go.cygnus.com ! (USA California -- High speed link provided by Stanford). The EGCS 1.0.3 release is also available on many mirror sites. ! [6]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1461,1469 **** 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 8. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.2.html --- 1542,1553 ---- 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.2.html *************** http://gcc.gnu.org/egcs-1.0/egcs-1.0.2.h *** 1561,1580 **** Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! [6]Download EGCS 1.0.2 from ftp.cygnus.com (USA California) ! ! [7]Download EGCS 1.0.2 from go.cygnus.com (USA California -- High ! speed link provided by Stanford) The EGCS 1.0.2 release is also available on many mirror sites. ! [8]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! Last modified on July 28, 1999. References --- 1645,1672 ---- Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! Download EGCS from ftp.cygnus.com (USA California) or go.cygnus.com ! (USA California -- High speed link provided by Stanford). The EGCS 1.0.2 release is also available on many mirror sites. ! [6]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1583,1591 **** 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 8. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.1.html --- 1675,1686 ---- 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.1.html *************** http://gcc.gnu.org/egcs-1.0/egcs-1.0.1.h *** 1683,1702 **** Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! [6]Download EGCS 1.0.1 from ftp.cygnus.com (USA California) ! ! [7]Download EGCS 1.0.1 from go.cygnus.com (USA California -- High ! speed link provided by Stanford) The EGCS 1.0.1 release is also available on many mirror sites. ! [8]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! Last modified on July 28, 1999. References --- 1778,1805 ---- Update: Big thanks to Stanford for providing a high speed link for downloading EGCS (go.cygnus.com)! ! Download EGCS from ftp.cygnus.com (USA California) or go.cygnus.com ! (USA California -- High speed link provided by Stanford). The EGCS 1.0.1 release is also available on many mirror sites. ! [6]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1705,1713 **** 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 8. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.html --- 1808,1819 ---- 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/egcs-1.0.html *************** http://gcc.gnu.org/egcs-1.0/egcs-1.0.htm *** 1760,1781 **** world. Update: Big thanks to Stanford for providing a high speed link for ! downloading EGCS! (go.cygnus.com) ! ! [6]Download EGCS 1.0 from ftp.cygnus.com (USA California) ! [7]Download EGCS 1.0 from go.cygnus.com (USA California -- High speed ! link provided by Stanford) The EGCS 1.0 release should be available on most mirror sites by now. ! [8]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! Last modified on July 28, 1999. References --- 1866,1895 ---- world. Update: Big thanks to Stanford for providing a high speed link for ! downloading EGCS (go.cygnus.com)! ! Download EGCS from ftp.cygnus.com (USA California) or go.cygnus.com ! (USA California -- High speed link provided by Stanford). The EGCS 1.0 release should be available on most mirror sites by now. ! [6]Goto mirror list to find a closer site We'd like to thank the numerous people that have contributed new features, test results, bugfixes, etc. Unfortunately, they're far too numerous to mention by name. _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [7]gnu@gnu.org. There ! are also [8]other ways to contact the FSF. ! These pages are maintained by [9]The GCC team. ! Please send comments on these web pages and GCC to ! [10]gcc@gcc.gnu.org, send other questions to [11]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References *************** References *** 1784,1792 **** 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. ftp://egcs.cygnus.com/pub/egcs/releases/index.html ! 7. ftp://go.cygnus.com/pub/sourceware.cygnus.com/pub/egcs/releases/index.html ! 8. http://gcc.gnu.org/mirrors.html ====================================================================== http://gcc.gnu.org/egcs-1.0/features.html --- 1898,1909 ---- 3. http://gcc.gnu.org/install/index.html 4. http://gcc.gnu.org/egcs-1.0/buildstat.html 5. http://gcc.gnu.org/egcs-1.0/caveats.html ! 6. http://gcc.gnu.org/mirrors.html ! 7. mailto:gnu@gnu.org ! 8. http://www.gnu.org/home.html#ContactInfo ! 9. http://gcc.gnu.org/about.html ! 10. mailto:gcc@gcc.gnu.org ! 11. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/features.html *************** http://gcc.gnu.org/egcs-1.0/features.htm *** 1827,1842 **** new template code makes repo obsolete for ELF systems using gnu-ld such as Linux. * Plus the usual assortment of bugfixes and improvements. ! ! [3]Return to the egcs home page ! Last modified: July 28, 1999 References 1. http://gcc.gnu.org/egcs-1.0/features-2.8.html 2. http://gcc.gnu.org/egcs-1.0/c++features.html ! 3. http://gcc.gnu.org/index.html ====================================================================== http://gcc.gnu.org/egcs-1.0/caveats.html --- 1944,1972 ---- new template code makes repo obsolete for ELF systems using gnu-ld such as Linux. * Plus the usual assortment of bugfixes and improvements. ! _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [3]gnu@gnu.org. There ! are also [4]other ways to contact the FSF. ! These pages are maintained by [5]The GCC team. ! Please send comments on these web pages and GCC to ! [6]gcc@gcc.gnu.org, send other questions to [7]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References 1. http://gcc.gnu.org/egcs-1.0/features-2.8.html 2. http://gcc.gnu.org/egcs-1.0/c++features.html ! 3. mailto:gnu@gnu.org ! 4. http://www.gnu.org/home.html#ContactInfo ! 5. http://gcc.gnu.org/about.html ! 6. mailto:gcc@gcc.gnu.org ! 7. mailto:gnu@gnu.org ====================================================================== http://gcc.gnu.org/egcs-1.0/caveats.html *************** http://gcc.gnu.org/egcs-1.0/caveats.html *** 1844,1851 **** * EGCS has an integrated libstdc++, but does not have an integrated libg++. Furthermore old libg++ releases will not work with egc; HJ ! Lu has made a [1]libg++ snapshot available which may work with ! EGCS. Note most C++ programs only need libstdc++. * Note that using -pedantic or -Wreturn-type can cause an explosion in the amount of memory needed for template-heavy C++ code, such --- 1974,1980 ---- * EGCS has an integrated libstdc++, but does not have an integrated libg++. Furthermore old libg++ releases will not work with egc; HJ ! Lu has made a libg++-2.8.1.2 available which may work with EGCS. Note most C++ programs only need libstdc++. * Note that using -pedantic or -Wreturn-type can cause an explosion in the amount of memory needed for template-heavy C++ code, such *************** http://gcc.gnu.org/egcs-1.0/caveats.html *** 1858,1864 **** libraries. * Some versions of the Linux kernel have bugs which prevent them from being compiled or from running when compiled by EGCS. See ! [2]the FAQ for additional information. * In general, EGCS is more rigorous about rejecting invalid C++ code or deprecated C++ constructs than G++ 2.7. As a result it may be necessary to fix C++ code before it will compile with EGCS. --- 1987,1993 ---- libraries. * Some versions of the Linux kernel have bugs which prevent them from being compiled or from running when compiled by EGCS. See ! [1]the FAQ for additional information. * In general, EGCS is more rigorous about rejecting invalid C++ code or deprecated C++ constructs than G++ 2.7. As a result it may be necessary to fix C++ code before it will compile with EGCS. *************** http://gcc.gnu.org/egcs-1.0/caveats.html *** 1867,1880 **** compilers and older versions of G++) may no longer be accepted. * EGCS 1.0 may not work with Red Hat Linux 5.0 on all targets. EGCS 1.0.x and later releases should work with Red Hat Linux 5.0. ! ! [3]Return to the GCC home page ! Last modified: August 27, 1998 References ! 1. ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1.2.tar.gz ! 2. http://gcc.gnu.org/fom_serv/cache/24.html ! 3. http://gcc.gnu.org/index.html ====================================================================== --- 1996,2021 ---- compilers and older versions of G++) may no longer be accepted. * EGCS 1.0 may not work with Red Hat Linux 5.0 on all targets. EGCS 1.0.x and later releases should work with Red Hat Linux 5.0. ! _________________________________________________________________ ! ! Please send FSF & GNU inquiries & questions to [2]gnu@gnu.org. There ! are also [3]other ways to contact the FSF. ! These pages are maintained by [4]The GCC team. ! Please send comments on these web pages and GCC to ! [5]gcc@gcc.gnu.org, send other questions to [6]gnu@gnu.org. ! Copyright (C) Free Software Foundation, Inc., 59 Temple Place - ! Suite 330, Boston, MA 02111, USA. ! Verbatim copying and distribution of this entire article is ! permitted in any medium, provided this notice is preserved. ! Last modified 2001-10-18. References ! 1. http://gcc.gnu.org/fom_serv/cache/24.html ! 2. mailto:gnu@gnu.org ! 3. http://www.gnu.org/home.html#ContactInfo ! 4. http://gcc.gnu.org/about.html ! 5. mailto:gcc@gcc.gnu.org ! 6. mailto:gnu@gnu.org ====================================================================== diff -Nrc3pad gcc-3.0.1/gcc/alias.c gcc-3.0.2/gcc/alias.c *** gcc-3.0.1/gcc/alias.c Sat May 12 13:32:21 2001 --- gcc-3.0.2/gcc/alias.c Tue Sep 11 14:39:24 2001 *************** record_base_value (regno, val, invariant *** 937,942 **** --- 937,957 ---- reg_base_value[regno] = find_base_value (val); } + /* Clear alias info for a register. This is used if an RTL transformation + changes the value of a register. This is used in flow by AUTO_INC_DEC + optimizations. We don't need to clear reg_base_value, since flow only + changes the offset. */ + + void + clear_reg_alias_info (reg) + rtx reg; + { + unsigned int regno = REGNO (reg); + + if (regno < reg_known_value_size && regno >= FIRST_PSEUDO_REGISTER) + reg_known_value[regno] = reg; + } + /* Returns a canonical version of X, from the point of view alias analysis. (For example, if X is a MEM whose address is a register, and the register has a known value (say a SYMBOL_REF), then a MEM diff -Nrc3pad gcc-3.0.1/gcc/c-parse.c gcc-3.0.2/gcc/c-parse.c *** gcc-3.0.1/gcc/c-parse.c Sun Aug 19 17:53:44 2001 --- gcc-3.0.2/gcc/c-parse.c Tue Oct 23 10:57:23 2001 *************** *** 1,7 **** /* A Bison parser, made from c-parse.y ! by GNU Bison version 1.27 ! */ #define YYBISON 1 /* Identify Bison output. */ --- 1,6 ---- /* A Bison parser, made from c-parse.y ! by GNU Bison version 1.28 */ #define YYBISON 1 /* Identify Bison output. */ *************** static const short yycheck[] = { 38, *** 1315,1321 **** }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/lib/bison.simple" ! /* This file comes from bison-1.27. */ /* Skeleton output parser for bison, Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. --- 1314,1320 ---- }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/lib/bison.simple" ! /* This file comes from bison-1.28. */ /* Skeleton output parser for bison, Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. *************** __yy_memcpy (char *to, char *from, unsig *** 1528,1534 **** #endif #endif ! #line 216 "/usr/lib/bison.simple" /* The user can define YYPARSE_PARAM as the name of an argument to be passed into yyparse. The argument should have type void *. --- 1527,1533 ---- #endif #endif ! #line 217 "/usr/lib/bison.simple" /* The user can define YYPARSE_PARAM as the name of an argument to be passed into yyparse. The argument should have type void *. *************** case 425: *** 3730,3736 **** break;} } /* the action file gets copied in in place of this dollarsign */ ! #line 542 "/usr/lib/bison.simple" yyvsp -= yylen; yyssp -= yylen; --- 3729,3735 ---- break;} } /* the action file gets copied in in place of this dollarsign */ ! #line 543 "/usr/lib/bison.simple" yyvsp -= yylen; yyssp -= yylen; diff -Nrc3pad gcc-3.0.1/gcc/c-typeck.c gcc-3.0.2/gcc/c-typeck.c *** gcc-3.0.1/gcc/c-typeck.c Tue Jun 12 05:19:55 2001 --- gcc-3.0.2/gcc/c-typeck.c Mon Sep 17 12:56:35 2001 *************** comptypes (type1, type2) *** 508,513 **** --- 508,515 ---- { tree d1 = TYPE_DOMAIN (t1); tree d2 = TYPE_DOMAIN (t2); + bool d1_variable, d2_variable; + bool d1_zero, d2_zero; val = 1; /* Target types must match incl. qualifiers. */ *************** comptypes (type1, type2) *** 516,529 **** return 0; /* Sizes must match unless one is missing or variable. */ ! if (d1 == 0 || d2 == 0 || d1 == d2 ! || TREE_CODE (TYPE_MIN_VALUE (d1)) != INTEGER_CST ! || TREE_CODE (TYPE_MIN_VALUE (d2)) != INTEGER_CST ! || TREE_CODE (TYPE_MAX_VALUE (d1)) != INTEGER_CST ! || TREE_CODE (TYPE_MAX_VALUE (d2)) != INTEGER_CST) break; ! if (! tree_int_cst_equal (TYPE_MIN_VALUE (d1), TYPE_MIN_VALUE (d2)) || ! tree_int_cst_equal (TYPE_MAX_VALUE (d1), TYPE_MAX_VALUE (d2))) val = 0; --- 518,542 ---- return 0; /* Sizes must match unless one is missing or variable. */ ! if (d1 == 0 || d2 == 0 || d1 == d2) break; ! d1_zero = ! TYPE_MAX_VALUE (d1); ! d2_zero = ! TYPE_MAX_VALUE (d2); ! ! d1_variable = (! d1_zero ! && (TREE_CODE (TYPE_MIN_VALUE (d1)) != INTEGER_CST ! || TREE_CODE (TYPE_MAX_VALUE (d1)) != INTEGER_CST)); ! d2_variable = (! d2_zero ! && (TREE_CODE (TYPE_MIN_VALUE (d2)) != INTEGER_CST ! || TREE_CODE (TYPE_MAX_VALUE (d2)) != INTEGER_CST)); ! ! if (d1_variable || d2_variable) ! break; ! if (d1_zero && d2_zero) ! break; ! if (d1_zero || d2_zero ! || ! tree_int_cst_equal (TYPE_MIN_VALUE (d1), TYPE_MIN_VALUE (d2)) || ! tree_int_cst_equal (TYPE_MAX_VALUE (d1), TYPE_MAX_VALUE (d2))) val = 0; diff -Nrc3pad gcc-3.0.1/gcc/config/arm/lib1funcs.asm gcc-3.0.2/gcc/config/arm/lib1funcs.asm *** gcc-3.0.1/gcc/config/arm/lib1funcs.asm Mon Dec 4 15:05:17 2000 --- gcc-3.0.2/gcc/config/arm/lib1funcs.asm Tue Sep 18 03:09:55 2001 *************** Lover12: *** 630,639 **** #ifdef L_dvmd_lnx @ GNU/Linux division-by zero handler. Used in place of L_dvmd_tls ! #include ! ! #define SIGFPE 8 @ cant use as it ! @ contains too much C rubbish FUNC_START div0 stmfd sp!, {r1, lr} --- 630,641 ---- #ifdef L_dvmd_lnx @ GNU/Linux division-by zero handler. Used in place of L_dvmd_tls ! /* Constants taken from and */ ! #define SIGFPE 8 ! #define __NR_SYSCALL_BASE 0x900000 ! #define __NR_getpid (__NR_SYSCALL_BASE+ 20) ! #define __NR_kill (__NR_SYSCALL_BASE+ 37) ! FUNC_START div0 stmfd sp!, {r1, lr} diff -Nrc3pad gcc-3.0.1/gcc/config/float-i128.h gcc-3.0.2/gcc/config/float-i128.h *** gcc-3.0.1/gcc/config/float-i128.h Wed Jan 31 11:49:00 2001 --- gcc-3.0.2/gcc/config/float-i128.h Wed Oct 10 12:03:47 2001 *************** *** 93,99 **** #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 4932 ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 93,99 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 4932 ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/float-i32.h gcc-3.0.2/gcc/config/float-i32.h *** gcc-3.0.1/gcc/config/float-i32.h Wed Jan 31 11:49:00 2001 --- gcc-3.0.2/gcc/config/float-i32.h Wed Oct 10 12:03:47 2001 *************** *** 93,99 **** #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 38 ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 93,99 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 38 ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/float-i386.h gcc-3.0.2/gcc/config/float-i386.h *** gcc-3.0.1/gcc/config/float-i386.h Thu Jan 11 21:28:26 2001 --- gcc-3.0.2/gcc/config/float-i386.h Wed Oct 10 12:03:47 2001 *************** *** 94,100 **** #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 4932 ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 94,100 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 4932 ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/float-i64.h gcc-3.0.2/gcc/config/float-i64.h *** gcc-3.0.1/gcc/config/float-i64.h Wed Jan 31 11:49:00 2001 --- gcc-3.0.2/gcc/config/float-i64.h Wed Oct 10 12:03:47 2001 *************** *** 93,99 **** #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 308 ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 93,99 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 308 ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/float-m68k.h gcc-3.0.2/gcc/config/float-m68k.h *** gcc-3.0.1/gcc/config/float-m68k.h Wed Jan 31 11:49:00 2001 --- gcc-3.0.2/gcc/config/float-m68k.h Wed Oct 10 12:03:47 2001 *************** *** 94,100 **** --- 94,127 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 4932 + #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L + /* The floating-point expression evaluation method. + -1 indeterminate + 0 evaluate all operations and constants just to the range and + precision of the type + 1 evaluate operations and constants of type float and double + to the range and precision of the double type, evaluate + long double operations and constants to the range and + precision of the long double type + 2 evaluate all operations and constants to the range and + precision of the long double type + */ + /* ??? FLT_EVAL_METHOD depends on TARGET_68040_ONLY. We do not currently have a preprocessor token that we can use to tell that this is on. */ + # undef FLT_EVAL_METHOD + # define FLT_EVAL_METHOD -1 + + /* Number of decimal digits to enable rounding to the given number of + decimal digits without loss of precision. + if FLT_RADIX == 10^n: #mantissa * log10 (FLT_RADIX) + else : ceil (1 + #mantissa * log10 (FLT_RADIX)) + where #mantissa is the number of bits in the mantissa of the widest + supported floating-point type. + */ + # undef DECIMAL_DIG + # define DECIMAL_DIG 21 + + #endif /* C99 */ #endif /* _FLOAT_H_ */ diff -Nrc3pad gcc-3.0.1/gcc/config/float-sh.h gcc-3.0.2/gcc/config/float-sh.h *** gcc-3.0.1/gcc/config/float-sh.h Fri Feb 2 09:57:57 2001 --- gcc-3.0.2/gcc/config/float-sh.h Wed Oct 10 12:03:47 2001 *************** *** 130,136 **** #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 308 ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 130,136 ---- #undef LDBL_MAX_10_EXP #define LDBL_MAX_10_EXP 308 ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/float-sparc.h gcc-3.0.2/gcc/config/float-sparc.h *** gcc-3.0.1/gcc/config/float-sparc.h Wed Jan 31 11:49:00 2001 --- gcc-3.0.2/gcc/config/float-sparc.h Wed Oct 10 12:03:47 2001 *************** *** 119,125 **** #endif /* sparc32 */ ! #if __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and --- 119,125 ---- #endif /* sparc32 */ ! #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L /* The floating-point expression evaluation method. -1 indeterminate 0 evaluate all operations and constants just to the range and diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/fixunssfsi.c gcc-3.0.2/gcc/config/h8300/fixunssfsi.c *** gcc-3.0.1/gcc/config/h8300/fixunssfsi.c Wed Dec 31 16:00:00 1969 --- gcc-3.0.2/gcc/config/h8300/fixunssfsi.c Thu Aug 30 18:12:21 2001 *************** *** 0 **** --- 1,43 ---- + /* More subroutines needed by GCC output code on some machines. */ + /* Compile this one with gcc. */ + /* Copyright (C) 1989, 1992, 2001 Free Software Foundation, Inc. + + This file is part of GNU CC. + + GNU CC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + In addition to the permissions in the GNU General Public License, the + Free Software Foundation gives you unlimited permission to link the + compiled version of this file into combinations with other programs, + and to distribute those combinations without any restriction coming + from the use of this file. (The General Public License restrictions + do apply in other respects; for example, they cover modification of + the file, and distribution when not linked into a combine + executable.) + + GNU CC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GNU CC; see the file COPYING. If not, write to + the Free Software Foundation, 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + + /* The libgcc2.c implementation gets confused by our type setup and creates + a directly recursive call, so we do our own implementation. For the h8300, + that's in lib1funcs.asm, for h8300h / h8s, it's here. */ + + #ifndef __H8300__ + long + __fixunssfsi (float a) + { + if (a >= (float) 32768L) + return (long) (a -32768L) +32768L; + return (long) a; + } + #endif diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/h8300.c gcc-3.0.2/gcc/config/h8300/h8300.c *** gcc-3.0.1/gcc/config/h8300/h8300.c Wed Jul 4 14:56:14 2001 --- gcc-3.0.2/gcc/config/h8300/h8300.c Thu Aug 30 11:06:05 2001 *************** dosize (file, op, size) *** 168,174 **** if ((TARGET_H8300 && size <= 4) || ((TARGET_H8300H || TARGET_H8300S) && size <= 8) || (TARGET_H8300 && current_function_needs_context ! && strcmp (op, "sub"))) { unsigned HOST_WIDE_INT amount; --- 168,174 ---- if ((TARGET_H8300 && size <= 4) || ((TARGET_H8300H || TARGET_H8300S) && size <= 8) || (TARGET_H8300 && current_function_needs_context ! && ! strcmp (op, "sub"))) { unsigned HOST_WIDE_INT amount; diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/h8300.h gcc-3.0.2/gcc/config/h8300/h8300.h *** gcc-3.0.1/gcc/config/h8300/h8300.h Wed Jun 13 10:39:34 2001 --- gcc-3.0.2/gcc/config/h8300/h8300.h Wed Aug 29 09:06:26 2001 *************** enum reg_class { *** 495,500 **** --- 495,509 ---- #define STARTING_FRAME_OFFSET 0 + /* We do not know if the caller has a frame pointer, so we cannot go + beyond level 0. */ + + #define RETURN_ADDR_RTX(COUNT, FRAME) \ + ((COUNT) == 0 \ + ? gen_rtx_MEM (Pmode, \ + plus_constant (arg_pointer_rtx, -GET_MODE_SIZE (Pmode))) \ + : 0) + /* If we generate an insn to push BYTES bytes, this says how many the stack pointer really advances by. diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/h8300.md gcc-3.0.2/gcc/config/h8300/h8300.md *** gcc-3.0.1/gcc/config/h8300/h8300.md Wed Jun 13 10:39:34 2001 --- gcc-3.0.2/gcc/config/h8300/h8300.md Wed Aug 29 09:22:51 2001 *************** *** 187,194 **** (define_insn "" [(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m") (match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))] ! "register_operand (operands[0],HImode) ! || register_operand (operands[1], HImode)" "@ sub.w %T0,%T0 mov.w %T1,%T0 --- 187,199 ---- (define_insn "" [(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m") (match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))] ! "(register_operand (operands[0],HImode) ! || register_operand (operands[1], HImode)) ! && !(GET_CODE (operands[0]) == MEM ! && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC ! && GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG ! && GET_CODE (operands[1]) == REG ! && REGNO (XEXP (XEXP (operands[0], 0), 0)) == REGNO (operands[1]))" "@ sub.w %T0,%T0 mov.w %T1,%T0 *************** *** 403,409 **** (match_operand:SI 1 "general_operand_src" "I,r,i,m,r,r,>,I,r,*a"))] "(TARGET_H8300S || TARGET_H8300H) && (register_operand (operands[0], SImode) ! || register_operand (operands[1], SImode))" "* { switch (which_alternative) --- 408,419 ---- (match_operand:SI 1 "general_operand_src" "I,r,i,m,r,r,>,I,r,*a"))] "(TARGET_H8300S || TARGET_H8300H) && (register_operand (operands[0], SImode) ! || register_operand (operands[1], SImode)) ! && !(GET_CODE (operands[0]) == MEM ! && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC ! && GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG ! && GET_CODE (operands[1]) == REG ! && REGNO (XEXP (XEXP (operands[0], 0), 0)) == REGNO (operands[1]))" "* { switch (which_alternative) *************** *** 1611,1617 **** "@ mov.b #0,%t0 mov.b %R1,%s0\;mov.b #0,%t0" ! [(set_attr "length" "2,4") (set_attr "cc" "clobber,clobber")]) ;; The compiler can synthesize a 300H variant of this which is --- 1621,1627 ---- "@ mov.b #0,%t0 mov.b %R1,%s0\;mov.b #0,%t0" ! [(set_attr "length" "2,10") (set_attr "cc" "clobber,clobber")]) ;; The compiler can synthesize a 300H variant of this which is diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/lib1funcs.asm gcc-3.0.2/gcc/config/h8300/lib1funcs.asm *** gcc-3.0.1/gcc/config/h8300/lib1funcs.asm Thu Sep 7 15:11:31 2000 --- gcc-3.0.2/gcc/config/h8300/lib1funcs.asm Thu Aug 30 18:13:48 2001 *************** *** 1,7 **** ;; libgcc1 routines for the Hitachi H8/300 CPU. ;; Contributed by Steve Chamberlain ! /* Copyright (C) 1994, 2000 Free Software Foundation, Inc. This file is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the --- 1,7 ---- ;; libgcc1 routines for the Hitachi H8/300 CPU. ;; Contributed by Steve Chamberlain ! /* Copyright (C) 1994, 2000, 2001 Free Software Foundation, Inc. This file is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the *************** ___umodhi3: *** 251,257 **** ; q low 8 bits of quot ; P preserve ! ; The h8 only has a 16/8 bit divide, so we look at the incoming and ; see how to partition up the expression. .global ___udivhi3 --- 251,257 ---- ; q low 8 bits of quot ; P preserve ! ; The H8/300 only has a 16/8 bit divide, so we look at the incoming and ; see how to partition up the expression. .global ___udivhi3 *************** reti: *** 502,511 **** POPP S2P rts ! ; takes A0/A1 numerator (A0P for 300h) ! ; A2/A3 denominator (A1P for 300h) ! ; returns A0/A1 quotient (A0P for 300h) ! ; S0/S1 remainder (S0P for 300h) ; trashes S2 #ifdef __H8300__ --- 502,511 ---- POPP S2P rts ! ; takes A0/A1 numerator (A0P for 300H) ! ; A2/A3 denominator (A1P for 300H) ! ; returns A0/A1 quotient (A0P for 300H) ! ; S0/S1 remainder (S0P for 300H) ; trashes S2 #ifdef __H8300__ *************** setone: *** 634,640 **** #ifdef L_mulhi3 ;; HImode multiply. ! ; The h8 only has an 8*8->16 multiply. ; The answer is the same as: ; ; product = (srca.l * srcb.l) + ((srca.h * srcb.l) + (srcb.h * srca.l)) * 256 --- 634,640 ---- #ifdef L_mulhi3 ;; HImode multiply. ! ; The H8/300 only has an 8*8->16 multiply. ; The answer is the same as: ; ; product = (srca.l * srcb.l) + ((srca.h * srcb.l) + (srcb.h * srca.l)) * 256 *************** _done: *** 764,766 **** --- 764,794 ---- #endif #endif /* L_mulsi3 */ + #ifdef L_fixunssfsi_asm + /* For the h8300 we use asm to save some bytes, to + allow more programs to fit into the tiny address + space. For h8300h / h8s, the C version is good enough. */ + #ifdef __H8300__ + /* We still treat NANs different than libgcc2.c, but then, the + behaviour is undefined anyways. */ + .global ___fixunssfsi + ___fixunssfsi: + cmp.b #0x47,r0h + bge Large_num + jmp @___fixsfsi + Large_num: + bhi L_huge_num + xor.b #0x80,A0L + bmi L_shift8 + L_huge_num: + mov.w #65535,A0 + mov.w A0,A1 + rts + L_shift8: + mov.b A0L,A0H + mov.b A1H,A0L + mov.b A1L,A1H + mov.b #0,A1L + rts + #endif + #endif /* L_fixunssfsi_asm */ diff -Nrc3pad gcc-3.0.1/gcc/config/h8300/t-h8300 gcc-3.0.2/gcc/config/h8300/t-h8300 *** gcc-3.0.1/gcc/config/h8300/t-h8300 Mon Jul 9 15:03:17 2001 --- gcc-3.0.2/gcc/config/h8300/t-h8300 Thu Aug 30 18:12:21 2001 *************** *** 1,7 **** CROSS_LIBGCC1 = libgcc1-asm.a LIB1ASMSRC = h8300/lib1funcs.asm LIB1ASMFUNCS = _cmpsi2 _ucmpsi2 _divhi3 _divsi3 _mulhi3 _mulsi3 \ ! _floatdisf _fixsfdi # We do not have DF or DI types, so fake out the libgcc2 compilation. TARGET_LIBGCC2_CFLAGS = -DDF=SF -DDI=SI --- 1,12 ---- + # The three first floating point functions listed in LIB1ASMFUNCS (_fixsfdi, + # _floatdisf, and _fixunssfdi) are used to disable the inclusion of those + # from libgcc2.c. They do not actually exist in lib1funcs.asm. CROSS_LIBGCC1 = libgcc1-asm.a LIB1ASMSRC = h8300/lib1funcs.asm LIB1ASMFUNCS = _cmpsi2 _ucmpsi2 _divhi3 _divsi3 _mulhi3 _mulsi3 \ ! _floatdisf _fixsfdi _fixunssfdi _fixunssfsi_asm ! ! LIB2FUNCS_EXTRA = $(srcdir)/config/h8300/fixunssfsi.c # We do not have DF or DI types, so fake out the libgcc2 compilation. TARGET_LIBGCC2_CFLAGS = -DDF=SF -DDI=SI diff -Nrc3pad gcc-3.0.1/gcc/config/i386/cygwin.h gcc-3.0.2/gcc/config/i386/cygwin.h *** gcc-3.0.1/gcc/config/i386/cygwin.h Sun May 20 12:49:17 2001 --- gcc-3.0.2/gcc/config/i386/cygwin.h Sun Oct 14 08:45:00 2001 *************** Boston, MA 02111-1307, USA. */ *** 80,86 **** #define MINGW_LIBS "-L/usr/local/lib/mingw -L/usr/lib/mingw" #define MINGW_INCLUDES "-isystem /usr/include/mingw/g++-3 "\ "-isystem /usr/include/mingw/g++ "\ ! "-isystem /usr/local/include/mingw" \ "-idirafter /usr/include/mingw" #endif --- 80,86 ---- #define MINGW_LIBS "-L/usr/local/lib/mingw -L/usr/lib/mingw" #define MINGW_INCLUDES "-isystem /usr/include/mingw/g++-3 "\ "-isystem /usr/include/mingw/g++ "\ ! "-isystem /usr/local/include/mingw " \ "-idirafter /usr/include/mingw" #endif *************** extern int i386_pe_dllimport_name_p PARA *** 563,568 **** --- 563,572 ---- #undef BIGGEST_ALIGNMENT #define BIGGEST_ALIGNMENT 128 + /* Native complier aligns internal doubles in structures on dword boundaries. */ + #undef BIGGEST_FIELD_ALIGNMENT + #define BIGGEST_FIELD_ALIGNMENT 64 + /* A bitfield declared as `int' forces `int' alignment for the struct. */ #undef PCC_BITFIELDS_TYPE_MATTERS #define PCC_BITFIELDS_TYPE_MATTERS 1 *************** extern int i386_pe_dllimport_name_p PARA *** 574,579 **** --- 578,586 ---- #define SET_ASM_OP "\t.set\t" #endif + /* Override GCC's relative pathname lookup unless otherwise told + by other subtargets. */ + #ifndef WIN32_NO_ABSOLUTE_INST_DIRS #undef MD_STARTFILE_PREFIX #define MD_STARTFILE_PREFIX "/usr/lib/" *************** extern int i386_pe_dllimport_name_p PARA *** 586,592 **** #undef SYSTEM_INCLUDE_DIR #undef STANDARD_INCLUDE_DIR #define STANDARD_INCLUDE_DIR 0 ! #endif #undef TREE --- 593,600 ---- #undef SYSTEM_INCLUDE_DIR #undef STANDARD_INCLUDE_DIR #define STANDARD_INCLUDE_DIR 0 ! #endif /* not CROSS_COMPILE */ ! #endif /* not WIN32_NO_ABSOLUTE_INST_DIRS */ #undef TREE diff -Nrc3pad gcc-3.0.1/gcc/config/i386/i386.c gcc-3.0.2/gcc/config/i386/i386.c *** gcc-3.0.1/gcc/config/i386/i386.c Mon Aug 6 14:26:24 2001 --- gcc-3.0.2/gcc/config/i386/i386.c Fri Sep 14 10:11:12 2001 *************** int ix86_align_loops; *** 417,423 **** --- 417,428 ---- /* Power of two alignment for non-loop jumps. */ int ix86_align_jumps; + + /* Prefix built by ASM_GENERATE_INTERNAL_LABEL. */ + static char internal_label_prefix[16]; + static int internal_label_prefix_len; + static int local_symbolic_operand PARAMS ((rtx, enum machine_mode)); static void output_pic_addr_const PARAMS ((FILE *, rtx, int)); static void put_condition_code PARAMS ((enum rtx_code, enum machine_mode, int, int, FILE *)); *************** override_options () *** 693,698 **** --- 698,712 ---- on by -msse. */ if (TARGET_SSE) target_flags |= MASK_MMX; + + /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */ + { + char *p; + ASM_GENERATE_INTERNAL_LABEL (internal_label_prefix, "LX", 0); + p = strchr (internal_label_prefix, 'X'); + internal_label_prefix_len = p - internal_label_prefix; + *p = '\0'; + } } /* A C statement (sans semicolon) to choose the order in which to *************** pic_symbolic_operand (op, mode) *** 1128,1133 **** --- 1142,1181 ---- return 0; } + /* Return true if OP is a symbolic operand that resolves locally. */ + + static int + local_symbolic_operand (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; + { + if (GET_CODE (op) == LABEL_REF) + return 1; + + if (GET_CODE (op) == CONST + && GET_CODE (XEXP (op, 0)) == PLUS + && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT) + op = XEXP (XEXP (op, 0), 0); + + if (GET_CODE (op) != SYMBOL_REF) + return 0; + + /* These we've been told are local by varasm and encode_section_info + respectively. */ + if (CONSTANT_POOL_ADDRESS_P (op) || SYMBOL_REF_FLAG (op)) + return 1; + + /* There is, however, a not insubstantial body of code in the rest of + the compiler that assumes it can just stick the results of + ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */ + + if (strncmp (XSTR (op, 0), internal_label_prefix, + internal_label_prefix_len) == 0) + return 1; + + return 0; + } + /* Test for a valid operand for a call instruction. Don't allow the arg pointer register or virtual regs since they may decay into reg + const, which the patterns can't handle. */ *************** legitimate_pic_address_disp_p (disp) *** 2530,2544 **** return 0; /* Must be @GOT or @GOTOFF. */ ! if (XINT (disp, 1) != 6 ! && XINT (disp, 1) != 7) ! return 0; ! ! if (GET_CODE (XVECEXP (disp, 0, 0)) != SYMBOL_REF ! && GET_CODE (XVECEXP (disp, 0, 0)) != LABEL_REF) ! return 0; ! return 1; } /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid --- 2578,2593 ---- return 0; /* Must be @GOT or @GOTOFF. */ ! switch (XINT (disp, 1)) ! { ! case 6: /* @GOT */ ! return GET_CODE (XVECEXP (disp, 0, 0)) == SYMBOL_REF; ! case 7: /* @GOTOFF */ ! return local_symbolic_operand (XVECEXP (disp, 0, 0), Pmode); ! } ! ! return 0; } /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid *************** legitimize_pic_address (orig, reg) *** 2767,2776 **** rtx new = orig; rtx base; ! if (GET_CODE (addr) == LABEL_REF ! || (GET_CODE (addr) == SYMBOL_REF ! && (CONSTANT_POOL_ADDRESS_P (addr) ! || SYMBOL_REF_FLAG (addr)))) { /* This symbol may be referenced via a displacement from the PIC base address (@GOTOFF). */ --- 2816,2822 ---- rtx new = orig; rtx base; ! if (local_symbolic_operand (addr, Pmode)) { /* This symbol may be referenced via a displacement from the PIC base address (@GOTOFF). */ *************** legitimize_pic_address (orig, reg) *** 2822,2831 **** /* Check first to see if this is a constant offset from a @GOTOFF symbol reference. */ ! if ((GET_CODE (op0) == LABEL_REF ! || (GET_CODE (op0) == SYMBOL_REF ! && (CONSTANT_POOL_ADDRESS_P (op0) ! || SYMBOL_REF_FLAG (op0)))) && GET_CODE (op1) == CONST_INT) { current_function_uses_pic_offset_table = 1; --- 2868,2874 ---- /* Check first to see if this is a constant offset from a @GOTOFF symbol reference. */ ! if (local_symbolic_operand (op0, Pmode) && GET_CODE (op1) == CONST_INT) { current_function_uses_pic_offset_table = 1; diff -Nrc3pad gcc-3.0.1/gcc/config/i386/i386.md gcc-3.0.2/gcc/config/i386/i386.md *** gcc-3.0.1/gcc/config/i386/i386.md Mon Aug 6 13:33:40 2001 --- gcc-3.0.2/gcc/config/i386/i386.md Fri Oct 5 12:45:34 2001 *************** *** 1581,1587 **** [(set_attr "type" "pop") (set_attr "mode" "SI")]) ! (define_insn "*movsi_xor" [(set (match_operand:SI 0 "register_operand" "=r") (match_operand:SI 1 "const0_operand" "i")) (clobber (reg:CC 17))] --- 1581,1587 ---- [(set_attr "type" "pop") (set_attr "mode" "SI")]) ! (define_insn "movsi_xor" [(set (match_operand:SI 0 "register_operand" "=r") (match_operand:SI 1 "const0_operand" "i")) (clobber (reg:CC 17))] *************** *** 9606,9618 **** (zero_extend (match_dup 1)))] "peep2_reg_dead_p (3, operands[1]) && ! reg_overlap_mentioned_p (operands[3], operands[0])" ! [(parallel [(set (match_dup 3) (const_int 0)) ! (clobber (reg:CC 17))]) ! (set (match_dup 4) (match_dup 0)) (set (strict_low_part (match_dup 5)) (match_dup 2))] ! "operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17); ! operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));") ;; Call instructions. --- 9606,9623 ---- (zero_extend (match_dup 1)))] "peep2_reg_dead_p (3, operands[1]) && ! reg_overlap_mentioned_p (operands[3], operands[0])" ! [(set (match_dup 4) (match_dup 0)) (set (strict_low_part (match_dup 5)) (match_dup 2))] ! " ! { ! operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17); ! operands[5] = gen_rtx_REG (QImode, REGNO (operands[3])); ! if (HAVE_movsi_xor) ! emit_insn (gen_movsi_xor (operands[3], const0_rtx)); ! else ! emit_insn (gen_movsi (operands[3], const0_rtx)); ! }") ;; Call instructions. diff -Nrc3pad gcc-3.0.1/gcc/config/i386/mingw32.h gcc-3.0.2/gcc/config/i386/mingw32.h *** gcc-3.0.1/gcc/config/i386/mingw32.h Mon Jan 29 13:41:46 2001 --- gcc-3.0.2/gcc/config/i386/mingw32.h Wed Oct 10 13:38:56 2001 *************** Boston, MA 02111-1307, USA. */ *** 24,44 **** /* Most of this is the same as for cygwin, except for changing some specs. */ #include "i386/cygwin.h" /* Please keep changes to CPP_PREDEFINES in sync with i386/crtdll. The only difference between the two should be __MSVCRT__ needed to distinguish MSVC from CRTDLL runtime in mingw headers. */ #undef CPP_PREDEFINES ! #define CPP_PREDEFINES "-D_WIN32 -DWIN32 \ ! -D__MINGW32__=0.2 -D__MSVCRT__ -DWINNT -D_X86_=1 \ -Asystem=winnt" /* Specific a different directory for the standard include files. */ #undef STANDARD_INCLUDE_DIR ! #define STANDARD_INCLUDE_DIR "/usr/local/i386-mingw32/include" ! ! #define STANDARD_INCLUDE_COMPONENT "MINGW32" #undef CPP_SPEC #define CPP_SPEC \ --- 24,50 ---- /* Most of this is the same as for cygwin, except for changing some specs. */ + /* Mingw GCC, unlike Cygwin's, must be relocatable. This macro must + be defined before any other files are included. */ + #ifndef WIN32_NO_ABSOLUTE_INST_DIRS + #define WIN32_NO_ABSOLUTE_INST_DIRS 1 + #endif + #include "i386/cygwin.h" /* Please keep changes to CPP_PREDEFINES in sync with i386/crtdll. The only difference between the two should be __MSVCRT__ needed to distinguish MSVC from CRTDLL runtime in mingw headers. */ #undef CPP_PREDEFINES ! #define CPP_PREDEFINES "-D_WIN32 -D__WIN32 -D__WIN32__ -DWIN32 \ ! -D__MINGW32__ -D__MSVCRT__ -DWINNT -D_X86_=1 \ -Asystem=winnt" /* Specific a different directory for the standard include files. */ #undef STANDARD_INCLUDE_DIR ! #define STANDARD_INCLUDE_DIR "/usr/local/mingw32/include" ! #undef STANDARD_INCLUDE_COMPONENT ! #define STANDARD_INCLUDE_COMPONENT "MINGW" #undef CPP_SPEC #define CPP_SPEC \ *************** Boston, MA 02111-1307, USA. */ *** 75,84 **** %{!shared:%{!mdll:crt2%O%s}} %{pg:gcrt2%O%s}" /* MS runtime does not need a separate math library. */ #define MATH_LIBRARY "" ! /* Output STRING, a string representing a filename, to FILE. We canonicalize ! it to be in MS-DOS format. */ #define OUTPUT_QUOTED_STRING(FILE, STRING) \ do { \ char c; \ --- 81,92 ---- %{!shared:%{!mdll:crt2%O%s}} %{pg:gcrt2%O%s}" /* MS runtime does not need a separate math library. */ + #undef MATH_LIBRARY #define MATH_LIBRARY "" ! /* Output STRING, a string representing a filename, to FILE. ! We canonicalize it to be in MS-DOS format. */ ! #undef OUTPUT_QUOTED_STRING #define OUTPUT_QUOTED_STRING(FILE, STRING) \ do { \ char c; \ diff -Nrc3pad gcc-3.0.1/gcc/config/i386/sol2.h gcc-3.0.2/gcc/config/i386/sol2.h *** gcc-3.0.1/gcc/config/i386/sol2.h Tue Jul 3 05:33:09 2001 --- gcc-3.0.2/gcc/config/i386/sol2.h Fri Sep 28 14:31:01 2001 *************** Boston, MA 02111-1307, USA. */ *** 83,88 **** --- 83,96 ---- %{!pthreads:%{threads:-D_REENTRANT -D_SOLARIS_THREADS}} \ %{compat-bsd:-iwithprefixbefore ucbinclude -I/usr/ucbinclude}" + /* For C++ we need to add some additional macro definitions required + by the C++ standard library. */ + #define CPLUSPLUS_CPP_SPEC "\ + -D_XOPEN_SOURCE=500 -D_LARGEFILE_SOURCE=1 -D_LARGEFILE64_SOURCE=1 \ + -D__EXTENSIONS__ \ + %(cpp) \ + " + #undef LIB_SPEC #define LIB_SPEC \ "%{compat-bsd:-lucb -lsocket -lnsl -lelf -laio} \ diff -Nrc3pad gcc-3.0.1/gcc/config/i386/unix.h gcc-3.0.2/gcc/config/i386/unix.h *** gcc-3.0.1/gcc/config/i386/unix.h Sat Dec 16 08:07:25 2000 --- gcc-3.0.2/gcc/config/i386/unix.h Fri Sep 14 09:42:30 2001 *************** Boston, MA 02111-1307, USA. */ *** 87,93 **** #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ do { \ tree parm; \ ! rtx xops[2]; \ \ if (ix86_regparm > 0) \ parm = TYPE_ARG_TYPES (TREE_TYPE (function)); \ --- 87,93 ---- #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ do { \ tree parm; \ ! rtx xops[3]; \ \ if (ix86_regparm > 0) \ parm = TYPE_ARG_TYPES (TREE_TYPE (function)); \ *************** do { \ *** 110,115 **** --- 110,116 ---- { \ xops[0] = pic_offset_table_rtx; \ xops[1] = gen_label_rtx (); \ + xops[2] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_"); \ \ if (ix86_regparm > 2) \ abort (); \ *************** do { \ *** 117,123 **** output_asm_insn ("call\t%P1", xops); \ ASM_OUTPUT_INTERNAL_LABEL (FILE, "L", CODE_LABEL_NUMBER (xops[1])); \ output_asm_insn ("pop{l}\t%0", xops); \ ! output_asm_insn ("add{l}\t{$_GLOBAL_OFFSET_TABLE_+[.-%P1], %0|%0, OFFSET FLAT: _GLOBAL_OFFSET_TABLE_+[.-%P1]}", xops); \ xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (FUNCTION), 0)); \ output_asm_insn ("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}",\ xops); \ --- 118,124 ---- output_asm_insn ("call\t%P1", xops); \ ASM_OUTPUT_INTERNAL_LABEL (FILE, "L", CODE_LABEL_NUMBER (xops[1])); \ output_asm_insn ("pop{l}\t%0", xops); \ ! output_asm_insn ("add{l}\t{%2+[.-%P1], %0|%0, OFFSET FLAT: %2+[.-%P1]}", xops); \ xops[0] = gen_rtx_MEM (SImode, XEXP (DECL_RTL (FUNCTION), 0)); \ output_asm_insn ("mov{l}\t{%0@GOT(%%ebx), %%ecx|%%ecx, %0@GOT[%%ebx]}",\ xops); \ diff -Nrc3pad gcc-3.0.1/gcc/config/ia64/ia64.c gcc-3.0.2/gcc/config/ia64/ia64.c *** gcc-3.0.1/gcc/config/ia64/ia64.c Fri Jun 8 10:18:43 2001 --- gcc-3.0.2/gcc/config/ia64/ia64.c Wed Sep 19 12:17:21 2001 *************** ia64_return_in_memory (valtype) *** 3105,3115 **** { enum machine_mode mode; enum machine_mode hfa_mode; ! int byte_size; mode = TYPE_MODE (valtype); ! byte_size = ((mode == BLKmode) ! ? int_size_in_bytes (valtype) : GET_MODE_SIZE (mode)); /* Hfa's with up to 8 elements are returned in the FP argument registers. */ --- 3105,3120 ---- { enum machine_mode mode; enum machine_mode hfa_mode; ! HOST_WIDE_INT byte_size; mode = TYPE_MODE (valtype); ! byte_size = GET_MODE_SIZE (mode); ! if (mode == BLKmode) ! { ! byte_size = int_size_in_bytes (valtype); ! if (byte_size < 0) ! return 1; ! } /* Hfa's with up to 8 elements are returned in the FP argument registers. */ *************** ia64_return_in_memory (valtype) *** 3123,3129 **** else return 0; } - else if (byte_size > UNITS_PER_WORD * MAX_INT_RETURN_SLOTS) return 1; else --- 3128,3133 ---- diff -Nrc3pad gcc-3.0.1/gcc/config/ia64/ia64.h gcc-3.0.2/gcc/config/ia64/ia64.h *** gcc-3.0.1/gcc/config/ia64/ia64.h Wed Jul 25 06:24:46 2001 --- gcc-3.0.2/gcc/config/ia64/ia64.h Fri Sep 21 18:33:20 2001 *************** while (0) *** 422,427 **** --- 422,434 ---- If you do not define this macro, the default for `-fvtable-thunk' is 0. */ #define DEFAULT_VTABLE_THUNKS 1 + /* By default, the C++ compiler will use function addresses in the + vtable entries. Setting this non-zero tells the compiler to use + function descriptors instead. The value of this macro says how + many words wide the descriptor is (normally 2). It is assumed + that the address of a function descriptor may be treated as a + pointer to a function. */ + #define TARGET_VTABLE_USES_DESCRIPTORS 2 /* Layout of Source Language Data Types */ *************** do { \ *** 1523,1528 **** --- 1530,1546 ---- fprintf (FILE, "\n"); \ } while (0) + /* Output part N of a function descriptor for DECL. For ia64, both + words are emitted with a single relocation, so ignore N > 0. */ + #define ASM_OUTPUT_FDESC(FILE, DECL, PART) \ + do { \ + if ((PART) == 0) \ + { \ + fputs ("\tdata16.ua @iplt(", FILE); \ + assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0)); \ + fputs (")\n", FILE); \ + } \ + } while (0) /* Generating Code for Profiling. */ diff -Nrc3pad gcc-3.0.1/gcc/config/ia64/ia64.md gcc-3.0.2/gcc/config/ia64/ia64.md *** gcc-3.0.1/gcc/config/ia64/ia64.md Wed Jul 25 06:35:00 2001 --- gcc-3.0.2/gcc/config/ia64/ia64.md Tue Aug 28 14:56:01 2001 *************** *** 1194,1204 **** "" "@ # ! tbit.z.and.orcm %0, %I0 = %2, 0 andcm %0 = %2, %1" "reload_completed && GET_CODE (operands[0]) == REG && PR_REGNO_P (REGNO (operands[0])) ! && GET_CODE (operands[2]) == REG && PR_REGNO_P (REGNO (operands[2]))" [(cond_exec (ne (match_dup 1) (const_int 0)) (set (match_dup 0) (and:BI (ne:BI (const_int 0) (const_int 0)) (match_dup 0))))] --- 1194,1204 ---- "" "@ # ! tbit.z.and.orcm %0, %I0 = %1, 0 andcm %0 = %2, %1" "reload_completed && GET_CODE (operands[0]) == REG && PR_REGNO_P (REGNO (operands[0])) ! && GET_CODE (operands[1]) == REG && PR_REGNO_P (REGNO (operands[1]))" [(cond_exec (ne (match_dup 1) (const_int 0)) (set (match_dup 0) (and:BI (ne:BI (const_int 0) (const_int 0)) (match_dup 0))))] *************** *** 1230,1239 **** "" "@ # ! tbit.z.or.andcm %0, %I0 = %2, 0" "reload_completed && GET_CODE (operands[0]) == REG && PR_REGNO_P (REGNO (operands[0])) ! && GET_CODE (operands[2]) == REG && PR_REGNO_P (REGNO (operands[2]))" [(cond_exec (eq (match_dup 1) (const_int 0)) (set (match_dup 0) (ior:BI (eq:BI (const_int 0) (const_int 0)) (match_dup 0))))] --- 1230,1239 ---- "" "@ # ! tbit.z.or.andcm %0, %I0 = %1, 0" "reload_completed && GET_CODE (operands[0]) == REG && PR_REGNO_P (REGNO (operands[0])) ! && GET_CODE (operands[1]) == REG && PR_REGNO_P (REGNO (operands[1]))" [(cond_exec (eq (match_dup 1) (const_int 0)) (set (match_dup 0) (ior:BI (eq:BI (const_int 0) (const_int 0)) (match_dup 0))))] *************** *** 1258,1264 **** (clobber (match_scratch:BI 2 ""))] "reload_completed && GET_CODE (operands[0]) == REG && PR_REGNO_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG && PR_REGNO_P (REGNO (operands[1])) && rtx_equal_p (operands[0], operands[1])" [(set (match_dup 4) (match_dup 3)) (set (match_dup 0) (const_int 1)) --- 1258,1263 ---- diff -Nrc3pad gcc-3.0.1/gcc/config/m68hc11/m68hc11.c gcc-3.0.2/gcc/config/m68hc11/m68hc11.c *** gcc-3.0.1/gcc/config/m68hc11/m68hc11.c Fri Jul 20 12:38:15 2001 --- gcc-3.0.2/gcc/config/m68hc11/m68hc11.c Sun Sep 30 05:53:26 2001 *************** m68hc11_gen_movhi (insn, operands) *** 3310,3316 **** if (ix_reg == 0) create_regs_rtx (); ! if (reg_mentioned_p (ix_reg, operands[0])) { output_asm_insn ("sty\t%t0", operands); output_asm_insn ("tsy", operands); --- 3310,3326 ---- if (ix_reg == 0) create_regs_rtx (); ! if (REG_P (operands[0]) && REGNO (operands[0]) == SOFT_TMP_REGNUM) ! { ! output_asm_insn ("pshx", operands); ! output_asm_insn ("tsx", operands); ! output_asm_insn ("inx", operands); ! output_asm_insn ("inx", operands); ! output_asm_insn ("stx\t%0", operands); ! output_asm_insn ("pulx", operands); ! } ! ! else if (reg_mentioned_p (ix_reg, operands[0])) { output_asm_insn ("sty\t%t0", operands); output_asm_insn ("tsy", operands); diff -Nrc3pad gcc-3.0.1/gcc/config/m68hc11/m68hc11.h gcc-3.0.2/gcc/config/m68hc11/m68hc11.h *** gcc-3.0.1/gcc/config/m68hc11/m68hc11.h Fri Aug 3 14:05:49 2001 --- gcc-3.0.2/gcc/config/m68hc11/m68hc11.h Sun Sep 30 05:47:16 2001 *************** extern enum reg_class m68hc11_tmp_regs_c *** 883,898 **** #define FIRST_PARM_OFFSET(FNDECL) 2 - /* A C expression whose value is RTL representing the location of the - incoming return address at the beginning of any function, before the - prologue. This RTL is either a REG, indicating that the return - value is saved in REG, or a MEM representing a location in - the stack. - - Before the prologue, RA is at 0(sp). */ - #define INCOMING_RETURN_ADDR_RTX \ - gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) - /* After the prologue, RA is at 0(AP) in the current frame. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT) == 0 \ --- 883,888 ---- diff -Nrc3pad gcc-3.0.1/gcc/config/m68hc11/m68hc11.md gcc-3.0.2/gcc/config/m68hc11/m68hc11.md *** gcc-3.0.1/gcc/config/m68hc11/m68hc11.md Sat Aug 4 04:30:00 2001 --- gcc-3.0.2/gcc/config/m68hc11/m68hc11.md Mon Oct 1 06:38:13 2001 *************** *** 170,176 **** (define_insn "tsthi_1" [(set (cc0) ! (match_operand:HI 0 "tst_operand" "dx,y"))] "" "* { --- 170,176 ---- (define_insn "tsthi_1" [(set (cc0) ! (match_operand:HI 0 "tst_operand" "dx,*y"))] "" "* { *************** *** 484,491 **** (define_insn "cmpqi_1" [(set (cc0) ! (compare (match_operand:QI 0 "tst_operand" "d,m,d,!u,*B,d") ! (match_operand:QI 1 "cmp_operand" "im,d,!u,d,?dim*B,*u")))] "" "* { --- 484,491 ---- (define_insn "cmpqi_1" [(set (cc0) ! (compare (match_operand:QI 0 "tst_operand" "d,m,d,!u,*B,d*B") ! (match_operand:QI 1 "cmp_operand" "im,d,!u,d,dim*A,*u")))] "" "* { *************** *** 1002,1009 **** }") (define_insn "*movqi_68hc12" ! [(set (match_operand:QI 0 "nonimmediate_operand" "=d*AuU*q,d*A*qu,d*A*q,m,m") ! (match_operand:QI 1 "general_operand" "rui*q,U,m,d*q,!A"))] "TARGET_M6812" "* { --- 1002,1011 ---- }") (define_insn "*movqi_68hc12" ! [(set (match_operand:QI 0 "nonimmediate_operand" ! "=d*AU*q,d*A*q,*u,d*A*q,m,m") ! (match_operand:QI 1 "general_operand" ! "*ri*q,U,*ri*qU,m,d*q,!A"))] "TARGET_M6812" "* { *************** *** 1270,1278 **** }") (define_insn "zero_extendqisi2" ! [(set (match_operand:SI 0 "non_push_operand" "=D,m,u") (zero_extend:SI ! (match_operand:QI 1 "nonimmediate_operand" "dxymu,dxy,dxy")))] "" "#") --- 1272,1280 ---- }") (define_insn "zero_extendqisi2" ! [(set (match_operand:SI 0 "non_push_operand" "=D,D,m,m,u") (zero_extend:SI ! (match_operand:QI 1 "nonimmediate_operand" "dmu,xy,d,xy,dxy")))] "" "#") *************** *** 2307,2313 **** "") (define_insn "*addhi3" ! [(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d") (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0") (match_operand:HI 2 "general_operand" "N,i,I,mi*A*d,!u*d*w")))] "TARGET_M6811" --- 2309,2315 ---- "") (define_insn "*addhi3" ! [(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d*A") (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0") (match_operand:HI 2 "general_operand" "N,i,I,mi*A*d,!u*d*w")))] "TARGET_M6811" *************** *** 2430,2438 **** "") (define_insn "addqi3" ! [(set (match_operand:QI 0 "nonimmediate_operand" "=!*rm,dq*A") ! (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0") ! (match_operand:QI 2 "general_operand" "N,ium*A*d")))] "" "* { --- 2432,2440 ---- "") (define_insn "addqi3" ! [(set (match_operand:QI 0 "nonimmediate_operand" "=!d*rm,dq,!*A") ! (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") ! (match_operand:QI 2 "general_operand" "N,ium*A*d,ium*A*d")))] "" "* { *************** *** 3451,3461 **** "#") (define_insn "*logicalhi3_zexthi" ! [(set (match_operand:HI 0 "register_operand" "=d") (match_operator:HI 3 "m68hc11_logical_operator" [(zero_extend:HI ! (match_operand:QI 1 "general_operand" "imud")) ! (match_operand:HI 2 "general_operand" "dimu")]))] "" "#") --- 3453,3463 ---- "#") (define_insn "*logicalhi3_zexthi" ! [(set (match_operand:HI 0 "register_operand" "=d,d") (match_operator:HI 3 "m68hc11_logical_operator" [(zero_extend:HI ! (match_operand:QI 1 "general_operand" "imd*A,?u")) ! (match_operand:HI 2 "general_operand" "dim,?dimu")]))] "" "#") *************** *** 3655,3662 **** (set (match_dup 0) (reg:HI D_REGNUM))])] " /* Save the operand2 in a temporary location and use it. */ ! if (H_REG_P (operands[2]) ! || reg_mentioned_p (operands[0], operands[2])) { operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM); operands[6] = operands[4]; --- 3657,3665 ---- (set (match_dup 0) (reg:HI D_REGNUM))])] " /* Save the operand2 in a temporary location and use it. */ ! if ((H_REG_P (operands[2]) ! || reg_mentioned_p (operands[0], operands[2])) ! && !(SP_REG_P (operands[2]) && GET_CODE (operands[3]) == PLUS)) { operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM); operands[6] = operands[4]; *************** *** 6119,6127 **** { int value_loaded = 1; ! if (X_REG_P (operands[0])) { ! output_asm_insn (\"ldx\\t%2\\n\\txgdx\", operands); } else if (Y_REG_P (operands[0])) { --- 6122,6135 ---- { int value_loaded = 1; ! if (X_REG_P (operands[0]) || SP_REG_P (operands[2])) { ! rtx ops[2]; ! ! ops[0] = operands[0]; ! ops[1] = operands[2]; ! m68hc11_gen_movhi (insn, ops); ! output_asm_insn (\"xgd%0\", operands); } else if (Y_REG_P (operands[0])) { diff -Nrc3pad gcc-3.0.1/gcc/config/rs6000/rs6000-protos.h gcc-3.0.2/gcc/config/rs6000/rs6000-protos.h *** gcc-3.0.1/gcc/config/rs6000/rs6000-protos.h Sat Jul 14 15:50:31 2001 --- gcc-3.0.2/gcc/config/rs6000/rs6000-protos.h Mon Sep 10 11:06:28 2001 *************** extern int reg_or_arith_cint_operand PAR *** 45,50 **** --- 45,51 ---- extern int reg_or_add_cint64_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_sub_cint64_operand PARAMS ((rtx, enum machine_mode)); extern int reg_or_logical_cint_operand PARAMS ((rtx, enum machine_mode)); + extern int scc_eq_operand PARAMS ((rtx, enum machine_mode)); extern int got_operand PARAMS ((rtx, enum machine_mode)); extern int got_no_const_operand PARAMS ((rtx, enum machine_mode)); extern int num_insns_constant PARAMS ((rtx, enum machine_mode)); *************** extern int non_logical_cint_operand PARA *** 59,65 **** extern int logical_operand PARAMS ((rtx, enum machine_mode)); extern int mask_operand PARAMS ((rtx, enum machine_mode)); extern int mask64_operand PARAMS ((rtx, enum machine_mode)); - extern int rldic_operand PARAMS ((rtx, enum machine_mode)); extern int and64_operand PARAMS ((rtx, enum machine_mode)); extern int and_operand PARAMS ((rtx, enum machine_mode)); extern int count_register_operand PARAMS ((rtx, enum machine_mode)); --- 60,65 ---- *************** extern int boolean_or_operator PARAMS (( *** 85,91 **** extern int min_max_operator PARAMS ((rtx, enum machine_mode)); extern int includes_lshift_p PARAMS ((rtx, rtx)); extern int includes_rshift_p PARAMS ((rtx, rtx)); ! extern int includes_lshift64_p PARAMS ((rtx, rtx)); extern int registers_ok_for_quad_peep PARAMS ((rtx, rtx)); extern int addrs_ok_for_quad_peep PARAMS ((rtx, rtx)); extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, --- 85,92 ---- extern int min_max_operator PARAMS ((rtx, enum machine_mode)); extern int includes_lshift_p PARAMS ((rtx, rtx)); extern int includes_rshift_p PARAMS ((rtx, rtx)); ! extern int includes_rldic_lshift_p PARAMS ((rtx, rtx)); ! extern int includes_rldicr_lshift_p PARAMS ((rtx, rtx)); extern int registers_ok_for_quad_peep PARAMS ((rtx, rtx)); extern int addrs_ok_for_quad_peep PARAMS ((rtx, rtx)); extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, diff -Nrc3pad gcc-3.0.1/gcc/config/rs6000/rs6000.c gcc-3.0.2/gcc/config/rs6000/rs6000.c *** gcc-3.0.1/gcc/config/rs6000/rs6000.c Sat Jul 14 15:50:30 2001 --- gcc-3.0.2/gcc/config/rs6000/rs6000.c Tue Sep 25 10:59:04 2001 *************** reg_or_logical_cint_operand (op, mode) *** 749,755 **** return gpc_reg_operand (op, mode); } ! /* Return 1 if the operand is an operand that can be loaded via the GOT */ int got_operand (op, mode) --- 749,766 ---- return gpc_reg_operand (op, mode); } ! /* Return 1 if the operand is valid for SCC eq. */ ! ! int ! scc_eq_operand (op, mode) ! register rtx op; ! enum machine_mode mode ATTRIBUTE_UNUSED; ! { ! return (short_cint_operand (op, mode) ! || reg_or_logical_cint_operand (op, mode)); ! } ! ! /* Return 1 if the operand is an operand that can be loaded via the GOT. */ int got_operand (op, mode) *************** mask_operand (op, mode) *** 1089,1114 **** register rtx op; enum machine_mode mode ATTRIBUTE_UNUSED; { ! HOST_WIDE_INT c; ! int i; ! int last_bit_value; ! int transitions = 0; if (GET_CODE (op) != CONST_INT) return 0; c = INTVAL (op); ! if (c == 0 || c == ~0) return 0; ! last_bit_value = c & 1; ! for (i = 1; i < 32; i++) ! if (((c >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! return transitions <= 2; } /* Return 1 if the operand is a constant that is a PowerPC64 mask. --- 1100,1135 ---- register rtx op; enum machine_mode mode ATTRIBUTE_UNUSED; { ! HOST_WIDE_INT c, lsb; if (GET_CODE (op) != CONST_INT) return 0; c = INTVAL (op); ! /* We don't change the number of transitions by inverting, ! so make sure we start with the LS bit zero. */ ! if (c & 1) ! c = ~c; ! ! /* Reject all zeros or all ones. */ ! if (c == 0) return 0; ! /* Find the first transition. */ ! lsb = c & -c; ! /* Invert to look for a second transition. */ ! c = ~c; ! /* Erase first transition. */ ! c &= -lsb; ! ! /* Find the second transition (if any). */ ! lsb = c & -c; ! ! /* Match if all the bits above are 1's (or c is zero). */ ! return c == -lsb; } /* Return 1 if the operand is a constant that is a PowerPC64 mask. *************** mask64_operand (op, mode) *** 1123,1255 **** { if (GET_CODE (op) == CONST_INT) { ! HOST_WIDE_INT c = INTVAL (op); ! int i; ! int last_bit_value; ! int transitions = 0; ! ! if (c == 0 || c == ~0) ! return 0; ! ! last_bit_value = c & 1; ! ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((c >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! ! return transitions <= 1; ! } ! else if (GET_CODE (op) == CONST_DOUBLE ! && (mode == VOIDmode || mode == DImode)) ! { ! HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); ! #if HOST_BITS_PER_WIDE_INT == 32 ! HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); ! #endif ! int i; ! int last_bit_value; ! int transitions = 0; ! ! if ((low == 0 ! #if HOST_BITS_PER_WIDE_INT == 32 ! && high == 0 ! #endif ! ) ! || (low == ~0 ! #if HOST_BITS_PER_WIDE_INT == 32 ! && high == ~0 ! #endif ! )) ! return 0; ! ! last_bit_value = low & 1; ! ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((low >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! ! #if HOST_BITS_PER_WIDE_INT == 32 ! if ((high & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((high >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! #endif ! ! return transitions <= 1; ! } ! else ! return 0; ! } ! ! /* Return 1 if the operand is a constant that is a PowerPC64 mask. ! It is if there are no more than two 1->0 or 0->1 transitions. ! Reject all ones and all zeros, since these should have been optimized ! away and confuse the making of MB and ME. */ ! int ! rldic_operand (op, mode) ! register rtx op; ! enum machine_mode mode; ! { ! if (GET_CODE (op) == CONST_INT) ! { ! HOST_WIDE_INT c = INTVAL (op); ! int i; ! int last_bit_value; ! int transitions = 0; ! if (c == 0 || c == ~0) return 0; ! last_bit_value = c & 1; ! ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((c >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! ! return transitions <= 2; } else if (GET_CODE (op) == CONST_DOUBLE && (mode == VOIDmode || mode == DImode)) { ! HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); ! #if HOST_BITS_PER_WIDE_INT == 32 ! HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); ! #endif ! int i; ! int last_bit_value; ! int transitions = 0; ! ! if ((low == 0 ! #if HOST_BITS_PER_WIDE_INT == 32 ! && high == 0 ! #endif ! ) ! || (low == ~0 ! #if HOST_BITS_PER_WIDE_INT == 32 ! && high == ~0 ! #endif ! )) ! return 0; ! last_bit_value = low & 1; ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((low >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! #if HOST_BITS_PER_WIDE_INT == 32 ! if ((high & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) ! if (((high >>= 1) & 1) != last_bit_value) ! last_bit_value ^= 1, transitions++; ! #endif ! return transitions <= 2; } else return 0; --- 1144,1192 ---- { if (GET_CODE (op) == CONST_INT) { ! HOST_WIDE_INT c, lsb; ! /* We don't change the number of transitions by inverting, ! so make sure we start with the LS bit zero. */ ! c = INTVAL (op); ! if (c & 1) ! c = ~c; ! /* Reject all zeros or all ones. */ ! if (c == 0) return 0; ! /* Find the transition, and check that all bits above are 1's. */ ! lsb = c & -c; ! return c == -lsb; } else if (GET_CODE (op) == CONST_DOUBLE && (mode == VOIDmode || mode == DImode)) { ! HOST_WIDE_INT low, high, lsb; ! if (HOST_BITS_PER_WIDE_INT < 64) ! high = CONST_DOUBLE_HIGH (op); ! low = CONST_DOUBLE_LOW (op); ! if (low & 1) ! { ! if (HOST_BITS_PER_WIDE_INT < 64) ! high = ~high; ! low = ~low; ! } ! if (low == 0) ! { ! if (HOST_BITS_PER_WIDE_INT >= 64 || high == 0) ! return 0; ! lsb = high & -high; ! return high == -lsb; ! } ! lsb = low & -low; ! return low == -lsb && (HOST_BITS_PER_WIDE_INT >= 64 || high == ~0); } else return 0; *************** lwa_operand (op, mode) *** 1312,1318 **** return gpc_reg_operand (inner, mode) || (memory_operand (inner, mode) && GET_CODE (XEXP (inner, 0)) != PRE_INC ! && GET_CODE (XEXP (inner, 0)) != PRE_DEC); } /* Return 1 if the operand, used inside a MEM, is a valid first argument --- 1249,1258 ---- return gpc_reg_operand (inner, mode) || (memory_operand (inner, mode) && GET_CODE (XEXP (inner, 0)) != PRE_INC ! && GET_CODE (XEXP (inner, 0)) != PRE_DEC ! && (GET_CODE (XEXP (inner, 0)) != PLUS ! || GET_CODE (XEXP (XEXP (inner, 0), 1)) != CONST_INT ! || INTVAL (XEXP (XEXP (inner, 0), 1)) % 4 == 0)); } /* Return 1 if the operand, used inside a MEM, is a valid first argument *************** includes_rshift_p (shiftop, andop) *** 3481,3516 **** return (INTVAL (andop) & ~shift_mask) == 0; } ! /* Return 1 if ANDOP is a mask that has no bits on that are not in the ! mask required to convert the result of a rotate insn into a shift ! left insn of SHIFTOP bits. */ int ! includes_lshift64_p (shiftop, andop) register rtx shiftop; register rtx andop; { ! #if HOST_BITS_PER_WIDE_INT == 64 ! unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; ! shift_mask <<= INTVAL (shiftop); ! return (INTVAL (andop) & ~shift_mask) == 0; ! #else ! unsigned HOST_WIDE_INT shift_mask_low = ~(unsigned HOST_WIDE_INT) 0; ! unsigned HOST_WIDE_INT shift_mask_high = ~(unsigned HOST_WIDE_INT) 0; ! shift_mask_low <<= INTVAL (shiftop); ! if (INTVAL (shiftop) > 32) ! shift_mask_high <<= (INTVAL (shiftop) - 32); if (GET_CODE (andop) == CONST_INT) ! return (INTVAL (andop) & ~shift_mask_low) == 0; else ! return ((CONST_DOUBLE_HIGH (andop) & ~shift_mask_high) == 0 ! && (CONST_DOUBLE_LOW (andop) & ~shift_mask_low) == 0); ! #endif } /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates --- 3421,3591 ---- return (INTVAL (andop) & ~shift_mask) == 0; } ! /* Return 1 if ANDOP is a mask suitable for use with an rldic insn ! to perform a left shift. It must have exactly SHIFTOP least ! signifigant 0's, then one or more 1's, then zero or more 0's. */ int ! includes_rldic_lshift_p (shiftop, andop) register rtx shiftop; register rtx andop; { ! if (GET_CODE (andop) == CONST_INT) ! { ! HOST_WIDE_INT c, lsb, shift_mask; ! c = INTVAL (andop); ! if (c == 0 || c == ~0) ! return 0; ! shift_mask = ~0; ! shift_mask <<= INTVAL (shiftop); ! /* Find the least signifigant one bit. */ ! lsb = c & -c; ! /* It must coincide with the LSB of the shift mask. */ ! if (-lsb != shift_mask) ! return 0; ! ! /* Invert to look for the next transition (if any). */ ! c = ~c; ! ! /* Remove the low group of ones (originally low group of zeros). */ ! c &= -lsb; ! ! /* Again find the lsb, and check we have all 1's above. */ ! lsb = c & -c; ! return c == -lsb; ! } ! else if (GET_CODE (andop) == CONST_DOUBLE ! && (GET_MODE (andop) == VOIDmode || GET_MODE (andop) == DImode)) ! { ! HOST_WIDE_INT low, high, lsb; ! HOST_WIDE_INT shift_mask_low, shift_mask_high; ! ! low = CONST_DOUBLE_LOW (andop); ! if (HOST_BITS_PER_WIDE_INT < 64) ! high = CONST_DOUBLE_HIGH (andop); ! ! if ((low == 0 && (HOST_BITS_PER_WIDE_INT >= 64 || high == 0)) ! || (low == ~0 && (HOST_BITS_PER_WIDE_INT >= 64 || high == ~0))) ! return 0; ! ! if (HOST_BITS_PER_WIDE_INT < 64 && low == 0) ! { ! shift_mask_high = ~0; ! if (INTVAL (shiftop) > 32) ! shift_mask_high <<= INTVAL (shiftop) - 32; ! ! lsb = high & -high; ! ! if (-lsb != shift_mask_high || INTVAL (shiftop) < 32) ! return 0; ! ! high = ~high; ! high &= -lsb; ! ! lsb = high & -high; ! return high == -lsb; ! } ! ! shift_mask_low = ~0; ! shift_mask_low <<= INTVAL (shiftop); ! ! lsb = low & -low; ! ! if (-lsb != shift_mask_low) ! return 0; ! ! if (HOST_BITS_PER_WIDE_INT < 64) ! high = ~high; ! low = ~low; ! low &= -lsb; ! ! if (HOST_BITS_PER_WIDE_INT < 64 && low == 0) ! { ! lsb = high & -high; ! return high == -lsb; ! } ! ! lsb = low & -low; ! return low == -lsb && (HOST_BITS_PER_WIDE_INT >= 64 || high == ~0); ! } ! else ! return 0; ! } ! ! /* Return 1 if ANDOP is a mask suitable for use with an rldicr insn ! to perform a left shift. It must have SHIFTOP or more least ! signifigant 0's, with the remainder of the word 1's. */ + int + includes_rldicr_lshift_p (shiftop, andop) + register rtx shiftop; + register rtx andop; + { if (GET_CODE (andop) == CONST_INT) ! { ! HOST_WIDE_INT c, lsb, shift_mask; ! ! shift_mask = ~0; ! shift_mask <<= INTVAL (shiftop); ! c = INTVAL (andop); ! ! /* Find the least signifigant one bit. */ ! lsb = c & -c; ! ! /* It must be covered by the shift mask. ! This test also rejects c == 0. */ ! if ((lsb & shift_mask) == 0) ! return 0; ! ! /* Check we have all 1's above the transition, and reject all 1's. */ ! return c == -lsb && lsb != 1; ! } ! else if (GET_CODE (andop) == CONST_DOUBLE ! && (GET_MODE (andop) == VOIDmode || GET_MODE (andop) == DImode)) ! { ! HOST_WIDE_INT low, lsb, shift_mask_low; ! ! low = CONST_DOUBLE_LOW (andop); ! ! if (HOST_BITS_PER_WIDE_INT < 64) ! { ! HOST_WIDE_INT high, shift_mask_high; ! ! high = CONST_DOUBLE_HIGH (andop); ! ! if (low == 0) ! { ! shift_mask_high = ~0; ! if (INTVAL (shiftop) > 32) ! shift_mask_high <<= INTVAL (shiftop) - 32; ! ! lsb = high & -high; ! ! if ((lsb & shift_mask_high) == 0) ! return 0; ! ! return high == -lsb; ! } ! if (high != ~0) ! return 0; ! } ! ! shift_mask_low = ~0; ! shift_mask_low <<= INTVAL (shiftop); ! ! lsb = low & -low; ! ! if ((lsb & shift_mask_low) == 0) ! return 0; ! ! return low == -lsb && lsb != 1; ! } else ! return 0; } /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates *************** print_operand (file, x, code) *** 4314,4322 **** case 'W': /* MB value for a PowerPC64 rldic operand. */ - if (! rldic_operand (x, VOIDmode)) - output_operand_lossage ("invalid %%W value"); - val = (GET_CODE (x) == CONST_INT ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); --- 4389,4394 ---- *************** rs6000_emit_prologue () *** 6098,6106 **** to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's OK. All we have to do is specify that _one_ condition code register is saved in this stack slot. The thrower's epilogue ! will then restore all the call-saved registers. */ rs6000_frame_related (insn, frame_ptr_rtx, info->total_size, ! cr_save_rtx, gen_rtx_REG (SImode, CR0_REGNO)); } /* Update stack and set back pointer unless this is V.4, --- 6170,6179 ---- to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's OK. All we have to do is specify that _one_ condition code register is saved in this stack slot. The thrower's epilogue ! will then restore all the call-saved registers. ! We use CR2_REGNO (70) to be compatible with gcc-2.95 on Linux. */ rs6000_frame_related (insn, frame_ptr_rtx, info->total_size, ! cr_save_rtx, gen_rtx_REG (SImode, CR2_REGNO)); } /* Update stack and set back pointer unless this is V.4, *************** rs6000_adjust_priority (insn, priority) *** 7657,7663 **** } /* Return how many instructions the machine can issue per cycle */ ! int get_issue_rate() { switch (rs6000_cpu_attr) { case CPU_RIOS1: /* ? */ --- 7730,7737 ---- } /* Return how many instructions the machine can issue per cycle */ ! int ! get_issue_rate () { switch (rs6000_cpu_attr) { case CPU_RIOS1: /* ? */ *************** rs6000_initialize_trampoline (addr, fnad *** 7735,7741 **** rtx fn_reg = gen_reg_rtx (pmode); rtx toc_reg = gen_reg_rtx (pmode); emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); ! emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); emit_move_insn (MEM_DEREF (addr), fn_reg); emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); --- 7809,7815 ---- rtx fn_reg = gen_reg_rtx (pmode); rtx toc_reg = gen_reg_rtx (pmode); emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); ! emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); emit_move_insn (MEM_DEREF (addr), fn_reg); emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); diff -Nrc3pad gcc-3.0.1/gcc/config/rs6000/rs6000.h gcc-3.0.2/gcc/config/rs6000/rs6000.h *** gcc-3.0.1/gcc/config/rs6000/rs6000.h Sat Jul 14 15:50:30 2001 --- gcc-3.0.2/gcc/config/rs6000/rs6000.h Mon Sep 10 11:06:28 2001 *************** do { \ *** 2678,2683 **** --- 2678,2684 ---- {"reg_or_add_cint64_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_sub_cint64_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_logical_cint_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ + {"scc_eq_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ {"easy_fp_constant", {CONST_DOUBLE}}, \ *************** do { \ *** 2695,2701 **** {"non_logical_cint_operand", {CONST_INT, CONST_DOUBLE}}, \ {"mask_operand", {CONST_INT}}, \ {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \ - {"rldic_operand", {CONST_INT, CONST_DOUBLE}}, \ {"count_register_operand", {REG}}, \ {"xer_operand", {REG}}, \ {"call_operand", {SYMBOL_REF, REG}}, \ --- 2696,2701 ---- diff -Nrc3pad gcc-3.0.1/gcc/config/rs6000/rs6000.md gcc-3.0.2/gcc/config/rs6000/rs6000.md *** gcc-3.0.1/gcc/config/rs6000/rs6000.md Sat Jul 14 15:50:31 2001 --- gcc-3.0.2/gcc/config/rs6000/rs6000.md Mon Sep 10 11:06:29 2001 *************** *** 6558,6565 **** [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i")) ! (match_operand:DI 3 "rldic_operand" "n")))] ! "TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])" "rldic %0,%1,%H2,%W3") (define_insn "ashldi3_internal5" --- 6558,6565 ---- [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i")) ! (match_operand:DI 3 "const_int_operand" "n")))] ! "TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])" "rldic %0,%1,%H2,%W3") (define_insn "ashldi3_internal5" *************** *** 6567,6576 **** (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "rldic_operand" "n,n")) (const_int 0))) (clobber (match_scratch:DI 4 "=r,r"))] ! "TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])" "@ rldic. %4,%1,%H2,%W3 #" --- 6567,6576 ---- (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "const_int_operand" "n,n")) (const_int 0))) (clobber (match_scratch:DI 4 "=r,r"))] ! "TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])" "@ rldic. %4,%1,%H2,%W3 #" *************** *** 6582,6591 **** (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "rldic_operand" "")) (const_int 0))) (clobber (match_scratch:DI 4 ""))] ! "TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3]) && reload_completed" [(set (match_dup 4) (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3))) --- 6582,6592 ---- (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "const_int_operand" "")) (const_int 0))) (clobber (match_scratch:DI 4 ""))] ! "TARGET_POWERPC64 && reload_completed ! && includes_rldic_lshift_p (operands[2], operands[3])" [(set (match_dup 4) (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3))) *************** *** 6599,6609 **** (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "rldic_operand" "n,n")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "=r,r") (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3])" "@ rldic. %0,%1,%H2,%W3 #" --- 6600,6610 ---- (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "const_int_operand" "n,n")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "=r,r") (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && includes_rldic_lshift_p (operands[2], operands[3])" "@ rldic. %0,%1,%H2,%W3 #" *************** *** 6615,6625 **** (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "rldic_operand" "")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "") (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && includes_lshift64_p (operands[2], operands[3]) && reload_completed" [(set (match_dup 0) (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3))) --- 6616,6703 ---- (compare:CC (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "const_int_operand" "")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "") (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && reload_completed ! && includes_rldic_lshift_p (operands[2], operands[3])" ! [(set (match_dup 0) ! (and:DI (ashift:DI (match_dup 1) (match_dup 2)) ! (match_dup 3))) ! (set (match_dup 4) ! (compare:CC (match_dup 0) ! (const_int 0)))] ! "") ! ! (define_insn "*ashldi3_internal7" ! [(set (match_operand:DI 0 "gpc_reg_operand" "=r") ! (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r") ! (match_operand:SI 2 "const_int_operand" "i")) ! (match_operand:DI 3 "mask64_operand" "S")))] ! "TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])" ! "rldicr %0,%1,%H2,%S3") ! ! (define_insn "ashldi3_internal8" ! [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") ! (compare:CC ! (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") ! (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "mask64_operand" "S,S")) ! (const_int 0))) ! (clobber (match_scratch:DI 4 "=r,r"))] ! "TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])" ! "@ ! rldicr. %4,%1,%H2,%S3 ! #" ! [(set_attr "type" "delayed_compare") ! (set_attr "length" "4,8")]) ! ! (define_split ! [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "") ! (compare:CC ! (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") ! (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "mask64_operand" "")) ! (const_int 0))) ! (clobber (match_scratch:DI 4 ""))] ! "TARGET_POWERPC64 && reload_completed ! && includes_rldicr_lshift_p (operands[2], operands[3])" ! [(set (match_dup 4) ! (and:DI (ashift:DI (match_dup 1) (match_dup 2)) ! (match_dup 3))) ! (set (match_dup 0) ! (compare:CC (match_dup 4) ! (const_int 0)))] ! "") ! ! (define_insn "*ashldi3_internal9" ! [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y") ! (compare:CC ! (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") ! (match_operand:SI 2 "const_int_operand" "i,i")) ! (match_operand:DI 3 "mask64_operand" "S,S")) ! (const_int 0))) ! (set (match_operand:DI 0 "gpc_reg_operand" "=r,r") ! (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && includes_rldicr_lshift_p (operands[2], operands[3])" ! "@ ! rldicr. %0,%1,%H2,%S3 ! #" ! [(set_attr "type" "delayed_compare") ! (set_attr "length" "4,8")]) ! ! (define_split ! [(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "") ! (compare:CC ! (and:DI (ashift:DI (match_operand:DI 1 "gpc_reg_operand" "") ! (match_operand:SI 2 "const_int_operand" "")) ! (match_operand:DI 3 "mask64_operand" "")) ! (const_int 0))) ! (set (match_operand:DI 0 "gpc_reg_operand" "") ! (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3)))] ! "TARGET_POWERPC64 && reload_completed ! && includes_rldicr_lshift_p (operands[2], operands[3])" [(set (match_dup 0) (and:DI (ashift:DI (match_dup 1) (match_dup 2)) (match_dup 3))) *************** operands[2] = GEN_INT (INTVAL (operands[ *** 10182,10188 **** (define_insn "" [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r") (eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r") ! (match_operand:DI 2 "reg_or_cint_operand" "r,O,K,J,I"))) (clobber (match_scratch:DI 3 "=r,&r,r,r,r"))] "TARGET_POWERPC64" "@ --- 10260,10266 ---- (define_insn "" [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r") (eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r") ! (match_operand:DI 2 "scc_eq_operand" "r,O,K,J,I"))) (clobber (match_scratch:DI 3 "=r,&r,r,r,r"))] "TARGET_POWERPC64" "@ *************** operands[2] = GEN_INT (INTVAL (operands[ *** 10239,10245 **** [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y") (compare:CC (eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") ! (match_operand:DI 2 "reg_or_cint_operand" "r,O,K,J,I,r,O,K,J,I")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r") (eq:DI (match_dup 1) (match_dup 2))) --- 10317,10323 ---- [(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y") (compare:CC (eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") ! (match_operand:DI 2 "scc_eq_operand" "r,O,K,J,I,r,O,K,J,I")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r") (eq:DI (match_dup 1) (match_dup 2))) *************** operands[2] = GEN_INT (INTVAL (operands[ *** 10263,10269 **** [(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "") (compare:CC (eq:DI (match_operand:DI 1 "gpc_reg_operand" "") ! (match_operand:DI 2 "reg_or_cint_operand" "")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "") (eq:DI (match_dup 1) (match_dup 2))) --- 10341,10347 ---- [(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "") (compare:CC (eq:DI (match_operand:DI 1 "gpc_reg_operand" "") ! (match_operand:DI 2 "scc_eq_operand" "")) (const_int 0))) (set (match_operand:DI 0 "gpc_reg_operand" "") (eq:DI (match_dup 1) (match_dup 2))) diff -Nrc3pad gcc-3.0.1/gcc/config/rs6000/t-aix43 gcc-3.0.2/gcc/config/rs6000/t-aix43 *** gcc-3.0.1/gcc/config/rs6000/t-aix43 Sun Jan 7 13:55:10 2001 --- gcc-3.0.2/gcc/config/rs6000/t-aix43 Mon Sep 10 13:53:11 2001 *************** SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2 *** 62,68 **** rm -f @multilib_dir@/shr.o # $(slibdir) double quoted to protect it from expansion while building # libgcc.mk. We want this delayed until actual install time. ! SHLIB_INSTALL = $(INSTALL_DATA) @shlib_base_name@.a $$(slibdir)/ SHLIB_LIBS = -lc `case @shlib_base_name@ in *pthread*) echo -lpthread ;; esac` SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver --- 62,70 ---- rm -f @multilib_dir@/shr.o # $(slibdir) double quoted to protect it from expansion while building # libgcc.mk. We want this delayed until actual install time. ! # Install the shared library without read-other permission so that it ! # is loaded into the process private segment. ! SHLIB_INSTALL = $(INSTALL) -m 751 @shlib_base_name@.a $$(slibdir)/ SHLIB_LIBS = -lc `case @shlib_base_name@ in *pthread*) echo -lpthread ;; esac` SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver diff -Nrc3pad gcc-3.0.1/gcc/config/s390/s390-protos.h gcc-3.0.2/gcc/config/s390/s390-protos.h *** gcc-3.0.1/gcc/config/s390/s390-protos.h Fri Aug 3 11:50:11 2001 --- gcc-3.0.2/gcc/config/s390/s390-protos.h Sat Sep 29 15:48:08 2001 *************** extern int bras_sym_operand PARAMS ((rtx *** 39,44 **** --- 39,45 ---- extern int dead_p PARAMS ((rtx, rtx)); extern void print_operand PARAMS ((FILE *, rtx, char)); extern void print_operand_address PARAMS ((FILE *, rtx)); + extern int legitimate_la_operand_p PARAMS ((rtx)); extern int legitimate_pic_operand_p PARAMS ((rtx)); extern int legitimate_constant_p PARAMS ((rtx)); diff -Nrc3pad gcc-3.0.1/gcc/config/s390/s390.c gcc-3.0.2/gcc/config/s390/s390.c *** gcc-3.0.1/gcc/config/s390/s390.c Fri Aug 10 15:19:19 2001 --- gcc-3.0.2/gcc/config/s390/s390.c Sat Sep 29 15:48:08 2001 *************** legitimate_address_p (mode, addr, strict *** 813,818 **** --- 813,852 ---- return s390_decompose_address (addr, NULL, strict); } + /* Return 1 if OP is a valid operand for the LA instruction. + In 31-bit, we need to prove that the result is used as an + address, as LA performs only a 31-bit addition. */ + + int + legitimate_la_operand_p (op) + register rtx op; + { + struct s390_address addr; + if (!s390_decompose_address (op, &addr, FALSE)) + return FALSE; + + if (TARGET_64BIT) + return TRUE; + + /* Use of the base or stack pointer implies address. */ + + if (addr.base && GET_CODE (addr.base) == REG) + { + if (REGNO (addr.base) == BASE_REGISTER + || REGNO (addr.base) == STACK_POINTER_REGNUM) + return TRUE; + } + + if (addr.indx && GET_CODE (addr.indx) == REG) + { + if (REGNO (addr.indx) == BASE_REGISTER + || REGNO (addr.indx) == STACK_POINTER_REGNUM) + return TRUE; + } + + return FALSE; + } + /* Return a legitimate reference for ORIG (an address) using the register REG. If REG is 0, a new pseudo is generated. *************** legitimize_address (x, oldx, mode) *** 1130,1137 **** register rtx oldx ATTRIBUTE_UNUSED; enum machine_mode mode; { ! if (flag_pic && SYMBOLIC_CONST (x)) ! return legitimize_pic_address (x, 0); return x; } --- 1164,1210 ---- register rtx oldx ATTRIBUTE_UNUSED; enum machine_mode mode; { ! rtx constant_term = const0_rtx; ! ! if (flag_pic) ! { ! if (SYMBOLIC_CONST (x) ! || (GET_CODE (x) == PLUS ! && (SYMBOLIC_CONST (XEXP (x, 0)) ! || SYMBOLIC_CONST (XEXP (x, 1))))) ! x = legitimize_pic_address (x, 0); ! ! if (legitimate_address_p (mode, x, FALSE)) ! return x; ! } ! ! x = eliminate_constant_term (x, &constant_term); ! ! if (GET_CODE (x) == PLUS) ! { ! if (GET_CODE (XEXP (x, 0)) == REG) ! { ! register rtx temp = gen_reg_rtx (Pmode); ! register rtx val = force_operand (XEXP (x, 1), temp); ! if (val != temp) ! emit_move_insn (temp, val); ! ! x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp); ! } ! ! else if (GET_CODE (XEXP (x, 1)) == REG) ! { ! register rtx temp = gen_reg_rtx (Pmode); ! register rtx val = force_operand (XEXP (x, 0), temp); ! if (val != temp) ! emit_move_insn (temp, val); ! ! x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1)); ! } ! } ! ! if (constant_term != const0_rtx) ! x = gen_rtx_PLUS (Pmode, x, constant_term); return x; } *************** s390_adjust_cost (rtx insn, rtx link, rt *** 1522,1534 **** if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0) return cost; - /* If cost equal 1 nothing needs to be checked. */ - - if (cost == 1) - { - return cost; - } - dep_rtx = PATTERN (dep_insn); if (GET_CODE (dep_rtx) == SET) --- 1595,1600 ---- *************** s390_adjust_cost (rtx insn, rtx link, rt *** 1542,1548 **** debug_rtx (dep_insn); debug_rtx (insn); } ! return cost; } } --- 1608,1614 ---- debug_rtx (dep_insn); debug_rtx (insn); } ! return cost + 4; } } *************** s390_adjust_cost (rtx insn, rtx link, rt *** 1560,1572 **** debug_rtx (dep_insn); debug_rtx (insn); } ! return cost; } } } /* default cost. */ ! return 1; } /* Pool concept for Linux 390: --- 1626,1638 ---- debug_rtx (dep_insn); debug_rtx (insn); } ! return cost + 4; } } } /* default cost. */ ! return cost; } /* Pool concept for Linux 390: *************** s390_function_prologue (FILE * file, int *** 2381,2388 **** /* Decrement stack. */ ! if (TARGET_BACKCHAIN || (STARTING_FRAME_OFFSET + ! lsize + STACK_POINTER_OFFSET > 4095 || frame_pointer_needed || current_function_calls_alloca)) { --- 2447,2453 ---- /* Decrement stack. */ ! if (TARGET_BACKCHAIN || (frame_size + STACK_POINTER_OFFSET > 4095 || frame_pointer_needed || current_function_calls_alloca)) { *************** s390_function_prologue (FILE * file, int *** 2422,2429 **** /* Generate backchain. */ ! if (TARGET_BACKCHAIN || (STARTING_FRAME_OFFSET + ! lsize + STACK_POINTER_OFFSET > 4095 || frame_pointer_needed || current_function_calls_alloca)) { --- 2487,2493 ---- /* Generate backchain. */ ! if (TARGET_BACKCHAIN || (frame_size + STACK_POINTER_OFFSET > 4095 || frame_pointer_needed || current_function_calls_alloca)) { diff -Nrc3pad gcc-3.0.1/gcc/config/s390/s390.md gcc-3.0.2/gcc/config/s390/s390.md *** gcc-3.0.1/gcc/config/s390/s390.md Fri Aug 10 15:19:19 2001 --- gcc-3.0.2/gcc/config/s390/s390.md Sat Sep 29 15:48:08 2001 *************** *** 77,126 **** (define_attr "type" "set,xset,la" (const_string "xset")) ; ! ; Set operations changing a target register, which could be used for ! ; address generation. Adjust cost will check, if realy applicable. ! ; ! ! (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "set") ! (eq_attr "cycle" "1")) ! 5 1 [(eq_attr "atype" "mem")] ) ! ! (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "set") ! (eq_attr "cycle" "2")) 5 2) ! ! (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "set") ! (eq_attr "cycle" "3")) 5 3) ! ! (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "set") ! (eq_attr "cycle" "n")) 5 4) ! ! (define_function_unit "memory" 1 0 ! (eq_attr "type" "la") 2 1) ! ; - ; xset insns, which don't set any valid address register. - ; Only the issue delay matters. - ; (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "xset") ! (eq_attr "cycle" "1")) 1 1) (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "xset") ! (eq_attr "cycle" "2")) 1 2) (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "xset") ! (eq_attr "cycle" "3")) 1 3) (define_function_unit "memory" 1 0 ! (and (eq_attr "type" "xset") ! (eq_attr "cycle" "n")) 1 4) ; Operand type. Used to default length attribute values --- 77,97 ---- (define_attr "type" "set,xset,la" (const_string "xset")) ; ! ; Dummy function unit. We only care for the cycle count. ! ; Everthing else is done by ADJUST_COST. ; (define_function_unit "memory" 1 0 ! (eq_attr "cycle" "1") 1 1) (define_function_unit "memory" 1 0 ! (eq_attr "cycle" "2") 2 2) (define_function_unit "memory" 1 0 ! (eq_attr "cycle" "3") 3 3) (define_function_unit "memory" 1 0 ! (eq_attr "cycle" "n") 4 4) ; Operand type. Used to default length attribute values *************** *** 387,393 **** (define_insn "*cmpsi_cct" [(set (reg 33) ! (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "%d") (match_operand:SI 1 "const1_operand" "") (match_operand:SI 2 "immediate_operand" "I")) (const_int 0)))] --- 358,364 ---- (define_insn "*cmpsi_cct" [(set (reg 33) ! (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "d") (match_operand:SI 1 "const1_operand" "") (match_operand:SI 2 "immediate_operand" "I")) (const_int 0)))] *************** *** 900,905 **** --- 871,889 ---- if (flag_pic && SYMBOLIC_CONST (operands[1])) emit_pic_move (operands, SImode); + + /* expr.c tries to load an effective address using + force_reg. This fails because we don't have a + generic load_address pattern. Convert the move + to a proper arithmetic operation instead, unless + it is guaranteed to be OK. */ + if (GET_CODE (operands[1]) == PLUS + && !legitimate_la_operand_p (operands[1])) + { + operands[1] = force_operand (operands[1], operands[0]); + if (operands[1] == operands[0]) + DONE; + } }") (define_insn "*movsi" *************** *** 2973,3052 **** (set_attr "atype" "mem") (set_attr "type" "la")]) - (define_insn "*addaddr_picR" - [(set (match_operand:SI 0 "register_operand" "=d") - (plus:SI (match_operand:SI 1 "register_operand" "a") - (unspec:SI [(match_operand:SI 2 "register_operand" "a")] 101)))] - "" - "la\\t%0,0(%1,%2)" - [(set_attr "op_type" "RX") - (set_attr "atype" "mem") - (set_attr "type" "la")]) - - (define_insn "*addaddr_picL" - [(set (match_operand:SI 0 "register_operand" "=d") - (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "a")] 101) - (match_operand:SI 1 "register_operand" "a")))] - "" - "la\\t%0,0(%1,%2)" - [(set_attr "op_type" "RX") - (set_attr "atype" "mem") - (set_attr "type" "la")]) - - (define_insn "*addaddr_picN" - [(set (match_operand:SI 0 "register_operand" "=d") - (unspec:SI [(match_operand:SI 1 "register_operand" "a")] 101))] - "" - "la\\t%0,0(%1)" - [(set_attr "op_type" "RX") - (set_attr "atype" "mem") - (set_attr "type" "la")]) - - (define_insn "*addsi3_cc" - [(set (reg 33) - (compare (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0") - (match_operand:SI 2 "general_operand" "d,K,m")) - (const_int 0))) - (set (match_operand:SI 0 "register_operand" "=d,d,d") - (plus:SI (match_dup 1) (match_dup 2)))] - "s390_match_ccmode(insn, CCSmode)" - "@ - ar\\t%0,%2 - ahi\\t%0,%h2 - a\\t%0,%2" - [(set_attr "op_type" "RR,RI,RX") - (set_attr "atype" "reg,reg,mem") - (set_attr "type" "set")]) - - (define_insn "*addsi3_cconly" - [(set (reg 33) - (compare (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0") - (match_operand:SI 2 "general_operand" "d,K,m")) - (const_int 0))) - (clobber (match_scratch:SI 0 "=d,d,d"))] - "s390_match_ccmode(insn, CCSmode)" - "@ - ar\\t%0,%2 - ahi\\t%0,%h2 - a\\t%0,%2" - [(set_attr "op_type" "RR,RI,RX") - (set_attr "atype" "reg,reg,mem") - (set_attr "type" "set")]) - - (define_insn "*addsi3_cconly2" - [(set (reg 33) - (compare (match_operand:SI 1 "register_operand" "%0,0,0") - (neg:SI (match_operand:SI 2 "general_operand" "d,K,m")))) - (clobber (match_scratch:SI 0 "=d,d,d"))] - "s390_match_ccmode(insn, CCSmode)" - "@ - ar\\t%0,%2 - ahi\\t%0,%h2 - a\\t%0,%2" - [(set_attr "op_type" "RR,RI,RX") - (set_attr "atype" "reg,reg,mem") - (set_attr "type" "set")]) - (define_insn "addsi3" [(set (match_operand:SI 0 "register_operand" "=d,d,d") (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0") --- 2957,2962 ---- *************** *** 3061,3070 **** (set_attr "atype" "reg,reg,mem") (set_attr "type" "set")]) ! (define_insn "do_la" [(set (match_operand:SI 0 "register_operand" "=a") (match_operand:QI 1 "address_operand" "p"))] ! "volatile_ok" "la\\t%0,%a1" [(set_attr "op_type" "RX") (set_attr "atype" "mem") --- 2971,2981 ---- (set_attr "atype" "reg,reg,mem") (set_attr "type" "set")]) ! (define_insn "*do_la" [(set (match_operand:SI 0 "register_operand" "=a") (match_operand:QI 1 "address_operand" "p"))] ! "reload_in_progress || reload_completed ! || legitimate_la_operand_p (operands[1])" "la\\t%0,%a1" [(set_attr "op_type" "RX") (set_attr "atype" "mem") *************** *** 3074,3080 **** [(set (match_operand:SI 0 "register_operand" "=d") (plus:SI (match_operand:SI 1 "register_operand" "%0") (match_operand:SI 2 "register_operand" "d")))] ! "" "brxle\\t%0,%2,.+4" [(set_attr "op_type" "RSI") (set_attr "atype" "reg") --- 2985,2991 ---- [(set (match_operand:SI 0 "register_operand" "=d") (plus:SI (match_operand:SI 1 "register_operand" "%0") (match_operand:SI 2 "register_operand" "d")))] ! "reload_in_progress || reload_completed" "brxle\\t%0,%2,.+4" [(set_attr "op_type" "RSI") (set_attr "atype" "reg") *************** *** 3284,3318 **** ; ; subsi3 instruction pattern(s). ; - - (define_insn "*subsi3_cc" - [(set (reg 33) - (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "general_operand" "d,m")) - (const_int 0))) - (set (match_operand:SI 0 "register_operand" "=d,d") - (minus:SI (match_dup 1) (match_dup 2)))] - "s390_match_ccmode(insn, CCSmode)" - "@ - sr\\t%0,%2 - s\\t%0,%2" - [(set_attr "op_type" "RR,RX") - (set_attr "atype" "reg,mem") - (set_attr "type" "set")]) - - (define_insn "*subsi3_cconly" - [(set (reg 33) - (compare (minus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "general_operand" "d,m")) - (const_int 0))) - (clobber (match_scratch:SI 0 "=d,d"))] - "s390_match_ccmode(insn, CCSmode)" - "@ - sr\\t%0,%2 - s\\t%0,%2" - [(set_attr "op_type" "RR,RX") - (set_attr "atype" "reg,mem") - (set_attr "type" "set")]) (define_insn "subsi3" [(set (match_operand:SI 0 "register_operand" "=d,d") --- 3195,3200 ---- diff -Nrc3pad gcc-3.0.1/gcc/config/sh/sh.c gcc-3.0.2/gcc/config/sh/sh.c *** gcc-3.0.1/gcc/config/sh/sh.c Tue Jun 26 04:08:31 2001 --- gcc-3.0.2/gcc/config/sh/sh.c Thu Sep 20 07:11:01 2001 *************** shiftcosts (x) *** 1005,1010 **** --- 1005,1020 ---- { int value; + if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) + { + if (GET_MODE (x) == DImode + && GET_CODE (XEXP (x, 1)) == CONST_INT + && INTVAL (XEXP (x, 1)) == 1) + return 2; + + /* Everything else is invalid, because there is no pattern for it. */ + return 10000; + } /* If shift by a non constant, then this will be expensive. */ if (GET_CODE (XEXP (x, 1)) != CONST_INT) return SH_DYNAMIC_SHIFT_COST; *************** initial_elimination_offset (from, to) *** 4538,4543 **** --- 4548,4560 ---- int save_flags = target_flags; int live_regs_mask, live_regs_mask2; + + if (from == RETURN_ADDRESS_POINTER_REGNUM) + /* Kludge: since we assume that the return address is on the stack, + make it so. N.B. We rely on RETURN_ADDRESS_POINTER_REGNUM being + processed before ARG_POINTER_REGNUM here. */ + regs_ever_live[PR_REG] = 1; + live_regs_mask = calc_live_regs (®s_saved, &live_regs_mask2); total_auto_space = rounded_frame_size (regs_saved); target_flags = save_flags; *************** initial_elimination_offset (from, to) *** 4556,4568 **** if (from == RETURN_ADDRESS_POINTER_REGNUM && (to == FRAME_POINTER_REGNUM || to == STACK_POINTER_REGNUM)) ! { ! int i, n = total_saved_regs_space; ! for (i = PR_REG-1; i >= 0; i--) ! if (live_regs_mask & (1 << i)) ! n -= 4; ! return n + total_auto_space; ! } abort (); } --- 4573,4579 ---- if (from == RETURN_ADDRESS_POINTER_REGNUM && (to == FRAME_POINTER_REGNUM || to == STACK_POINTER_REGNUM)) ! return total_auto_space; abort (); } diff -Nrc3pad gcc-3.0.1/gcc/config/sparc/linux.h gcc-3.0.2/gcc/config/sparc/linux.h *** gcc-3.0.1/gcc/config/sparc/linux.h Mon Apr 16 11:25:52 2001 --- gcc-3.0.2/gcc/config/sparc/linux.h Wed Sep 5 01:55:14 2001 *************** Boston, MA 02111-1307, USA. */ *** 32,37 **** --- 32,41 ---- #define MULTIBYTE_CHARS 1 #endif + /* The GNU C++ standard library requires that these macros be defined. */ + #undef CPLUSPLUS_CPP_SPEC + #define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)" + #ifndef USE_GNULIBC_1 #undef DEFAULT_VTABLE_THUNKS #define DEFAULT_VTABLE_THUNKS 1 diff -Nrc3pad gcc-3.0.1/gcc/config/sparc/linux64.h gcc-3.0.2/gcc/config/sparc/linux64.h *** gcc-3.0.1/gcc/config/sparc/linux64.h Mon Apr 16 11:25:52 2001 --- gcc-3.0.2/gcc/config/sparc/linux64.h Wed Sep 5 01:55:14 2001 *************** Boston, MA 02111-1307, USA. */ *** 26,31 **** --- 26,35 ---- /* Don't assume anything about the header files. */ #define NO_IMPLICIT_EXTERN_C + /* The GNU C++ standard library requires that these macros be defined. */ + #undef CPLUSPLUS_CPP_SPEC + #define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)" + #undef DEFAULT_VTABLE_THUNKS #define DEFAULT_VTABLE_THUNKS 1 diff -Nrc3pad gcc-3.0.1/gcc/config.gcc gcc-3.0.2/gcc/config.gcc *** gcc-3.0.1/gcc/config.gcc Mon Aug 13 08:34:14 2001 --- gcc-3.0.2/gcc/config.gcc Tue Oct 9 17:25:25 2001 *************** i[34567]86-*-mingw32*) *** 1497,1506 **** fi exeext=.exe case $machine in ! *mingw32msv*) ! ;; ! *minwg32crt* | *mingw32*) tm_file="${tm_file} i386/crtdll.h" ;; esac ;; --- 1497,1506 ---- fi exeext=.exe case $machine in ! *mingw32crt*) tm_file="${tm_file} i386/crtdll.h" + ;; + *minwg32msv* | *mingw32*) ;; esac ;; diff -Nrc3pad gcc-3.0.1/gcc/cp/ChangeLog gcc-3.0.2/gcc/cp/ChangeLog *** gcc-3.0.1/gcc/cp/ChangeLog Sun Aug 19 14:08:14 2001 --- gcc-3.0.2/gcc/cp/ChangeLog Tue Oct 23 10:19:31 2001 *************** *** 1,3 **** --- 1,64 ---- + 2001-10-23 Release Manager + + * GCC 3.0.2 Released. + + 2001-10-03 John David Anglin + + * rtti.c (get_tinfo_decl): Call typeinfo_in_lib_p with the type used + to build the declaration instead of the declaration itself. + + 2001-09-28 Craig Rodrigues + + PR c++/4095 + * rtti.c (create_pseudo_type_info): Fix parameter. + + 2001-09-21 Richard Henderson + + * class.c (set_vindex): Mind TARGET_VTABLE_USES_DESCRIPTORS. + (build_vtbl_initializer): Likewise. + (build_vfn_ref): New. + * cp-tree.h: Declare it. + * call.c (build_over_call): Use it. + * decl2.c (mark_vtable_entries): Mark FDESC_EXPR. + * typeck.c (get_member_function_from_ptrfunc): Mind descriptors. + * rtti.c (get_tinfo_decl_dynamic): Use build_vtbl_ref instead + of build_vfn_ref. + + 2001-09-15 Gabriel Dos Reis + + * Make-lang.in (cp/error.o): Depend on real.h + * error.c: #include "real.h" + + 2001-09-06 Nathan Sidwell + + PR c++/3986 + * class.c (force_canonical_binfo_r): Check & move an indirect + primary base first. + (force_canonical_binfo): Check that it's not already + canonical. + (mark_primary_virtual_base): Remove BINFO parameter. + (mark_primary_bases): Adjust, set BINFO_LOST_PRIMARY_P here. + + (binfo_ctor_vtable): Add prototype. + (get_primary_binfo): Initialize RESULT. + + 2001-09-04 Nathan Sidwell + + PR c++/4203 + * call.c (build_over_call): Do not optimize any empty base + construction. + + 2001-08-30 Kurt Garloff + + * optimize.c (inlinable_function_p): Allow only smaller single + functions. Halve inline limit after reaching recursive limit. + + 2001-08-23 Kriang Lerdsuwanakij + + * pt.c (maybe_fold_nontype_arg): Use TREE_TYPE of ARG as the + criterion to avoid rebuilding expression tree instead of + processing_template_decl. + 2001-08-19 Release Manager * GCC 3.0.1 Released. *************** *** 101,107 **** * cvt.c (convert_lvalue): New fn. * cp-tree.h: Declare it. * method.c (do_build_assign_ref): Use it. ! (do_build_copy_constructor): Convert parm to base types before calling base constructors. 2001-07-25 Nathan Sidwell --- 162,168 ---- * cvt.c (convert_lvalue): New fn. * cp-tree.h: Declare it. * method.c (do_build_assign_ref): Use it. ! (do_build_copy_constructor): Convert parm to base types before calling base constructors. 2001-07-25 Nathan Sidwell *************** *** 121,127 **** params.h. 2001-07-18 Xavier Delacour , ! Gerald Pfeifer * NEWS (Changes in GCC 3.0): Fix typo. --- 182,188 ---- params.h. 2001-07-18 Xavier Delacour , ! Gerald Pfeifer * NEWS (Changes in GCC 3.0): Fix typo. *************** *** 160,166 **** 20010617 Release Manager ! * GCC 3.0 Released. 2001-06-14 Jason Merrill --- 221,227 ---- 20010617 Release Manager ! * GCC 3.0 Released. 2001-06-14 Jason Merrill *************** *** 433,494 **** EH merge from mainline: 2001-04-23 Jason Merrill ! * except.c (build_throw): Wrap the initialization of the exception ! object in a MUST_NOT_THROW_EXPR. ! (do_free_exception): #if 0. ! * cp-tree.def (EH_SPEC_BLOCK): New. ! (MUST_NOT_THROW_EXPR): New. ! * cp-tree.h: Update changed function declarations. ! (CPTI_PUSH_EXCEPTION_IDENTIFIER): Remove. ! (CPTI_CALL_UNEXPECTED): New. ! (struct cp_language_function): Rename x_eh_spec_try_block ! to x_eh_spec_block. ! (EH_SPEC_STMTS, EH_SPEC_RAISES): New. ! * decl.c (current_binding_level): If no current function ! bindings, revert to scope_chain. ! (initialize_predefined_identifiers): Remove __cp_push_exception. ! (store_parm_decls): Use begin_eh_spec_block. ! (finish_function): Use finish_eh_spec_block. ! (mark_lang_function): Update for name changes. ! * decl2.c (finish_file): No mark_all_runtime_matches. ! * dump.c (cp_dump_tree): Handle new tree codes. ! * error.c (dump_expr) [BIND_EXPR]: Fix typo. ! * except.c (catch_language_init, catch_language): Remove. ! (init_exception_processing): Don't set language code. ! Initialize call_unexpected_node, protect_cleanup_actions, ! eh_personality_libfunc, lang_eh_runtime_type. ! (call_eh_info, push_eh_info, get_eh_info, get_eh_value): Remove. ! (get_eh_type, get_eh_caught, get_eh_handlers): Remove. ! (prepare_eh_type): Split out type canonicalizations ... ! (build_eh_type_type): ... from here. ! (build_eh_type_type_ref): Remove. ! (mark_all_runtime_matches): Remove. ! (build_exc_ptr): New. ! (do_begin_catch, do_end_catch): New. ! (do_pop_exception): Remove. ! (build_terminate_handler): Remove. ! (choose_personality_routine): Split out language choice from ... ! (initialize_handler_parm): ... here. ! Use MUST_NOT_THROW_EXPR. ! (expand_start_catch_block): Use do_begin_catch. Simplify Java ! exception object handling. ! (expand_start_eh_spec, expand_end_eh_spec): Remove. ! (expand_exception_blocks, alloc_eh_object): Remove. ! (begin_eh_spec_block, finish_eh_spec_block): New. ! (do_allocate_exception, do_free_exception): New. ! (expand_throw): Merge into ... ! (build_throw): ... here. Update for abi. ! * expr.c (cplus_expand_expr): No expand_internal_throw. ! Handle MUST_NOT_THROW_EXPR. ! * pt.c (tsubst_expr): Handle EH_SPEC_BLOCK. ! * semantics.c (*) Update for except.h name changes. ! (genrtl_try_block): No protect_with_terminate. ! (genrtl_eh_spec_block): New. ! (genrtl_handler): Don't emit the goto here. ! (cp_expand_stmt): Handle EH_SPEC_BLOCK. ! (genrtl_finish_function): Don't expand_exception_blocks. ! * tree.c (cp_statement_code_p): Handle EH_SPEC_BLOCK. * decl.c (struct named_label_list): Rename eh_region to in_try_scope, add in_catch_scope. --- 494,555 ---- EH merge from mainline: 2001-04-23 Jason Merrill ! * except.c (build_throw): Wrap the initialization of the exception ! object in a MUST_NOT_THROW_EXPR. ! (do_free_exception): #if 0. ! * cp-tree.def (EH_SPEC_BLOCK): New. ! (MUST_NOT_THROW_EXPR): New. ! * cp-tree.h: Update changed function declarations. ! (CPTI_PUSH_EXCEPTION_IDENTIFIER): Remove. ! (CPTI_CALL_UNEXPECTED): New. ! (struct cp_language_function): Rename x_eh_spec_try_block ! to x_eh_spec_block. ! (EH_SPEC_STMTS, EH_SPEC_RAISES): New. ! * decl.c (current_binding_level): If no current function ! bindings, revert to scope_chain. ! (initialize_predefined_identifiers): Remove __cp_push_exception. ! (store_parm_decls): Use begin_eh_spec_block. ! (finish_function): Use finish_eh_spec_block. ! (mark_lang_function): Update for name changes. ! * decl2.c (finish_file): No mark_all_runtime_matches. ! * dump.c (cp_dump_tree): Handle new tree codes. ! * error.c (dump_expr) [BIND_EXPR]: Fix typo. ! * except.c (catch_language_init, catch_language): Remove. ! (init_exception_processing): Don't set language code. ! Initialize call_unexpected_node, protect_cleanup_actions, ! eh_personality_libfunc, lang_eh_runtime_type. ! (call_eh_info, push_eh_info, get_eh_info, get_eh_value): Remove. ! (get_eh_type, get_eh_caught, get_eh_handlers): Remove. ! (prepare_eh_type): Split out type canonicalizations ... ! (build_eh_type_type): ... from here. ! (build_eh_type_type_ref): Remove. ! (mark_all_runtime_matches): Remove. ! (build_exc_ptr): New. ! (do_begin_catch, do_end_catch): New. ! (do_pop_exception): Remove. ! (build_terminate_handler): Remove. ! (choose_personality_routine): Split out language choice from ... ! (initialize_handler_parm): ... here. ! Use MUST_NOT_THROW_EXPR. ! (expand_start_catch_block): Use do_begin_catch. Simplify Java ! exception object handling. ! (expand_start_eh_spec, expand_end_eh_spec): Remove. ! (expand_exception_blocks, alloc_eh_object): Remove. ! (begin_eh_spec_block, finish_eh_spec_block): New. ! (do_allocate_exception, do_free_exception): New. ! (expand_throw): Merge into ... ! (build_throw): ... here. Update for abi. ! * expr.c (cplus_expand_expr): No expand_internal_throw. ! Handle MUST_NOT_THROW_EXPR. ! * pt.c (tsubst_expr): Handle EH_SPEC_BLOCK. ! * semantics.c (*) Update for except.h name changes. ! (genrtl_try_block): No protect_with_terminate. ! (genrtl_eh_spec_block): New. ! (genrtl_handler): Don't emit the goto here. ! (cp_expand_stmt): Handle EH_SPEC_BLOCK. ! (genrtl_finish_function): Don't expand_exception_blocks. ! * tree.c (cp_statement_code_p): Handle EH_SPEC_BLOCK. * decl.c (struct named_label_list): Rename eh_region to in_try_scope, add in_catch_scope. diff -Nrc3pad gcc-3.0.1/gcc/cp/Make-lang.in gcc-3.0.2/gcc/cp/Make-lang.in *** gcc-3.0.1/gcc/cp/Make-lang.in Fri Jul 20 12:29:06 2001 --- gcc-3.0.2/gcc/cp/Make-lang.in Fri Sep 21 18:33:22 2001 *************** cp/lex.o: cp/lex.c $(CXX_TREE_H) cp/pars *** 241,247 **** toplev.h output.h mbchar.h $(GGC_H) input.h diagnostic.h cp/operators.def \ $(TM_P_H) cp/decl.o: cp/decl.c $(CXX_TREE_H) flags.h cp/lex.h cp/decl.h stack.h \ ! output.h $(EXPR_H) except.h toplev.h hash.h $(GGC_H) $(RTL_H) cp/operators.def cp/decl2.o: cp/decl2.c $(CXX_TREE_H) flags.h cp/lex.h cp/decl.h $(EXPR_H) \ output.h except.h toplev.h dwarf2out.h dwarfout.h $(GGC_H) $(RTL_H) cp/typeck2.o: cp/typeck2.c $(CXX_TREE_H) flags.h toplev.h output.h $(TM_P_H) --- 241,248 ---- toplev.h output.h mbchar.h $(GGC_H) input.h diagnostic.h cp/operators.def \ $(TM_P_H) cp/decl.o: cp/decl.c $(CXX_TREE_H) flags.h cp/lex.h cp/decl.h stack.h \ ! output.h $(EXPR_H) except.h toplev.h hash.h $(GGC_H) $(RTL_H) \ ! $(TM_P_H) cp/operators.def cp/decl2.o: cp/decl2.c $(CXX_TREE_H) flags.h cp/lex.h cp/decl.h $(EXPR_H) \ output.h except.h toplev.h dwarf2out.h dwarfout.h $(GGC_H) $(RTL_H) cp/typeck2.o: cp/typeck2.c $(CXX_TREE_H) flags.h toplev.h output.h $(TM_P_H) *************** cp/expr.o: cp/expr.c $(CXX_TREE_H) $(RTL *** 266,272 **** cp/xref.o: cp/xref.c $(CXX_TREE_H) input.h toplev.h cp/pt.o: cp/pt.c $(CXX_TREE_H) cp/decl.h cp/parse.h cp/lex.h toplev.h \ $(GGC_H) $(RTL_H) except.h ! cp/error.o: cp/error.c $(CXX_TREE_H) toplev.h diagnostic.h cp/errfn.o: cp/errfn.c $(CXX_TREE_H) toplev.h cp/repo.o: cp/repo.c $(CXX_TREE_H) toplev.h $(GGC_H) cp/semantics.o: cp/semantics.c $(CXX_TREE_H) cp/lex.h except.h toplev.h \ --- 267,273 ---- cp/xref.o: cp/xref.c $(CXX_TREE_H) input.h toplev.h cp/pt.o: cp/pt.c $(CXX_TREE_H) cp/decl.h cp/parse.h cp/lex.h toplev.h \ $(GGC_H) $(RTL_H) except.h ! cp/error.o: cp/error.c $(CXX_TREE_H) toplev.h diagnostic.h real.h cp/errfn.o: cp/errfn.c $(CXX_TREE_H) toplev.h cp/repo.o: cp/repo.c $(CXX_TREE_H) toplev.h $(GGC_H) cp/semantics.o: cp/semantics.c $(CXX_TREE_H) cp/lex.h except.h toplev.h \ diff -Nrc3pad gcc-3.0.1/gcc/cp/call.c gcc-3.0.2/gcc/cp/call.c *** gcc-3.0.1/gcc/cp/call.c Mon Aug 13 13:54:14 2001 --- gcc-3.0.2/gcc/cp/call.c Tue Sep 4 06:03:03 2001 *************** build_over_call (cand, args, flags) *** 4244,4257 **** else if (TYPE_HAS_TRIVIAL_INIT_REF (DECL_CONTEXT (fn))) return build_target_expr_with_type (arg, DECL_CONTEXT (fn)); } ! else if (! real_lvalue_p (arg) /* Empty classes have padding which can be hidden inside an (empty) base of the class. This must not be touched as it might overlay things. When the gcc core learns about empty classes, we can treat it like other classes. */ ! || (!is_empty_class (DECL_CONTEXT (fn)) ! && TYPE_HAS_TRIVIAL_INIT_REF (DECL_CONTEXT (fn)))) { tree address; tree to = stabilize_reference --- 4244,4257 ---- else if (TYPE_HAS_TRIVIAL_INIT_REF (DECL_CONTEXT (fn))) return build_target_expr_with_type (arg, DECL_CONTEXT (fn)); } ! else if ((!real_lvalue_p (arg) ! || TYPE_HAS_TRIVIAL_INIT_REF (DECL_CONTEXT (fn))) /* Empty classes have padding which can be hidden inside an (empty) base of the class. This must not be touched as it might overlay things. When the gcc core learns about empty classes, we can treat it like other classes. */ ! && !is_empty_class (DECL_CONTEXT (fn))) { tree address; tree to = stabilize_reference diff -Nrc3pad gcc-3.0.1/gcc/cp/class.c gcc-3.0.2/gcc/cp/class.c *** gcc-3.0.1/gcc/cp/class.c Tue Aug 7 06:06:42 2001 --- gcc-3.0.2/gcc/cp/class.c Fri Sep 21 18:33:22 2001 *************** static void force_canonical_binfo_r PARA *** 195,207 **** static void force_canonical_binfo PARAMS ((tree, tree, tree, tree)); static tree dfs_unshared_virtual_bases PARAMS ((tree, void *)); static void mark_primary_bases PARAMS ((tree)); ! static tree mark_primary_virtual_base PARAMS ((tree, tree, tree)); static void clone_constructors_and_destructors PARAMS ((tree)); static tree build_clone PARAMS ((tree, tree)); static void update_vtable_entry_for_fn PARAMS ((tree, tree, tree, tree *)); static tree copy_virtuals PARAMS ((tree)); static void build_ctor_vtbl_group PARAMS ((tree, tree)); static void build_vtt PARAMS ((tree)); static tree *build_vtt_inits PARAMS ((tree, tree, tree *, tree *)); static tree dfs_build_secondary_vptr_vtt_inits PARAMS ((tree, void *)); static tree dfs_ctor_vtable_bases_queue_p PARAMS ((tree, void *data)); --- 195,208 ---- static void force_canonical_binfo PARAMS ((tree, tree, tree, tree)); static tree dfs_unshared_virtual_bases PARAMS ((tree, void *)); static void mark_primary_bases PARAMS ((tree)); ! static tree mark_primary_virtual_base PARAMS ((tree, tree)); static void clone_constructors_and_destructors PARAMS ((tree)); static tree build_clone PARAMS ((tree, tree)); static void update_vtable_entry_for_fn PARAMS ((tree, tree, tree, tree *)); static tree copy_virtuals PARAMS ((tree)); static void build_ctor_vtbl_group PARAMS ((tree, tree)); static void build_vtt PARAMS ((tree)); + static tree binfo_ctor_vtable PARAMS ((tree)); static tree *build_vtt_inits PARAMS ((tree, tree, tree *, tree *)); static tree dfs_build_secondary_vptr_vtt_inits PARAMS ((tree, void *)); static tree dfs_ctor_vtable_bases_queue_p PARAMS ((tree, void *data)); *************** build_vtable_entry_ref (basetype, vtbl, *** 547,555 **** } /* Given an object INSTANCE, return an expression which yields the ! virtual function vtable element corresponding to INDEX. There are ! many special cases for INSTANCE which we take care of here, mainly ! to avoid creating extra tree nodes when we don't have to. */ tree build_vtbl_ref (instance, idx) --- 548,556 ---- } /* Given an object INSTANCE, return an expression which yields the ! vtable element corresponding to INDEX. There are many special ! cases for INSTANCE which we take care of here, mainly to avoid ! creating extra tree nodes when we don't have to. */ tree build_vtbl_ref (instance, idx) *************** build_vfn_ref (ptr_to_instptr, instance, *** 646,652 **** /* When using thunks, there is no extra delta, and we get the pfn directly. */ if (flag_vtable_thunks) ! return aref; if (ptr_to_instptr) { --- 647,661 ---- /* When using thunks, there is no extra delta, and we get the pfn directly. */ if (flag_vtable_thunks) ! { ! /* When using function descriptors, the address of the ! vtable entry is treated as a function pointer. */ ! if (TARGET_VTABLE_USES_DESCRIPTORS) ! return build1 (NOP_EXPR, TREE_TYPE (aref), ! build_unary_op (ADDR_EXPR, aref, /*noconvert=*/1)); ! ! return aref; ! } if (ptr_to_instptr) { *************** set_vindex (decl, vfuns_p) *** 1060,1066 **** { int vindex; ! vindex = (*vfuns_p)++; DECL_VINDEX (decl) = build_shared_int_cst (vindex); } --- 1069,1077 ---- { int vindex; ! vindex = *vfuns_p; ! *vfuns_p += (TARGET_VTABLE_USES_DESCRIPTORS ! ? TARGET_VTABLE_USES_DESCRIPTORS : 1); DECL_VINDEX (decl) = build_shared_int_cst (vindex); } *************** force_canonical_binfo_r (to, from, type, *** 1687,1693 **** tree mappings; { int i, n_baseclasses = BINFO_N_BASETYPES (from); ! BINFO_INDIRECT_PRIMARY_P (to) = BINFO_INDIRECT_PRIMARY_P (from); BINFO_INDIRECT_PRIMARY_P (from) = 0; --- 1698,1705 ---- tree mappings; { int i, n_baseclasses = BINFO_N_BASETYPES (from); ! ! my_friendly_assert (to != from, 20010905); BINFO_INDIRECT_PRIMARY_P (to) = BINFO_INDIRECT_PRIMARY_P (from); BINFO_INDIRECT_PRIMARY_P (from) = 0; *************** force_canonical_binfo_r (to, from, type, *** 1711,1721 **** my_friendly_assert (same_type_p (BINFO_TYPE (to), BINFO_TYPE (from)), 20010104); mappings = tree_cons (from, to, mappings); for (i = 0; i != n_baseclasses; i++) { tree from_binfo = BINFO_BASETYPE (from, i); tree to_binfo = BINFO_BASETYPE (to, i); ! if (TREE_VIA_VIRTUAL (from_binfo)) { if (BINFO_PRIMARY_P (from_binfo) && --- 1723,1744 ---- my_friendly_assert (same_type_p (BINFO_TYPE (to), BINFO_TYPE (from)), 20010104); mappings = tree_cons (from, to, mappings); + + if (CLASSTYPE_HAS_PRIMARY_BASE_P (BINFO_TYPE (from)) + && TREE_VIA_VIRTUAL (CLASSTYPE_PRIMARY_BINFO (BINFO_TYPE (from)))) + { + tree from_primary = get_primary_binfo (from); + + if (BINFO_PRIMARY_BASE_OF (from_primary) == from) + force_canonical_binfo (get_primary_binfo (to), from_primary, + type, mappings); + } + for (i = 0; i != n_baseclasses; i++) { tree from_binfo = BINFO_BASETYPE (from, i); tree to_binfo = BINFO_BASETYPE (to, i); ! if (TREE_VIA_VIRTUAL (from_binfo)) { if (BINFO_PRIMARY_P (from_binfo) && *************** force_canonical_binfo (to, from, type, m *** 1748,1764 **** { tree assoc = purpose_member (BINFO_TYPE (to), CLASSTYPE_VBASECLASSES (type)); ! TREE_VALUE (assoc) = to; ! force_canonical_binfo_r (to, from, type, mappings); } ! /* Make BASE_BINFO the primary virtual base of BINFO within the hierarchy ! dominated by TYPE. Returns BASE_BINFO, if it can be made so, NULL otherwise (because something else has already made it primary). */ static tree ! mark_primary_virtual_base (binfo, base_binfo, type) ! tree binfo; tree base_binfo; tree type; { --- 1771,1789 ---- { tree assoc = purpose_member (BINFO_TYPE (to), CLASSTYPE_VBASECLASSES (type)); ! if (TREE_VALUE (assoc) != to) ! { ! TREE_VALUE (assoc) = to; ! force_canonical_binfo_r (to, from, type, mappings); ! } } ! /* Make BASE_BINFO the a primary virtual base within the hierarchy ! dominated by TYPE. Returns BASE_BINFO, if it is not already one, NULL otherwise (because something else has already made it primary). */ static tree ! mark_primary_virtual_base (base_binfo, type) tree base_binfo; tree type; { *************** mark_primary_virtual_base (binfo, base_b *** 1769,1776 **** /* It's already allocated in the hierarchy. BINFO won't have a primary base in this hierachy, even though the complete object BINFO is for, would do. */ - BINFO_LOST_PRIMARY_P (binfo) = 1; - return NULL_TREE; } --- 1794,1799 ---- *************** mark_primary_bases (type) *** 1858,1867 **** base_binfo = get_primary_binfo (binfo); if (TREE_VIA_VIRTUAL (base_binfo)) ! base_binfo = mark_primary_virtual_base (binfo, base_binfo, type); if (base_binfo) BINFO_PRIMARY_BASE_OF (base_binfo) = binfo; BINFO_UNSHARED_MARKED (binfo) = 1; } --- 1881,1892 ---- base_binfo = get_primary_binfo (binfo); if (TREE_VIA_VIRTUAL (base_binfo)) ! base_binfo = mark_primary_virtual_base (base_binfo, type); if (base_binfo) BINFO_PRIMARY_BASE_OF (base_binfo) = binfo; + else + BINFO_LOST_PRIMARY_P (binfo) = 1; BINFO_UNSHARED_MARKED (binfo) = 1; } *************** get_primary_binfo (binfo) *** 6812,6818 **** tree binfo; { tree primary_base; ! tree result; tree virtuals; primary_base = CLASSTYPE_PRIMARY_BINFO (BINFO_TYPE (binfo)); --- 6837,6843 ---- tree binfo; { tree primary_base; ! tree result = NULL_TREE; tree virtuals; primary_base = CLASSTYPE_PRIMARY_BINFO (BINFO_TYPE (binfo)); *************** build_vtbl_initializer (binfo, orig_binf *** 7878,7884 **** } /* And add it to the chain of initializers. */ ! vfun_inits = tree_cons (NULL_TREE, init, vfun_inits); } /* The initializers for virtual functions were built up in reverse --- 7903,7927 ---- } /* And add it to the chain of initializers. */ ! if (TARGET_VTABLE_USES_DESCRIPTORS) ! { ! int i; ! if (init == size_zero_node) ! for (i = 0; i < TARGET_VTABLE_USES_DESCRIPTORS; ++i) ! vfun_inits = tree_cons (NULL_TREE, init, vfun_inits); ! else ! for (i = 0; i < TARGET_VTABLE_USES_DESCRIPTORS; ++i) ! { ! tree fdesc = build (FDESC_EXPR, vfunc_ptr_type_node, ! TREE_OPERAND (init, 0), ! build_int_2 (i, 0)); ! TREE_CONSTANT (fdesc) = 1; ! ! vfun_inits = tree_cons (NULL_TREE, fdesc, vfun_inits); ! } ! } ! else ! vfun_inits = tree_cons (NULL_TREE, init, vfun_inits); } /* The initializers for virtual functions were built up in reverse diff -Nrc3pad gcc-3.0.1/gcc/cp/decl2.c gcc-3.0.2/gcc/cp/decl2.c *** gcc-3.0.1/gcc/cp/decl2.c Thu Aug 2 07:23:11 2001 --- gcc-3.0.2/gcc/cp/decl2.c Fri Sep 21 18:33:23 2001 *************** mark_vtable_entries (decl) *** 2268,2274 **** fnaddr = (flag_vtable_thunks ? TREE_VALUE (entries) : FNADDR_FROM_VTABLE_ENTRY (TREE_VALUE (entries))); ! if (TREE_CODE (fnaddr) != ADDR_EXPR) /* This entry is an offset: a virtual base class offset, a virtual call offset, and RTTI offset, etc. */ continue; --- 2268,2275 ---- fnaddr = (flag_vtable_thunks ? TREE_VALUE (entries) : FNADDR_FROM_VTABLE_ENTRY (TREE_VALUE (entries))); ! if (TREE_CODE (fnaddr) != ADDR_EXPR ! && TREE_CODE (fnaddr) != FDESC_EXPR) /* This entry is an offset: a virtual base class offset, a virtual call offset, and RTTI offset, etc. */ continue; diff -Nrc3pad gcc-3.0.1/gcc/cp/error.c gcc-3.0.2/gcc/cp/error.c *** gcc-3.0.1/gcc/cp/error.c Sun May 13 00:10:21 2001 --- gcc-3.0.2/gcc/cp/error.c Sat Sep 15 12:43:41 2001 *************** Boston, MA 02111-1307, USA. */ *** 23,28 **** --- 23,29 ---- #include "system.h" #include "tree.h" #include "cp-tree.h" + #include "real.h" #include "obstack.h" #include "toplev.h" #include "diagnostic.h" diff -Nrc3pad gcc-3.0.1/gcc/cp/optimize.c gcc-3.0.2/gcc/cp/optimize.c *** gcc-3.0.1/gcc/cp/optimize.c Tue Jun 5 00:47:06 2001 --- gcc-3.0.2/gcc/cp/optimize.c Thu Aug 30 07:43:42 2001 *************** inlinable_function_p (fn, id) *** 640,647 **** /* We can't inline varargs functions. */ else if (varargs_function_p (fn)) ; ! /* We can't inline functions that are too big. */ ! else if (DECL_NUM_STMTS (fn) * INSNS_PER_STMT > MAX_INLINE_INSNS) ; /* All is well. We can inline this function. Traditionally, GCC has refused to inline functions using alloca, or functions whose --- 640,648 ---- /* We can't inline varargs functions. */ else if (varargs_function_p (fn)) ; ! /* We can't inline functions that are too big. ! * Only allow a single function to eat up half of our budget. */ ! else if (DECL_NUM_STMTS (fn) * INSNS_PER_STMT > MAX_INLINE_INSNS / 2) ; /* All is well. We can inline this function. Traditionally, GCC has refused to inline functions using alloca, or functions whose *************** inlinable_function_p (fn, id) *** 655,663 **** /* Even if this function is not itself too big to inline, it might be that we've done so much inlining already that we don't want to ! risk inlining any more. */ ! if ((DECL_NUM_STMTS (fn) + id->inlined_stmts) * INSNS_PER_STMT ! > MAX_INLINE_INSNS) inlinable = 0; /* We can inline a template instantiation only if it's fully --- 656,665 ---- /* Even if this function is not itself too big to inline, it might be that we've done so much inlining already that we don't want to ! risk too much inlining any more and thus halve the acceptable size. */ ! if ((DECL_NUM_STMTS (fn) + id->inlined_stmts) * INSNS_PER_STMT ! > MAX_INLINE_INSNS ! && DECL_NUM_STMTS (fn) * INSNS_PER_STMT > MAX_INLINE_INSNS / 4) inlinable = 0; /* We can inline a template instantiation only if it's fully diff -Nrc3pad gcc-3.0.1/gcc/cp/parse.c gcc-3.0.2/gcc/cp/parse.c *** gcc-3.0.1/gcc/cp/parse.c Sun Aug 19 17:53:32 2001 --- gcc-3.0.2/gcc/cp/parse.c Tue Oct 23 10:57:18 2001 *************** *** 1,7 **** /* A Bison parser, made from parse.y ! by GNU Bison version 1.27 ! */ #define YYBISON 1 /* Identify Bison output. */ --- 1,6 ---- /* A Bison parser, made from parse.y ! by GNU Bison version 1.28 */ #define YYBISON 1 /* Identify Bison output. */ *************** static const short yycheck[] = { 4, *** 4133,4139 **** }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/lib/bison.simple" ! /* This file comes from bison-1.27. */ /* Skeleton output parser for bison, Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. --- 4132,4138 ---- }; /* -*-C-*- Note some compilers choke on comments on `#line' lines. */ #line 3 "/usr/lib/bison.simple" ! /* This file comes from bison-1.28. */ /* Skeleton output parser for bison, Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc. *************** __yy_memcpy (char *to, char *from, unsig *** 4346,4352 **** #endif #endif ! #line 216 "/usr/lib/bison.simple" /* The user can define YYPARSE_PARAM as the name of an argument to be passed into yyparse. The argument should have type void *. --- 4345,4351 ---- #endif #endif ! #line 217 "/usr/lib/bison.simple" /* The user can define YYPARSE_PARAM as the name of an argument to be passed into yyparse. The argument should have type void *. *************** case 917: *** 8578,8584 **** break;} } /* the action file gets copied in in place of this dollarsign */ ! #line 542 "/usr/lib/bison.simple" yyvsp -= yylen; yyssp -= yylen; --- 8577,8583 ---- break;} } /* the action file gets copied in in place of this dollarsign */ ! #line 543 "/usr/lib/bison.simple" yyvsp -= yylen; yyssp -= yylen; diff -Nrc3pad gcc-3.0.1/gcc/cp/pt.c gcc-3.0.2/gcc/cp/pt.c *** gcc-3.0.1/gcc/cp/pt.c Tue Jul 10 23:13:26 2001 --- gcc-3.0.2/gcc/cp/pt.c Thu Aug 23 06:50:35 2001 *************** static tree *** 5294,5305 **** maybe_fold_nontype_arg (arg) tree arg; { ! /* If we're not in a template, ARG is already as simple as it's going to ! get, and trying to reprocess the trees will break. */ ! if (! processing_template_decl) ! return arg; ! ! if (!TYPE_P (arg) && !uses_template_parms (arg)) { /* Sometimes, one of the args was an expression involving a template constant parameter, like N - 1. Now that we've --- 5294,5300 ---- maybe_fold_nontype_arg (arg) tree arg; { ! if (arg && !TYPE_P (arg) && !uses_template_parms (arg)) { /* Sometimes, one of the args was an expression involving a template constant parameter, like N - 1. Now that we've *************** maybe_fold_nontype_arg (arg) *** 5309,5318 **** fool build_expr_from_tree() into building an actual tree. */ ! int saved_processing_template_decl = processing_template_decl; ! processing_template_decl = 0; ! arg = fold (build_expr_from_tree (arg)); ! processing_template_decl = saved_processing_template_decl; } return arg; } --- 5304,5321 ---- fool build_expr_from_tree() into building an actual tree. */ ! /* If the TREE_TYPE of ARG is not NULL_TREE, ARG is already ! as simple as it's going to get, and trying to reprocess ! the trees will break. */ ! if (!TREE_TYPE (arg)) ! { ! int saved_processing_template_decl = processing_template_decl; ! processing_template_decl = 0; ! arg = build_expr_from_tree (arg); ! processing_template_decl = saved_processing_template_decl; ! } ! ! arg = fold (arg); } return arg; } diff -Nrc3pad gcc-3.0.1/gcc/cp/rtti.c gcc-3.0.2/gcc/cp/rtti.c *** gcc-3.0.1/gcc/cp/rtti.c Tue Apr 3 21:17:07 2001 --- gcc-3.0.2/gcc/cp/rtti.c Wed Oct 3 10:02:28 2001 *************** get_tinfo_decl_dynamic (exp) *** 238,244 **** /* The RTTI information is at index -1. */ index = integer_minus_one_node; ! t = build_vfn_ref ((tree *) 0, exp, index); TREE_TYPE (t) = build_pointer_type (tinfo_decl_type); return t; } --- 238,244 ---- /* The RTTI information is at index -1. */ index = integer_minus_one_node; ! t = build_vtbl_ref (exp, index); TREE_TYPE (t) = build_pointer_type (tinfo_decl_type); return t; } *************** get_tinfo_decl (type) *** 360,366 **** TREE_STATIC (d) = 1; DECL_EXTERNAL (d) = 1; TREE_PUBLIC (d) = 1; ! if (flag_weak || !typeinfo_in_lib_p (d)) comdat_linkage (d); SET_DECL_ASSEMBLER_NAME (d, name); cp_finish_decl (d, NULL_TREE, NULL_TREE, 0); --- 360,366 ---- TREE_STATIC (d) = 1; DECL_EXTERNAL (d) = 1; TREE_PUBLIC (d) = 1; ! if (flag_weak || !typeinfo_in_lib_p (type)) comdat_linkage (d); SET_DECL_ASSEMBLER_NAME (d, name); cp_finish_decl (d, NULL_TREE, NULL_TREE, 0); *************** create_pseudo_type_info VPARAMS((const c *** 1290,1296 **** VA_START (ap, ident); #ifndef ANSI_PROTOTYPES real_name = va_arg (ap, char const *); ! ident = va_arg (app, int); #endif /* Generate the pseudo type name. */ --- 1290,1296 ---- VA_START (ap, ident); #ifndef ANSI_PROTOTYPES real_name = va_arg (ap, char const *); ! ident = va_arg (ap, int); #endif /* Generate the pseudo type name. */ diff -Nrc3pad gcc-3.0.1/gcc/cp/typeck.c gcc-3.0.2/gcc/cp/typeck.c *** gcc-3.0.1/gcc/cp/typeck.c Wed Jul 25 02:37:26 2001 --- gcc-3.0.2/gcc/cp/typeck.c Fri Sep 21 18:33:24 2001 *************** get_member_function_from_ptrfunc (instan *** 2970,2975 **** --- 2970,2982 ---- e2 = aref; else e2 = build_component_ref (aref, pfn_identifier, NULL_TREE, 0); + + /* When using function descriptors, the address of the + vtable entry is treated as a function pointer. */ + if (TARGET_VTABLE_USES_DESCRIPTORS) + e2 = build1 (NOP_EXPR, TREE_TYPE (e2), + build_unary_op (ADDR_EXPR, e2, /*noconvert=*/1)); + TREE_TYPE (e2) = TREE_TYPE (e3); e1 = build_conditional_expr (e1, e2, e3); diff -Nrc3pad gcc-3.0.1/gcc/cpplex.c gcc-3.0.2/gcc/cpplex.c *** gcc-3.0.1/gcc/cpplex.c Fri Aug 3 11:05:10 2001 --- gcc-3.0.2/gcc/cpplex.c Mon Oct 8 14:56:36 2001 *************** _cpp_lex_token (pfile, result) *** 1033,1039 **** } /* Skipping the comment has updated buffer->read_ahead. */ ! if (!pfile->state.save_comments) { result->flags |= PREV_WHITE; goto next_char; --- 1033,1039 ---- } /* Skipping the comment has updated buffer->read_ahead. */ ! if (!pfile->state.save_comments || pfile->skipping) { result->flags |= PREV_WHITE; goto next_char; diff -Nrc3pad gcc-3.0.1/gcc/cpplib.c gcc-3.0.2/gcc/cpplib.c *** gcc-3.0.1/gcc/cpplib.c Fri Aug 3 11:05:10 2001 --- gcc-3.0.2/gcc/cpplib.c Sat Sep 15 11:22:50 2001 *************** do_pragma (pfile) *** 1070,1079 **** } cpp_stop_lookahead (pfile, drop); - pfile->state.prevent_expansion--; - if (!drop && pfile->cb.def_pragma) (*pfile->cb.def_pragma) (pfile); } static void --- 1070,1078 ---- } cpp_stop_lookahead (pfile, drop); if (!drop && pfile->cb.def_pragma) (*pfile->cb.def_pragma) (pfile); + pfile->state.prevent_expansion--; } static void diff -Nrc3pad gcc-3.0.1/gcc/cppmacro.c gcc-3.0.2/gcc/cppmacro.c *** gcc-3.0.1/gcc/cppmacro.c Mon Jun 25 10:43:17 2001 --- gcc-3.0.2/gcc/cppmacro.c Mon Oct 8 14:56:36 2001 *************** enter_macro_context (pfile, node) *** 668,683 **** list.limit = macro->expansion + macro->count; } ! /* Only push a macro context for non-empty replacement lists. */ ! if (list.first != list.limit) ! { ! context = next_context (pfile); ! context->list = list; ! context->macro = macro; ! /* Disable the macro within its expansion. */ ! macro->disabled = 1; ! } return 1; } --- 668,679 ---- list.limit = macro->expansion + macro->count; } ! context = next_context (pfile); ! context->list = list; ! context->macro = macro; ! /* Disable the macro within its expansion. */ ! macro->disabled = 1; return 1; } *************** _cpp_create_definition (pfile, node) *** 1399,1407 **** } else if (token->type != CPP_EOF && !(token->flags & PREV_WHITE)) cpp_pedwarn (pfile, "ISO C requires whitespace after the macro name"); - - /* Setting it here means we don't catch leading comments. */ - pfile->state.save_comments = ! CPP_OPTION (pfile, discard_comments); for (;;) { --- 1395,1400 ---- diff -Nrc3pad gcc-3.0.1/gcc/cse.c gcc-3.0.2/gcc/cse.c *** gcc-3.0.1/gcc/cse.c Thu Jul 26 11:27:52 2001 --- gcc-3.0.2/gcc/cse.c Wed Sep 12 13:55:19 2001 *************** cse_insn (insn, libcall_insn) *** 5060,5077 **** sets[i].src_in_memory = hash_arg_in_memory; /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is ! a pseudo that is set more than once, do not record SRC. Using ! SRC as a replacement for anything else will be incorrect in that ! situation. Note that this usually occurs only for stack slots, ! in which case all the RTL would be referring to SRC, so we don't ! lose any optimization opportunities by not having SRC in the ! hash table. */ if (GET_CODE (src) == MEM ! && find_reg_note (insn, REG_EQUIV, src) != 0 && GET_CODE (dest) == REG ! && REGNO (dest) >= FIRST_PSEUDO_REGISTER ! && REG_N_SETS (REGNO (dest)) != 1) sets[i].src_volatile = 1; #if 0 --- 5060,5075 ---- sets[i].src_in_memory = hash_arg_in_memory; /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is ! a pseudo, do not record SRC. Using SRC as a replacement for ! anything else will be incorrect in that situation. Note that ! this usually occurs only for stack slots, in which case all the ! RTL would be referring to SRC, so we don't lose any optimization ! opportunities by not having SRC in the hash table. */ if (GET_CODE (src) == MEM ! && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0 && GET_CODE (dest) == REG ! && REGNO (dest) >= FIRST_PSEUDO_REGISTER) sets[i].src_volatile = 1; #if 0 diff -Nrc3pad gcc-3.0.1/gcc/defaults.h gcc-3.0.2/gcc/defaults.h *** gcc-3.0.1/gcc/defaults.h Wed Jul 18 13:45:47 2001 --- gcc-3.0.2/gcc/defaults.h Fri Sep 21 18:33:19 2001 *************** do { \ *** 326,331 **** --- 326,341 ---- ? ptrmemfunc_vbit_in_pfn : ptrmemfunc_vbit_in_delta) #endif + /* By default, the C++ compiler will use function addresses in the + vtable entries. Setting this non-zero tells the compiler to use + function descriptors instead. The value of this macro says how + many words wide the descriptor is (normally 2). It is assumed + that the address of a function descriptor may be treated as a + pointer to a function. */ + #ifndef TARGET_VTABLE_USES_DESCRIPTORS + #define TARGET_VTABLE_USES_DESCRIPTORS 0 + #endif + /* Select a format to encode pointers in exception handling data. We prefer those that result in fewer dynamic relocations. Assume no special support here and encode direct references. */ diff -Nrc3pad gcc-3.0.1/gcc/doc/c-tree.texi gcc-3.0.2/gcc/doc/c-tree.texi *** gcc-3.0.1/gcc/doc/c-tree.texi Sun Jul 8 16:13:37 2001 --- gcc-3.0.2/gcc/doc/c-tree.texi Wed Oct 17 02:06:42 2001 *************** int i = (TEST_P (t) != 0); *** 110,116 **** @noindent are legal. Macros that return @code{int} values now may be changed to return @code{tree} values, or other pointers in the future. Even those ! that continue to return @code{int} may return multiple non-zero codes where previously they returned only zero and one. Therefore, you should not write code like @example --- 110,116 ---- @noindent are legal. Macros that return @code{int} values now may be changed to return @code{tree} values, or other pointers in the future. Even those ! that continue to return @code{int} may return multiple nonzero codes where previously they returned only zero and one. Therefore, you should not write code like @example *************** arguments. *** 500,506 **** Note that in C (but not in C++) a function declared like @code{void f()} is an unprototyped function taking a variable number of arguments; the ! @code{TYPE_ARG_TYPES} of such a function will be NULL@. @item METHOD_TYPE Used to represent the type of a non-static member function. Like a --- 500,506 ---- Note that in C (but not in C++) a function declared like @code{void f()} is an unprototyped function taking a variable number of arguments; the ! @code{TYPE_ARG_TYPES} of such a function will be @code{NULL}. @item METHOD_TYPE Used to represent the type of a non-static member function. Like a *************** returning to the thunk. The first param *** 1201,1207 **** value. (The @code{THUNK_DELTA} is an @code{int}, not an @code{INTEGER_CST}.) ! Then, if @code{THUNK_VCALL_OFFSET} (an @code{INTEGER_CST}) is non-zero the adjusted @code{this} pointer must be adjusted again. The complete calculation is given by the following pseudo-code: --- 1201,1207 ---- value. (The @code{THUNK_DELTA} is an @code{int}, not an @code{INTEGER_CST}.) ! Then, if @code{THUNK_VCALL_OFFSET} (an @code{INTEGER_CST}) is nonzero the adjusted @code{this} pointer must be adjusted again. The complete calculation is given by the following pseudo-code: *************** This predicate holds if the function an *** 1328,1334 **** @findex WHILE_COND A function that has a definition in the current translation unit will ! have a non-NULL @code{DECL_INITIAL}. However, back ends should not make use of the particular value given by @code{DECL_INITIAL}. The @code{DECL_SAVED_TREE} macro will give the complete body of the --- 1328,1334 ---- @findex WHILE_COND A function that has a definition in the current translation unit will ! have a non-@code{NULL} @code{DECL_INITIAL}. However, back ends should not make use of the particular value given by @code{DECL_INITIAL}. The @code{DECL_SAVED_TREE} macro will give the complete body of the *************** fields. *** 1443,1450 **** @item CASE_LABEL Use to represent a @code{case} label, range of @code{case} labels, or a ! @code{default} label. If @code{CASE_LOW} is NULL_TREE, then this is a a ! @code{default} label. Otherwise, if @code{CASE_HIGH} is NULL_TREE, then this is an ordinary @code{case} label. In this case, @code{CASE_LOW} is an expression giving the value of the label. Both @code{CASE_LOW} and @code{CASE_HIGH} are @code{INTEGER_CST} nodes. These values will have --- 1443,1450 ---- @item CASE_LABEL Use to represent a @code{case} label, range of @code{case} labels, or a ! @code{default} label. If @code{CASE_LOW} is @code{NULL_TREE}, then this is a ! @code{default} label. Otherwise, if @code{CASE_HIGH} is @code{NULL_TREE}, then this is an ordinary @code{case} label. In this case, @code{CASE_LOW} is an expression giving the value of the label. Both @code{CASE_LOW} and @code{CASE_HIGH} are @code{INTEGER_CST} nodes. These values will have *************** as a signed or unsigned quantity dependi *** 1821,1827 **** In general, the expression given above will overflow, so it should not be used to calculate the value of the constant. ! The variable @code{integer_zero_node} is a integer constant with value zero. Similarly, @code{integer_one_node} is an integer constant with value one. The @code{size_zero_node} and @code{size_one_node} variables are analogous, but have type @code{size_t} rather than @code{int}. --- 1821,1827 ---- In general, the expression given above will overflow, so it should not be used to calculate the value of the constant. ! The variable @code{integer_zero_node} is an integer constant with value zero. Similarly, @code{integer_one_node} is an integer constant with value one. The @code{size_zero_node} and @code{size_one_node} variables are analogous, but have type @code{size_t} rather than @code{int}. *************** These nodes are used to represent pointe *** 1875,1881 **** or @code{UNION_TYPE} within which the pointer points), and the @code{PTRMEM_CST_MEMBER} is the declaration for the pointed to object. Note that the @code{DECL_CONTEXT} for the @code{PTRMEM_CST_MEMBER} is in ! general different from from the @code{PTRMEM_CST_CLASS}. For example, given: @example struct B @{ int i; @}; --- 1875,1881 ---- or @code{UNION_TYPE} within which the pointer points), and the @code{PTRMEM_CST_MEMBER} is the declaration for the pointed to object. Note that the @code{DECL_CONTEXT} for the @code{PTRMEM_CST_MEMBER} is in ! general different from the @code{PTRMEM_CST_CLASS}. For example, given: @example struct B @{ int i; @}; *************** the value of the second operand. *** 2097,2103 **** @item COND_EXPR These nodes represent @code{?:} expressions. The first operand ! is of boolean or integral type. If it evaluates to a non-zero value, the second operand should be evaluated, and returned as the value of the expression. Otherwise, the third operand is evaluated, and returned as the value of the expression. As a GNU extension, the middle operand of --- 2097,2103 ---- @item COND_EXPR These nodes represent @code{?:} expressions. The first operand ! is of boolean or integral type. If it evaluates to a nonzero value, the second operand should be evaluated, and returned as the value of the expression. Otherwise, the third operand is evaluated, and returned as the value of the expression. As a GNU extension, the middle operand of *************** an @code{EXIT_EXPR} is encountered. *** 2175,2181 **** @item EXIT_EXPR These nodes represent conditional exits from the nearest enclosing @code{LOOP_EXPR}. The single operand is the condition; if it is ! non-zero, then the loop should be exited. An @code{EXIT_EXPR} will only appear within a @code{LOOP_EXPR}. @item CLEANUP_POINT_EXPR --- 2175,2181 ---- @item EXIT_EXPR These nodes represent conditional exits from the nearest enclosing @code{LOOP_EXPR}. The single operand is the condition; if it is ! nonzero, then the loop should be exited. An @code{EXIT_EXPR} will only appear within a @code{LOOP_EXPR}. @item CLEANUP_POINT_EXPR diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.1 gcc-3.0.2/gcc/doc/cpp.1 *** gcc-3.0.1/gcc/doc/cpp.1 Mon Jul 2 17:50:55 2001 --- gcc-3.0.2/gcc/doc/cpp.1 Tue Oct 23 10:56:01 2001 *************** *** 1,8 **** ! .\" Automatically generated by Pod::Man version 1.16 ! .\" Tue Jul 3 00:41:06 2001 .\" .\" Standard preamble: ! .\" ====================================================================== .de Sh \" Subsection heading .br .if t .Sp --- 1,8 ---- ! .\" Automatically generated by Pod::Man version 1.19 ! .\" Fri Oct 12 11:20:12 2001 .\" .\" Standard preamble: ! .\" ======================================================================== .de Sh \" Subsection heading .br .if t .Sp *************** *** 15,26 **** .if t .sp .5v .if n .sp .. - .de Ip \" List item - .br - .ie \\n(.$>=3 .ne \\$3 - .el .ne 3 - .IP "\\$1" \\$2 - .. .de Vb \" Begin verbatim text .ft CW .nf --- 15,20 ---- *************** *** 34,42 **** .\" Set up some character translations and predefined strings. \*(-- will .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left .\" double quote, and \*(R" will give a right double quote. | will give a ! .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used ! .\" to do unbreakable dashes and therefore won't be available. \*(C` and ! .\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> .tr \(*W-|\(bv\*(Tr .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' .ie n \{\ --- 28,36 ---- .\" Set up some character translations and predefined strings. \*(-- will .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left .\" double quote, and \*(R" will give a right double quote. | will give a ! .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to ! .\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C' ! .\" expand to `' in nroff, nothing in troff, for use with C<>. .tr \(*W-|\(bv\*(Tr .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' .ie n \{\ *************** *** 56,65 **** . ds R" '' 'br\} .\" ! .\" If the F register is turned on, we'll generate index entries on stderr ! .\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and ! .\" index entries marked with X<> in POD. Of course, you'll have to process ! .\" the output yourself in some meaningful fashion. .if \nF \{\ . de IX . tm Index:\\$1\t\\n%\t"\\$2" --- 50,59 ---- . ds R" '' 'br\} .\" ! .\" If the F register is turned on, we'll generate index entries on stderr for ! .\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index ! .\" entries marked with X<> in POD. Of course, you'll have to process the ! .\" output yourself in some meaningful fashion. .if \nF \{\ . de IX . tm Index:\\$1\t\\n%\t"\\$2" *************** *** 68,81 **** . rr F .\} .\" ! .\" For nroff, turn off justification. Always turn off hyphenation; it ! .\" makes way too many mistakes in technical documents. .hy 0 .if n .na .\" .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). .\" Fear. Run. Save yourself. No user-serviceable parts. - .bd B 3 . \" fudge factors for nroff and troff .if n \{\ . ds #H 0 --- 62,74 ---- . rr F .\} .\" ! .\" For nroff, turn off justification. Always turn off hyphenation; it makes ! .\" way too many mistakes in technical documents. .hy 0 .if n .na .\" .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). .\" Fear. Run. Save yourself. No user-serviceable parts. . \" fudge factors for nroff and troff .if n \{\ . ds #H 0 *************** *** 135,144 **** . ds Ae AE .\} .rm #[ #] #H #V #F C ! .\" ====================================================================== .\" .IX Title "CPP 1" ! .TH CPP 1 "gcc-3.0.1" "2001-07-03" "GNU" .UC .SH "NAME" cpp \- The C Preprocessor --- 128,137 ---- . ds Ae AE .\} .rm #[ #] #H #V #F C ! .\" ======================================================================== .\" .IX Title "CPP 1" ! .TH CPP 1 "gcc-3.0.2" "2001-10-12" "GNU" .UC .SH "NAME" cpp \- The C Preprocessor *************** after the option, or with a space betwee *** 211,220 **** Many options have multi-letter names; therefore multiple single-letter options may \fInot\fR be grouped: \fB\-dM\fR is very different from \&\fB\-d\ \-M\fR. ! .Ip "\fB\-D\fR \fIname\fR" 4 .IX Item "-D name" ! Predefine \fIname\fR as a macro, with definition \f(CW\*(C`1\*(C'\fR. ! .Ip "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4 .IX Item "-D name=definition" Predefine \fIname\fR as a macro, with definition \fIdefinition\fR. There are no restrictions on the contents of \fIdefinition\fR, but if --- 204,213 ---- Many options have multi-letter names; therefore multiple single-letter options may \fInot\fR be grouped: \fB\-dM\fR is very different from \&\fB\-d\ \-M\fR. ! .IP "\fB\-D\fR \fIname\fR" 4 .IX Item "-D name" ! Predefine \fIname\fR as a macro, with definition \f(CW1\fR. ! .IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4 .IX Item "-D name=definition" Predefine \fIname\fR as a macro, with definition \fIdefinition\fR. There are no restrictions on the contents of \fIdefinition\fR, but if *************** its argument list with surrounding paren *** 229,246 **** (if any). Parentheses are meaningful to most shells, so you will need to quote the option. With \fBsh\fR and \fBcsh\fR, \&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works. ! .Ip "\fB\-U\fR \fIname\fR" 4 .IX Item "-U name" Cancel any previous definition of \fIname\fR, either built in or provided with a \fB\-D\fR option. .Sp All \fB\-imacros\fR \fIfile\fR and \fB\-include\fR \fIfile\fR options are processed after all \fB\-D\fR and \fB\-U\fR options. ! .Ip "\fB\-undef\fR" 4 .IX Item "-undef" Do not predefine any system-specific macros. The common predefined macros remain defined. ! .Ip "\fB\-I\fR \fIdir\fR" 4 .IX Item "-I dir" Add the directory \fIdir\fR to the list of directories to be searched for header files. Directories named by \fB\-I\fR --- 222,239 ---- (if any). Parentheses are meaningful to most shells, so you will need to quote the option. With \fBsh\fR and \fBcsh\fR, \&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works. ! .IP "\fB\-U\fR \fIname\fR" 4 .IX Item "-U name" Cancel any previous definition of \fIname\fR, either built in or provided with a \fB\-D\fR option. .Sp All \fB\-imacros\fR \fIfile\fR and \fB\-include\fR \fIfile\fR options are processed after all \fB\-D\fR and \fB\-U\fR options. ! .IP "\fB\-undef\fR" 4 .IX Item "-undef" Do not predefine any system-specific macros. The common predefined macros remain defined. ! .IP "\fB\-I\fR \fIdir\fR" 4 .IX Item "-I dir" Add the directory \fIdir\fR to the list of directories to be searched for header files. Directories named by \fB\-I\fR *************** It is dangerous to specify a standard sy *** 250,318 **** \&\fB\-I\fR option. This defeats the special treatment of system headers. It can also defeat the repairs to buggy system headers which \s-1GCC\s0 makes when it is installed. ! .Ip "\fB\-o\fR \fIfile\fR" 4 .IX Item "-o file" Write output to \fIfile\fR. This is the same as specifying \fIfile\fR as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a different interpretation of a second non-option argument, so you must use \fB\-o\fR to specify the output file. ! .Ip "\fB\-Wall\fR" 4 .IX Item "-Wall" Turns on all optional warnings which are desirable for normal code. At present this is \fB\-Wcomment\fR and \fB\-Wtrigraphs\fR. Note that many of the preprocessor's warnings are on by default and have no options to control them. ! .Ip "\fB\-Wcomment\fR" 4 .IX Item "-Wcomment" .PD 0 ! .Ip "\fB\-Wcomments\fR" 4 .IX Item "-Wcomments" .PD Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR comment, or whenever a backslash-newline appears in a \fB//\fR comment. (Both forms have the same effect.) ! .Ip "\fB\-Wtrigraphs\fR" 4 .IX Item "-Wtrigraphs" Warn if any trigraphs are encountered. This option used to take effect only if \fB\-trigraphs\fR was also specified, but now works independently. Warnings are not given for trigraphs within comments, as they do not affect the meaning of the program. ! .Ip "\fB\-Wtraditional\fR" 4 .IX Item "-Wtraditional" Warn about certain constructs that behave differently in traditional and \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C equivalent, and problematic constructs which should be avoided. ! .Ip "\fB\-Wimport\fR" 4 .IX Item "-Wimport" Warn the first time \fB#import\fR is used. ! .Ip "\fB\-Wundef\fR" 4 .IX Item "-Wundef" Warn whenever an identifier which is not a macro is encountered in an \&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are replaced with zero. ! .Ip "\fB\-Werror\fR" 4 .IX Item "-Werror" Make all warnings into hard errors. Source code which triggers warnings will be rejected. ! .Ip "\fB\-Wsystem-headers\fR" 4 .IX Item "-Wsystem-headers" Issue warnings for code in system headers. These are normally unhelpful in finding bugs in your own code, therefore suppressed. If you are responsible for the system library, you may want to see them. ! .Ip "\fB\-w\fR" 4 .IX Item "-w" Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default. ! .Ip "\fB\-pedantic\fR" 4 .IX Item "-pedantic" Issue all the mandatory diagnostics listed in the C standard. Some of them are left out by default, since they trigger frequently on harmless code. ! .Ip "\fB\-pedantic-errors\fR" 4 .IX Item "-pedantic-errors" Issue all the mandatory diagnostics, and make all mandatory diagnostics into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues without \fB\-pedantic\fR but treats as warnings. ! .Ip "\fB\-M\fR" 4 .IX Item "-M" Instead of outputting the result of preprocessing, output a rule suitable for \fBmake\fR describing the dependencies of the main --- 243,311 ---- \&\fB\-I\fR option. This defeats the special treatment of system headers. It can also defeat the repairs to buggy system headers which \s-1GCC\s0 makes when it is installed. ! .IP "\fB\-o\fR \fIfile\fR" 4 .IX Item "-o file" Write output to \fIfile\fR. This is the same as specifying \fIfile\fR as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a different interpretation of a second non-option argument, so you must use \fB\-o\fR to specify the output file. ! .IP "\fB\-Wall\fR" 4 .IX Item "-Wall" Turns on all optional warnings which are desirable for normal code. At present this is \fB\-Wcomment\fR and \fB\-Wtrigraphs\fR. Note that many of the preprocessor's warnings are on by default and have no options to control them. ! .IP "\fB\-Wcomment\fR" 4 .IX Item "-Wcomment" .PD 0 ! .IP "\fB\-Wcomments\fR" 4 .IX Item "-Wcomments" .PD Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR comment, or whenever a backslash-newline appears in a \fB//\fR comment. (Both forms have the same effect.) ! .IP "\fB\-Wtrigraphs\fR" 4 .IX Item "-Wtrigraphs" Warn if any trigraphs are encountered. This option used to take effect only if \fB\-trigraphs\fR was also specified, but now works independently. Warnings are not given for trigraphs within comments, as they do not affect the meaning of the program. ! .IP "\fB\-Wtraditional\fR" 4 .IX Item "-Wtraditional" Warn about certain constructs that behave differently in traditional and \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C equivalent, and problematic constructs which should be avoided. ! .IP "\fB\-Wimport\fR" 4 .IX Item "-Wimport" Warn the first time \fB#import\fR is used. ! .IP "\fB\-Wundef\fR" 4 .IX Item "-Wundef" Warn whenever an identifier which is not a macro is encountered in an \&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are replaced with zero. ! .IP "\fB\-Werror\fR" 4 .IX Item "-Werror" Make all warnings into hard errors. Source code which triggers warnings will be rejected. ! .IP "\fB\-Wsystem-headers\fR" 4 .IX Item "-Wsystem-headers" Issue warnings for code in system headers. These are normally unhelpful in finding bugs in your own code, therefore suppressed. If you are responsible for the system library, you may want to see them. ! .IP "\fB\-w\fR" 4 .IX Item "-w" Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default. ! .IP "\fB\-pedantic\fR" 4 .IX Item "-pedantic" Issue all the mandatory diagnostics listed in the C standard. Some of them are left out by default, since they trigger frequently on harmless code. ! .IP "\fB\-pedantic-errors\fR" 4 .IX Item "-pedantic-errors" Issue all the mandatory diagnostics, and make all mandatory diagnostics into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues without \fB\-pedantic\fR but treats as warnings. ! .IP "\fB\-M\fR" 4 .IX Item "-M" Instead of outputting the result of preprocessing, output a rule suitable for \fBmake\fR describing the dependencies of the main *************** object file name consists of the basenam *** 326,343 **** suffix replaced with object file suffix. If there are many included files then the rule is split into several lines using \fB\e\fR\-newline. The rule has no commands. ! .Ip "\fB\-MM\fR" 4 .IX Item "-MM" Like \fB\-M\fR, but mention only the files included with \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR or with \fB\-include\fR or \fB\-imacros\fR command line options. System header files included with \f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR are omitted. ! .Ip "\fB\-MF\fR \fIfile\fR" 4 .IX Item "-MF file" When used with \fB\-M\fR or \fB\-MM\fR, specifies a file to write the dependencies to. This allows the preprocessor to write the preprocessed file to stdout normally. If no \fB\-MF\fR switch is given, \s-1CPP\s0 sends the rules to stdout and suppresses normal preprocessed output. ! .Ip "\fB\-MG\fR" 4 .IX Item "-MG" When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing header files as generated files and assume they live in the same --- 319,336 ---- suffix replaced with object file suffix. If there are many included files then the rule is split into several lines using \fB\e\fR\-newline. The rule has no commands. ! .IP "\fB\-MM\fR" 4 .IX Item "-MM" Like \fB\-M\fR, but mention only the files included with \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR or with \fB\-include\fR or \fB\-imacros\fR command line options. System header files included with \f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR are omitted. ! .IP "\fB\-MF\fR \fIfile\fR" 4 .IX Item "-MF file" When used with \fB\-M\fR or \fB\-MM\fR, specifies a file to write the dependencies to. This allows the preprocessor to write the preprocessed file to stdout normally. If no \fB\-MF\fR switch is given, \s-1CPP\s0 sends the rules to stdout and suppresses normal preprocessed output. ! .IP "\fB\-MG\fR" 4 .IX Item "-MG" When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing header files as generated files and assume they live in the same *************** directory as the source file. It suppre *** 345,351 **** missing header file is ordinarily an error. .Sp This feature is used in automatic updating of makefiles. ! .Ip "\fB\-MP\fR" 4 .IX Item "-MP" This option instructs \s-1CPP\s0 to add a phony target for each dependency other than the main file, causing each to depend on nothing. These --- 338,344 ---- missing header file is ordinarily an error. .Sp This feature is used in automatic updating of makefiles. ! .IP "\fB\-MP\fR" 4 .IX Item "-MP" This option instructs \s-1CPP\s0 to add a phony target for each dependency other than the main file, causing each to depend on nothing. These *************** This is typical output: *** 360,366 **** .Vb 1 \& test.h: .Ve ! .Ip "\fB\-MT\fR \fItarget\fR" 4 .IX Item "-MT target" Change the target of the rule emitted by dependency generation. By default \s-1CPP\s0 takes the name of the main input file, including any path, --- 353,359 ---- .Vb 1 \& test.h: .Ve ! .IP "\fB\-MT\fR \fItarget\fR" 4 .IX Item "-MT target" Change the target of the rule emitted by dependency generation. By default \s-1CPP\s0 takes the name of the main input file, including any path, *************** For example, \fB\-MT\ '$(objpfx)foo.o'\f *** 376,382 **** .Vb 1 \& $(objpfx)foo.o: foo.c .Ve ! .Ip "\fB\-MQ\fR \fItarget\fR" 4 .IX Item "-MQ target" Same as \fB\-MT\fR, but it quotes any characters which are special to Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives --- 369,375 ---- .Vb 1 \& $(objpfx)foo.o: foo.c .Ve ! .IP "\fB\-MQ\fR \fItarget\fR" 4 .IX Item "-MQ target" Same as \fB\-MT\fR, but it quotes any characters which are special to Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives *************** Make. \fB\-MQ\ '$(objpfx)foo.o'\fR give *** 386,395 **** .Ve The default target is automatically quoted, as if it were given with \&\fB\-MQ\fR. ! .Ip "\fB\-MD\fR \fIfile\fR" 4 .IX Item "-MD file" .PD 0 ! .Ip "\fB\-MMD\fR \fIfile\fR" 4 .IX Item "-MMD file" .PD \&\fB\-MD\fR \fIfile\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, and --- 379,388 ---- .Ve The default target is automatically quoted, as if it were given with \&\fB\-MQ\fR. ! .IP "\fB\-MD\fR \fIfile\fR" 4 .IX Item "-MD file" .PD 0 ! .IP "\fB\-MMD\fR \fIfile\fR" 4 .IX Item "-MMD file" .PD \&\fB\-MD\fR \fIfile\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, and *************** The default target is automatically quot *** 398,411 **** Due to limitations in the compiler driver, you must use these switches when you want to generate a dependency file as a side-effect of normal compilation. ! .Ip "\fB\-x c\fR" 4 .IX Item "-x c" .PD 0 ! .Ip "\fB\-x c++\fR" 4 .IX Item "-x c++" ! .Ip "\fB\-x objective-c\fR" 4 .IX Item "-x objective-c" ! .Ip "\fB\-x assembler-with-cpp\fR" 4 .IX Item "-x assembler-with-cpp" .PD Specify the source language: C, \*(C+, Objective-C, or assembly. This has --- 391,404 ---- Due to limitations in the compiler driver, you must use these switches when you want to generate a dependency file as a side-effect of normal compilation. ! .IP "\fB\-x c\fR" 4 .IX Item "-x c" .PD 0 ! .IP "\fB\-x c++\fR" 4 .IX Item "-x c++" ! .IP "\fB\-x objective-c\fR" 4 .IX Item "-x objective-c" ! .IP "\fB\-x assembler-with-cpp\fR" 4 .IX Item "-x assembler-with-cpp" .PD Specify the source language: C, \*(C+, Objective-C, or assembly. This has *************** generic mode. *** 421,430 **** which selected both the language and the standards conformance level. This option has been removed, because it conflicts with the \fB\-l\fR option. ! .Ip "\fB\-std=\fR\fIstandard\fR" 4 .IX Item "-std=standard" .PD 0 ! .Ip "\fB\-ansi\fR" 4 .IX Item "-ansi" .PD Specify the standard to which the code should conform. Currently cpp --- 414,423 ---- which selected both the language and the standards conformance level. This option has been removed, because it conflicts with the \fB\-l\fR option. ! .IP "\fB\-std=\fR\fIstandard\fR" 4 .IX Item "-std=standard" .PD 0 ! .IP "\fB\-ansi\fR" 4 .IX Item "-ansi" .PD Specify the standard to which the code should conform. Currently cpp *************** added in the future. *** 434,488 **** \&\fIstandard\fR may be one of: .RS 4 ! .if n .Ip "\f(CW""""iso9899:1990""""\fR" 4 ! .el .Ip "\f(CWiso9899:1990\fR" 4 .IX Item "iso9899:1990" .PD 0 ! .if n .Ip "\f(CW""""c89""""\fR" 4 ! .el .Ip "\f(CWc89\fR" 4 .IX Item "c89" .PD The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for this version of the standard. .Sp The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR. ! .if n .Ip "\f(CW""""iso9899:199409""""\fR" 4 ! .el .Ip "\f(CWiso9899:199409\fR" 4 .IX Item "iso9899:199409" The 1990 C standard, as amended in 1994. ! .if n .Ip "\f(CW""""iso9899:1999""""\fR" 4 ! .el .Ip "\f(CWiso9899:1999\fR" 4 .IX Item "iso9899:1999" .PD 0 ! .if n .Ip "\f(CW""""c99""""\fR" 4 ! .el .Ip "\f(CWc99\fR" 4 .IX Item "c99" ! .if n .Ip "\f(CW""""iso9899:199x""""\fR" 4 ! .el .Ip "\f(CWiso9899:199x\fR" 4 .IX Item "iso9899:199x" ! .if n .Ip "\f(CW""""c9x""""\fR" 4 ! .el .Ip "\f(CWc9x\fR" 4 .IX Item "c9x" .PD The revised \s-1ISO\s0 C standard, published in December 1999. Before publication, this was known as C9X. ! .if n .Ip "\f(CW""""gnu89""""\fR" 4 ! .el .Ip "\f(CWgnu89\fR" 4 .IX Item "gnu89" The 1990 C standard plus \s-1GNU\s0 extensions. This is the default. ! .if n .Ip "\f(CW""""gnu99""""\fR" 4 ! .el .Ip "\f(CWgnu99\fR" 4 .IX Item "gnu99" .PD 0 ! .if n .Ip "\f(CW""""gnu9x""""\fR" 4 ! .el .Ip "\f(CWgnu9x\fR" 4 .IX Item "gnu9x" .PD The 1999 C standard plus \s-1GNU\s0 extensions. .RE .RS 4 .RE ! .Ip "\fB\-I-\fR" 4 .IX Item "-I-" Split the include path. Any directories specified with \fB\-I\fR options before \fB\-I-\fR are searched only for headers requested with --- 427,481 ---- \&\fIstandard\fR may be one of: .RS 4 ! .if n .IP """iso9899:1990""" 4 ! .el .IP "\f(CWiso9899:1990\fR" 4 .IX Item "iso9899:1990" .PD 0 ! .if n .IP """c89""" 4 ! .el .IP "\f(CWc89\fR" 4 .IX Item "c89" .PD The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for this version of the standard. .Sp The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR. ! .if n .IP """iso9899:199409""" 4 ! .el .IP "\f(CWiso9899:199409\fR" 4 .IX Item "iso9899:199409" The 1990 C standard, as amended in 1994. ! .if n .IP """iso9899:1999""" 4 ! .el .IP "\f(CWiso9899:1999\fR" 4 .IX Item "iso9899:1999" .PD 0 ! .if n .IP """c99""" 4 ! .el .IP "\f(CWc99\fR" 4 .IX Item "c99" ! .if n .IP """iso9899:199x""" 4 ! .el .IP "\f(CWiso9899:199x\fR" 4 .IX Item "iso9899:199x" ! .if n .IP """c9x""" 4 ! .el .IP "\f(CWc9x\fR" 4 .IX Item "c9x" .PD The revised \s-1ISO\s0 C standard, published in December 1999. Before publication, this was known as C9X. ! .if n .IP """gnu89""" 4 ! .el .IP "\f(CWgnu89\fR" 4 .IX Item "gnu89" The 1990 C standard plus \s-1GNU\s0 extensions. This is the default. ! .if n .IP """gnu99""" 4 ! .el .IP "\f(CWgnu99\fR" 4 .IX Item "gnu99" .PD 0 ! .if n .IP """gnu9x""" 4 ! .el .IP "\f(CWgnu9x\fR" 4 .IX Item "gnu9x" .PD The 1999 C standard plus \s-1GNU\s0 extensions. .RE .RS 4 .RE ! .IP "\fB\-I-\fR" 4 .IX Item "-I-" Split the include path. Any directories specified with \fB\-I\fR options before \fB\-I-\fR are searched only for headers requested with *************** directories are searched for all \fB#inc *** 493,509 **** .Sp In addition, \fB\-I-\fR inhibits the use of the directory of the current file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR. ! .Ip "\fB\-nostdinc\fR" 4 .IX Item "-nostdinc" Do not search the standard system directories for header files. Only the directories you have specified with \fB\-I\fR options (and the directory of the current file, if appropriate) are searched. ! .Ip "\fB\-nostdinc++\fR" 4 .IX Item "-nostdinc++" Do not search for header files in the \*(C+\-specific standard directories, but do still search the other standard directories. (This option is used when building the \*(C+ library.) ! .Ip "\fB\-include\fR \fIfile\fR" 4 .IX Item "-include file" Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first line of the primary source file. However, the first directory searched --- 486,502 ---- .Sp In addition, \fB\-I-\fR inhibits the use of the directory of the current file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR. ! .IP "\fB\-nostdinc\fR" 4 .IX Item "-nostdinc" Do not search the standard system directories for header files. Only the directories you have specified with \fB\-I\fR options (and the directory of the current file, if appropriate) are searched. ! .IP "\fB\-nostdinc++\fR" 4 .IX Item "-nostdinc++" Do not search for header files in the \*(C+\-specific standard directories, but do still search the other standard directories. (This option is used when building the \*(C+ library.) ! .IP "\fB\-include\fR \fIfile\fR" 4 .IX Item "-include file" Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first line of the primary source file. However, the first directory searched *************** chain as normal. *** 514,520 **** .Sp If multiple \fB\-include\fR options are given, the files are included in the order they appear on the command line. ! .Ip "\fB\-imacros\fR \fIfile\fR" 4 .IX Item "-imacros file" Exactly like \fB\-include\fR, except that any output produced by scanning \fIfile\fR is thrown away. Macros it defines remain defined. --- 507,513 ---- .Sp If multiple \fB\-include\fR options are given, the files are included in the order they appear on the command line. ! .IP "\fB\-imacros\fR \fIfile\fR" 4 .IX Item "-imacros file" Exactly like \fB\-include\fR, except that any output produced by scanning \fIfile\fR is thrown away. Macros it defines remain defined. *************** processing its declarations. *** 523,542 **** .Sp All files specified by \fB\-imacros\fR are processed before all files specified by \fB\-include\fR. ! .Ip "\fB\-idirafter\fR \fIdir\fR" 4 .IX Item "-idirafter dir" Search \fIdir\fR for header files, but do it \fIafter\fR all directories specified with \fB\-I\fR and the standard system directories have been exhausted. \fIdir\fR is treated as a system include directory. ! .Ip "\fB\-iprefix\fR \fIprefix\fR" 4 .IX Item "-iprefix prefix" Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR options. If the prefix represents a directory, you should include the final \fB/\fR. ! .Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 .IX Item "-iwithprefix dir" .PD 0 ! .Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 .IX Item "-iwithprefixbefore dir" .PD Append \fIdir\fR to the prefix specified previously with --- 516,535 ---- .Sp All files specified by \fB\-imacros\fR are processed before all files specified by \fB\-include\fR. ! .IP "\fB\-idirafter\fR \fIdir\fR" 4 .IX Item "-idirafter dir" Search \fIdir\fR for header files, but do it \fIafter\fR all directories specified with \fB\-I\fR and the standard system directories have been exhausted. \fIdir\fR is treated as a system include directory. ! .IP "\fB\-iprefix\fR \fIprefix\fR" 4 .IX Item "-iprefix prefix" Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR options. If the prefix represents a directory, you should include the final \fB/\fR. ! .IP "\fB\-iwithprefix\fR \fIdir\fR" 4 .IX Item "-iwithprefix dir" .PD 0 ! .IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 .IX Item "-iwithprefixbefore dir" .PD Append \fIdir\fR to the prefix specified previously with *************** path. \fB\-iwithprefixbefore\fR puts it *** 545,557 **** would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would. .Sp Use of these options is discouraged. ! .Ip "\fB\-isystem\fR \fIdir\fR" 4 .IX Item "-isystem dir" Search \fIdir\fR for header files, after all directories specified by \&\fB\-I\fR but before the standard system directories. Mark it as a system directory, so that it gets the same special treatment as is applied to the standard system directories. ! .Ip "\fB\-fpreprocessed\fR" 4 .IX Item "-fpreprocessed" Indicate to the preprocessor that the input file has already been preprocessed. This suppresses things like macro expansion, trigraph --- 538,550 ---- would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would. .Sp Use of these options is discouraged. ! .IP "\fB\-isystem\fR \fIdir\fR" 4 .IX Item "-isystem dir" Search \fIdir\fR for header files, after all directories specified by \&\fB\-I\fR but before the standard system directories. Mark it as a system directory, so that it gets the same special treatment as is applied to the standard system directories. ! .IP "\fB\-fpreprocessed\fR" 4 .IX Item "-fpreprocessed" Indicate to the preprocessor that the input file has already been preprocessed. This suppresses things like macro expansion, trigraph *************** a tokenizer for the front ends. *** 565,598 **** extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the extensions that \s-1GCC\s0 uses for preprocessed files created by \&\fB\-save-temps\fR. ! .Ip "\fB\-ftabstop=\fR\fIwidth\fR" 4 .IX Item "-ftabstop=width" Set the distance between tab stops. This helps the preprocessor report correct column numbers in warnings or errors, even if tabs appear on the line. If the value is less than 1 or greater than 100, the option is ignored. The default is 8. ! .Ip "\fB\-fno-show-column\fR" 4 .IX Item "-fno-show-column" Do not print column numbers in diagnostics. This may be necessary if diagnostics are being scanned by a program that does not understand the column numbers, such as \fBdejagnu\fR. ! .Ip "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4 .IX Item "-A predicate=answer" Make an assertion with the predicate \fIpredicate\fR and answer \&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR \&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because it does not use shell special characters. ! .Ip "\fB\-A -\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4 .IX Item "-A -predicate=answer" Cancel an assertion with the predicate \fIpredicate\fR and answer \&\fIanswer\fR. ! .Ip "\fB\-A-\fR" 4 .IX Item "-A-" Cancel all predefined assertions and all assertions preceding it on the command line. Also, undefine all predefined macros and all macros preceding it on the command line. (This is a historical wart and may change in the future.) ! .Ip "\fB\-dCHARS\fR" 4 .IX Item "-dCHARS" \&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters, and must not be preceded by a space. Other characters are interpreted --- 558,591 ---- extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the extensions that \s-1GCC\s0 uses for preprocessed files created by \&\fB\-save-temps\fR. ! .IP "\fB\-ftabstop=\fR\fIwidth\fR" 4 .IX Item "-ftabstop=width" Set the distance between tab stops. This helps the preprocessor report correct column numbers in warnings or errors, even if tabs appear on the line. If the value is less than 1 or greater than 100, the option is ignored. The default is 8. ! .IP "\fB\-fno-show-column\fR" 4 .IX Item "-fno-show-column" Do not print column numbers in diagnostics. This may be necessary if diagnostics are being scanned by a program that does not understand the column numbers, such as \fBdejagnu\fR. ! .IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4 .IX Item "-A predicate=answer" Make an assertion with the predicate \fIpredicate\fR and answer \&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR \&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because it does not use shell special characters. ! .IP "\fB\-A -\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4 .IX Item "-A -predicate=answer" Cancel an assertion with the predicate \fIpredicate\fR and answer \&\fIanswer\fR. ! .IP "\fB\-A-\fR" 4 .IX Item "-A-" Cancel all predefined assertions and all assertions preceding it on the command line. Also, undefine all predefined macros and all macros preceding it on the command line. (This is a historical wart and may change in the future.) ! .IP "\fB\-dCHARS\fR" 4 .IX Item "-dCHARS" \&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters, and must not be preceded by a space. Other characters are interpreted *************** by the compiler proper, or reserved for *** 600,606 **** are silently ignored. If you specify characters whose behavior conflicts, the result is undefined. .RS 4 ! .Ip "\fBM\fR" 4 .IX Item "M" Instead of the normal output, generate a list of \fB#define\fR directives for all the macros defined during the execution of the --- 593,599 ---- are silently ignored. If you specify characters whose behavior conflicts, the result is undefined. .RS 4 ! .IP "\fBM\fR" 4 .IX Item "M" Instead of the normal output, generate a list of \fB#define\fR directives for all the macros defined during the execution of the *************** Assuming you have no file \fIfoo.h\fR, t *** 612,699 **** \& touch foo.h; cpp -dM foo.h .Ve will show all the predefined macros. ! .Ip "\fBD\fR" 4 .IX Item "D" Like \fBM\fR except in two respects: it does \fInot\fR include the predefined macros, and it outputs \fIboth\fR the \fB#define\fR directives and the result of preprocessing. Both kinds of output go to the standard output file. ! .Ip "\fBN\fR" 4 .IX Item "N" Like \fBD\fR, but emit only the macro names, not their expansions. ! .Ip "\fBI\fR" 4 .IX Item "I" Output \fB#include\fR directives in addition to the result of preprocessing. .RE .RS 4 .RE ! .Ip "\fB\-P\fR" 4 .IX Item "-P" Inhibit generation of linemarkers in the output from the preprocessor. This might be useful when running the preprocessor on something that is not C code, and will be sent to a program which might be confused by the linemarkers. ! .Ip "\fB\-C\fR" 4 .IX Item "-C" Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which are deleted ! along with the directive. Comments appearing in the expansion list of a ! macro will be preserved, and appear in place wherever the macro is ! invoked. .Sp ! You should be prepared for side effects when using \fB\-C\fR; it causes ! the preprocessor to treat comments as tokens in their own right. For ! example, macro redefinitions that were trivial when comments were ! replaced by a single space might become significant when comments are ! retained. Also, comments appearing at the start of what would be a directive line have the effect of turning that line into an ordinary source line, since the first token on the line is no longer a \fB#\fR. ! .Ip "\fB\-gcc\fR" 4 .IX Item "-gcc" Define the macros _\|_GNUC_\|_, _\|_GNUC_MINOR_\|_ and _\|_GNUC_PATCHLEVEL_\|_. These are defined automatically when you use \&\fBgcc \-E\fR; you can turn them off in that case with \&\fB\-no-gcc\fR. ! .Ip "\fB\-traditional\fR" 4 .IX Item "-traditional" Try to imitate the behavior of old-fashioned C, as opposed to \s-1ISO\s0 C. ! .Ip "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Process trigraph sequences. ! .Ip "\fB\-remap\fR" 4 .IX Item "-remap" Enable special code to work around file systems which only permit very short file names, such as \s-1MS-DOS\s0. ! .Ip "\fB\-$\fR" 4 .IX Item "-$" Forbid the use of \fB$\fR in identifiers. The C standard allows implementations to define extra characters that can appear in identifiers. By default \s-1GNU\s0 \s-1CPP\s0 permits \fB$\fR, a common extension. ! .Ip "\fB\-h\fR" 4 .IX Item "-h" .PD 0 ! .Ip "\fB\*(--help\fR" 4 .IX Item "help" ! .Ip "\fB\*(--target-help\fR" 4 .IX Item "target-help" .PD Print text describing all the command line options instead of preprocessing anything. ! .Ip "\fB\-v\fR" 4 .IX Item "-v" Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of execution, and report the final form of the include path. ! .Ip "\fB\-H\fR" 4 .IX Item "-H" Print the name of each header file used, in addition to other normal activities. Each name is indented to show how deep in the \&\fB#include\fR stack it is. ! .Ip "\fB\-version\fR" 4 .IX Item "-version" .PD 0 ! .Ip "\fB\*(--version\fR" 4 .IX Item "version" .PD Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to --- 605,688 ---- \& touch foo.h; cpp -dM foo.h .Ve will show all the predefined macros. ! .IP "\fBD\fR" 4 .IX Item "D" Like \fBM\fR except in two respects: it does \fInot\fR include the predefined macros, and it outputs \fIboth\fR the \fB#define\fR directives and the result of preprocessing. Both kinds of output go to the standard output file. ! .IP "\fBN\fR" 4 .IX Item "N" Like \fBD\fR, but emit only the macro names, not their expansions. ! .IP "\fBI\fR" 4 .IX Item "I" Output \fB#include\fR directives in addition to the result of preprocessing. .RE .RS 4 .RE ! .IP "\fB\-P\fR" 4 .IX Item "-P" Inhibit generation of linemarkers in the output from the preprocessor. This might be useful when running the preprocessor on something that is not C code, and will be sent to a program which might be confused by the linemarkers. ! .IP "\fB\-C\fR" 4 .IX Item "-C" Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which are deleted ! along with the directive. .Sp ! You should be prepared for side effects when using \fB\-C\fR; it ! causes the preprocessor to treat comments as tokens in their own right. ! For example, comments appearing at the start of what would be a directive line have the effect of turning that line into an ordinary source line, since the first token on the line is no longer a \fB#\fR. ! .IP "\fB\-gcc\fR" 4 .IX Item "-gcc" Define the macros _\|_GNUC_\|_, _\|_GNUC_MINOR_\|_ and _\|_GNUC_PATCHLEVEL_\|_. These are defined automatically when you use \&\fBgcc \-E\fR; you can turn them off in that case with \&\fB\-no-gcc\fR. ! .IP "\fB\-traditional\fR" 4 .IX Item "-traditional" Try to imitate the behavior of old-fashioned C, as opposed to \s-1ISO\s0 C. ! .IP "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Process trigraph sequences. ! .IP "\fB\-remap\fR" 4 .IX Item "-remap" Enable special code to work around file systems which only permit very short file names, such as \s-1MS-DOS\s0. ! .IP "\fB\-$\fR" 4 .IX Item "-$" Forbid the use of \fB$\fR in identifiers. The C standard allows implementations to define extra characters that can appear in identifiers. By default \s-1GNU\s0 \s-1CPP\s0 permits \fB$\fR, a common extension. ! .IP "\fB\-h\fR" 4 .IX Item "-h" .PD 0 ! .IP "\fB\*(--help\fR" 4 .IX Item "help" ! .IP "\fB\*(--target-help\fR" 4 .IX Item "target-help" .PD Print text describing all the command line options instead of preprocessing anything. ! .IP "\fB\-v\fR" 4 .IX Item "-v" Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of execution, and report the final form of the include path. ! .IP "\fB\-H\fR" 4 .IX Item "-H" Print the name of each header file used, in addition to other normal activities. Each name is indented to show how deep in the \&\fB#include\fR stack it is. ! .IP "\fB\-version\fR" 4 .IX Item "-version" .PD 0 ! .IP "\fB\*(--version\fR" 4 .IX Item "version" .PD Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.info gcc-3.0.2/gcc/doc/cpp.info *** gcc-3.0.1/gcc/doc/cpp.info Sun Aug 19 18:05:16 2001 --- gcc-3.0.2/gcc/doc/cpp.info Tue Oct 23 11:00:26 2001 *************** END-INFO-DIR-ENTRY *** 9,80 ****  Indirect: cpp.info-1: 191 ! cpp.info-2: 49183 ! cpp.info-3: 98499 ! cpp.info-4: 138493  Tag Table: (Indirect) Node: Top191 ! Node: Overview2749 ! Node: Initial processing5117 ! Node: Tokenization11574 ! Ref: Tokenization-Footnote-118694 ! Node: The preprocessing language18805 ! Node: Header Files21678 ! Node: Include Syntax23556 ! Node: Include Operation25058 ! Node: Search Path26954 ! Node: Once-Only Headers29506 ! Node: Computed Includes31160 ! Node: Wrapper Headers34299 ! Node: System Headers36718 ! Node: Macros38742 ! Node: Object-like Macros39842 ! Node: Function-like Macros43428 ! Node: Macro Arguments45038 ! Node: Stringification49183 ! Node: Concatenation52384 ! Node: Variadic Macros55483 ! Node: Predefined Macros59820 ! Node: Standard Predefined Macros60403 ! Node: Common Predefined Macros65825 ! Node: System-specific Predefined Macros72028 ! Node: C++ Named Operators74040 ! Node: Undefining and Redefining Macros74995 ! Node: Macro Pitfalls77073 ! Node: Misnesting77598 ! Node: Operator Precedence Problems78699 ! Node: Swallowing the Semicolon80554 ! Node: Duplication of Side Effects82566 ! Node: Self-Referential Macros84738 ! Node: Argument Prescan87148 ! Node: Newlines in Arguments90891 ! Node: Conditionals91836 ! Node: Conditional Uses93665 ! Node: Conditional Syntax95018 ! Node: Ifdef95333 ! Node: If98499 ! Node: Defined100912 ! Node: Else102185 ! Node: Elif102746 ! Node: Deleted Code104026 ! Node: Diagnostics105273 ! Node: Line Control106890 ! Node: Pragmas109004 ! Node: Other Directives113272 ! Node: Preprocessor Output114466 ! Node: Traditional Mode117565 ! Node: Implementation Details123144 ! Node: Implementation-defined behavior123767 ! Node: Implementation limits126040 ! Node: Obsolete Features128747 ! Node: Assertions129234 ! Node: Obsolete once-only headers131769 ! Node: Miscellaneous obsolete features133537 ! Node: Differences from previous versions134870 ! Node: Invocation138493 ! Node: Index of Directives157292 ! Node: Concept Index158653  End Tag Table --- 9,80 ----  Indirect: cpp.info-1: 191 ! cpp.info-2: 49230 ! cpp.info-3: 98558 ! cpp.info-4: 138540  Tag Table: (Indirect) Node: Top191 ! Node: Overview2745 ! Node: Initial processing5113 ! Node: Tokenization11570 ! Ref: Tokenization-Footnote-118741 ! Node: The preprocessing language18852 ! Node: Header Files21725 ! Node: Include Syntax23603 ! Node: Include Operation25105 ! Node: Search Path27001 ! Node: Once-Only Headers29553 ! Node: Computed Includes31207 ! Node: Wrapper Headers34346 ! Node: System Headers36765 ! Node: Macros38789 ! Node: Object-like Macros39889 ! Node: Function-like Macros43475 ! Node: Macro Arguments45085 ! Node: Stringification49230 ! Node: Concatenation52431 ! Node: Variadic Macros55545 ! Node: Predefined Macros59882 ! Node: Standard Predefined Macros60465 ! Node: Common Predefined Macros65887 ! Node: System-specific Predefined Macros72087 ! Node: C++ Named Operators74099 ! Node: Undefining and Redefining Macros75054 ! Node: Macro Pitfalls77132 ! Node: Misnesting77657 ! Node: Operator Precedence Problems78758 ! Node: Swallowing the Semicolon80613 ! Node: Duplication of Side Effects82625 ! Node: Self-Referential Macros84797 ! Node: Argument Prescan87207 ! Node: Newlines in Arguments90950 ! Node: Conditionals91895 ! Node: Conditional Uses93724 ! Node: Conditional Syntax95077 ! Node: Ifdef95392 ! Node: If98558 ! Node: Defined100971 ! Node: Else102244 ! Node: Elif102805 ! Node: Deleted Code104085 ! Node: Diagnostics105327 ! Node: Line Control106944 ! Node: Pragmas109058 ! Node: Other Directives113326 ! Node: Preprocessor Output114520 ! Node: Traditional Mode117616 ! Node: Implementation Details123195 ! Node: Implementation-defined behavior123818 ! Node: Implementation limits126091 ! Node: Obsolete Features128798 ! Node: Assertions129285 ! Node: Obsolete once-only headers131816 ! Node: Miscellaneous obsolete features133584 ! Node: Differences from previous versions134917 ! Node: Invocation138540 ! Node: Index of Directives157052 ! Node: Concept Index158413  End Tag Table diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.info-1 gcc-3.0.2/gcc/doc/cpp.info-1 *** gcc-3.0.1/gcc/doc/cpp.info-1 Sun Aug 19 18:05:16 2001 --- gcc-3.0.2/gcc/doc/cpp.info-1 Tue Oct 23 11:00:26 2001 *************** the license is included in the accompany *** 116,122 **** section "GNU Free Documentation License". This manual contains no Invariant Sections. The Front-Cover Texts ! are (a) (see below), and the the Back-Cover Texts are (b) (see below). (a) The FSF's Front-Cover Text is: --- 116,122 ---- section "GNU Free Documentation License". This manual contains no Invariant Sections. The Front-Cover Texts ! are (a) (see below), and the Back-Cover Texts are (b) (see below). (a) The FSF's Front-Cover Text is: *************** versions::. *** 442,449 **** meaningful to C and C++. All but three of the punctuation characters in ASCII are C punctuators. The exceptions are `@', `$', and ``'. In addition, all the two- and three-character operators are punctuators. ! There are also six "digraphs", which are merely alternate ways to spell ! other punctuators. This is a second attempt to work around missing punctuation in obsolete systems. It has no negative side effects, unlike trigraphs, but does not cover as much ground. The digraphs and their corresponding normal punctuators are: --- 442,450 ---- meaningful to C and C++. All but three of the punctuation characters in ASCII are C punctuators. The exceptions are `@', `$', and ``'. In addition, all the two- and three-character operators are punctuators. ! There are also six "digraphs", which the C++ standard calls ! "alternative tokens", which are merely alternate ways to spell other ! punctuators. This is a second attempt to work around missing punctuation in obsolete systems. It has no negative side effects, unlike trigraphs, but does not cover as much ground. The digraphs and their corresponding normal punctuators are: diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.info-2 gcc-3.0.2/gcc/doc/cpp.info-2 *** gcc-3.0.1/gcc/doc/cpp.info-2 Sun Aug 19 18:05:16 2001 --- gcc-3.0.2/gcc/doc/cpp.info-2 Tue Oct 23 11:00:26 2001 *************** multi-character operators such as `+=' c *** 105,113 **** However, two tokens that don't together form a valid token cannot be pasted together. For example, you cannot concatenate `x' with `+' in either order. If you try, the preprocessor issues a warning and emits ! the two tokens as if they had been written next to each other. It is ! common to find unnecessary uses of `##' in complex macros. If you get ! this warning, it is likely that you can simply remove the `##'. Both the tokens combined by `##' could come from the macro body, but you could just as well write them as one token in the first place. --- 105,114 ---- However, two tokens that don't together form a valid token cannot be pasted together. For example, you cannot concatenate `x' with `+' in either order. If you try, the preprocessor issues a warning and emits ! the two tokens. Whether it puts white space between the tokens is ! undefined. It is common to find unnecessary uses of `##' in complex ! macros. If you get this warning, it is likely that you can simply ! remove the `##'. Both the tokens combined by `##' could come from the macro body, but you could just as well write them as one token in the first place. *************** underscores. *** 505,514 **** environment it expands to a single `%'. `__USER_LABEL_PREFIX__' ! This macro expands to a single token which is the the prefix ! applied to user labels (symbols visible to C code) in assembly. ! For example, in the `m68k-aout' environment it expands to an `_', ! but in the `m68k-coff' environment it expands to nothing. This macro will have the correct definition even if `-f(no-)underscores' is in use, but it will not be correct if --- 506,515 ---- environment it expands to a single `%'. `__USER_LABEL_PREFIX__' ! This macro expands to a single token which is the prefix applied to ! user labels (symbols visible to C code) in assembly. For example, ! in the `m68k-aout' environment it expands to an `_', but in the ! `m68k-coff' environment it expands to nothing. This macro will have the correct definition even if `-f(no-)underscores' is in use, but it will not be correct if diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.info-3 gcc-3.0.2/gcc/doc/cpp.info-3 *** gcc-3.0.1/gcc/doc/cpp.info-3 Sun Aug 19 18:05:16 2001 --- gcc-3.0.2/gcc/doc/cpp.info-3 Tue Oct 23 11:00:26 2001 *************** syntax errors. *** 182,188 **** One way to avoid this problem is to use an always-false conditional instead. For instance, put `#if 0' before the deleted code and ! `#endif' after it. This This works even if the code being turned off contains conditionals, but they must be entire conditionals (balanced `#if' and `#endif'). --- 182,188 ---- One way to avoid this problem is to use an always-false conditional instead. For instance, put `#if 0' before the deleted code and ! `#endif' after it. This works even if the code being turned off contains conditionals, but they must be entire conditionals (balanced `#if' and `#endif'). *************** used as the error message. *** 209,218 **** You would use `#error' inside of a conditional that detects a combination of parameters which you know the program does not properly support. For example, if you know that the program will not run ! properly on a Vax, you might write #ifdef __vax__ ! #error "Won't work on Vaxen. See comments at get_last_object." #endif If you have several configuration parameters that must be set up by --- 209,218 ---- You would use `#error' inside of a conditional that detects a combination of parameters which you know the program does not properly support. For example, if you know that the program will not run ! properly on a VAX, you might write #ifdef __vax__ ! #error "Won't work on VAXen. See comments at get_last_object." #endif If you have several configuration parameters that must be set up by *************** a preprocessor preserves whitespace betw *** 427,433 **** e.g. a single space. In GNU CPP, whitespace between tokens is collapsed to become a single space, with the exception that the first token on a non-directive line is preceded with sufficient spaces that it appears in ! the same column in the preprocessed output that it appeared in in the original source file. This is so the output is easy to read. *Note Differences from previous versions::. CPP does not insert any whitespace where there was none in the original source, except where --- 427,433 ---- e.g. a single space. In GNU CPP, whitespace between tokens is collapsed to become a single space, with the exception that the first token on a non-directive line is preceded with sufficient spaces that it appears in ! the same column in the preprocessed output that it appeared in the original source file. This is so the output is easy to read. *Note Differences from previous versions::. CPP does not insert any whitespace where there was none in the original source, except where *************** answers. Subsequent assertions do not o *** 808,818 **** same predicate. All the answers for any given predicate are simultaneously true. ! Assertions can be cancelled with the the `#unassert' directive. It ! has the same syntax as `#assert'. In that form it cancels only the ! answer which was specified on the `#unassert' line; other answers for ! that predicate remain true. You can cancel an entire predicate by ! leaving out the answer: #unassert PREDICATE --- 808,818 ---- same predicate. All the answers for any given predicate are simultaneously true. ! Assertions can be cancelled with the `#unassert' directive. It has ! the same syntax as `#assert'. In that form it cancels only the answer ! which was specified on the `#unassert' line; other answers for that ! predicate remain true. You can cancel an entire predicate by leaving ! out the answer: #unassert PREDICATE diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.info-4 gcc-3.0.2/gcc/doc/cpp.info-4 *** gcc-3.0.1/gcc/doc/cpp.info-4 Sun Aug 19 18:05:16 2001 --- gcc-3.0.2/gcc/doc/cpp.info-4 Tue Oct 23 11:00:26 2001 *************** single-letter options may _not_ be group *** 422,439 **** `-C' Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which ! are deleted along with the directive. Comments appearing in the ! expansion list of a macro will be preserved, and appear in place ! wherever the macro is invoked. You should be prepared for side effects when using `-C'; it causes the preprocessor to treat comments as tokens in their own right. ! For example, macro redefinitions that were trivial when comments ! were replaced by a single space might become significant when ! comments are retained. Also, comments appearing at the start of ! what would be a directive line have the effect of turning that ! line into an ordinary source line, since the first token on the ! line is no longer a `#'. `-gcc' Define the macros __GNUC__, __GNUC_MINOR__ and --- 422,435 ---- `-C' Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which ! are deleted along with the directive. You should be prepared for side effects when using `-C'; it causes the preprocessor to treat comments as tokens in their own right. ! For example, comments appearing at the start of what would be a ! directive line have the effect of turning that line into an ! ordinary source line, since the first token on the line is no ! longer a `#'. `-gcc' Define the macros __GNUC__, __GNUC_MINOR__ and *************** Concept Index *** 518,523 **** --- 514,520 ---- * # operator: Stringification. * ## operator: Concatenation. * _Pragma: Pragmas. + * alternative tokens: Tokenization. * arguments: Macro Arguments. * arguments in macro definitions: Macro Arguments. * assertions: Assertions. *************** Concept Index *** 540,545 **** --- 537,543 ---- * defined: Defined. * diagnostic: Diagnostics. * differences from previous versions: Differences from previous versions. + * digraphs: Tokenization. * directive line: The preprocessing language. * directive name: The preprocessing language. * directives: The preprocessing language. diff -Nrc3pad gcc-3.0.1/gcc/doc/cpp.texi gcc-3.0.2/gcc/doc/cpp.texi *** gcc-3.0.1/gcc/doc/cpp.texi Wed Jun 27 08:08:23 2001 --- gcc-3.0.2/gcc/doc/cpp.texi Wed Oct 17 02:06:42 2001 *************** or Back-Cover Texts. *** 32,38 **** @macro covertexts This manual contains no Invariant Sections. The Front-Cover Texts are ! (a) (see below), and the the Back-Cover Texts are (b) (see below). (a) The FSF's Front-Cover Text is: --- 32,38 ---- @macro covertexts This manual contains no Invariant Sections. The Front-Cover Texts are ! (a) (see below), and the Back-Cover Texts are (b) (see below). (a) The FSF's Front-Cover Text is: *************** be removed in GCC 3.1. You may use cont *** 536,550 **** constant concatenation. @xref{Differences from previous versions}. @cindex punctuators @dfn{Punctuators} are all the usual bits of punctuation which are meaningful to C and C++. All but three of the punctuation characters in ASCII are C punctuators. The exceptions are @samp{@@}, @samp{$}, and @samp{`}. In addition, all the two- and three-character operators are ! punctuators. There are also six @dfn{digraphs}, which are merely ! alternate ways to spell other punctuators. This is a second attempt to ! work around missing punctuation in obsolete systems. It has no negative ! side effects, unlike trigraphs, but does not cover as much ground. The ! digraphs and their corresponding normal punctuators are: @example Digraph: <% %> <: :> %: %:%: --- 536,553 ---- constant concatenation. @xref{Differences from previous versions}. @cindex punctuators + @cindex digraphs + @cindex alternative tokens @dfn{Punctuators} are all the usual bits of punctuation which are meaningful to C and C++. All but three of the punctuation characters in ASCII are C punctuators. The exceptions are @samp{@@}, @samp{$}, and @samp{`}. In addition, all the two- and three-character operators are ! punctuators. There are also six @dfn{digraphs}, which the C++ standard ! calls @dfn{alternative tokens}, which are merely alternate ways to spell ! other punctuators. This is a second attempt to work around missing ! punctuation in obsolete systems. It has no negative side effects, ! unlike trigraphs, but does not cover as much ground. The digraphs and ! their corresponding normal punctuators are: @example Digraph: <% %> <: :> %: %:%: *************** token pasting. *** 1506,1515 **** However, two tokens that don't together form a valid token cannot be pasted together. For example, you cannot concatenate @code{x} with @code{+} in either order. If you try, the preprocessor issues a warning ! and emits the two tokens as if they had been written next to each other. ! It is common to find unnecessary uses of @samp{##} in complex macros. ! If you get this warning, it is likely that you can simply remove the ! @samp{##}. Both the tokens combined by @samp{##} could come from the macro body, but you could just as well write them as one token in the first place. --- 1509,1518 ---- However, two tokens that don't together form a valid token cannot be pasted together. For example, you cannot concatenate @code{x} with @code{+} in either order. If you try, the preprocessor issues a warning ! and emits the two tokens. Whether it puts white space between the ! tokens is undefined. It is common to find unnecessary uses of @samp{##} ! in complex macros. If you get this warning, it is likely that you can ! simply remove the @samp{##}. Both the tokens combined by @samp{##} could come from the macro body, but you could just as well write them as one token in the first place. *************** expands to nothing, but in the @code{m68 *** 1947,1953 **** to a single @samp{%}. @item __USER_LABEL_PREFIX__ ! This macro expands to a single token which is the the prefix applied to user labels (symbols visible to C code) in assembly. For example, in the @code{m68k-aout} environment it expands to an @samp{_}, but in the @code{m68k-coff} environment it expands to nothing. --- 1950,1956 ---- to a single @samp{%}. @item __USER_LABEL_PREFIX__ ! This macro expands to a single token which is the prefix applied to user labels (symbols visible to C code) in assembly. For example, in the @code{m68k-aout} environment it expands to an @samp{_}, but in the @code{m68k-coff} environment it expands to nothing. *************** syntax errors. *** 2920,2926 **** One way to avoid this problem is to use an always-false conditional instead. For instance, put @code{#if 0} before the deleted code and ! @code{#endif} after it. This This works even if the code being turned off contains conditionals, but they must be entire conditionals (balanced @samp{#if} and @samp{#endif}). --- 2923,2929 ---- One way to avoid this problem is to use an always-false conditional instead. For instance, put @code{#if 0} before the deleted code and ! @code{#endif} after it. This works even if the code being turned off contains conditionals, but they must be entire conditionals (balanced @samp{#if} and @samp{#endif}). *************** are used as the error message. *** 2949,2960 **** You would use @samp{#error} inside of a conditional that detects a combination of parameters which you know the program does not properly support. For example, if you know that the program will not run ! properly on a Vax, you might write @example @group #ifdef __vax__ ! #error "Won't work on Vaxen. See comments at get_last_object." #endif @end group @end example --- 2952,2963 ---- You would use @samp{#error} inside of a conditional that detects a combination of parameters which you know the program does not properly support. For example, if you know that the program will not run ! properly on a VAX, you might write @example @group #ifdef __vax__ ! #error "Won't work on VAXen. See comments at get_last_object." #endif @end group @end example *************** preprocessor preserves whitespace betwee *** 3190,3196 **** e.g.@: a single space. In GNU CPP, whitespace between tokens is collapsed to become a single space, with the exception that the first token on a non-directive line is preceded with sufficient spaces that it appears in ! the same column in the preprocessed output that it appeared in in the original source file. This is so the output is easy to read. @xref{Differences from previous versions}. CPP does not insert any whitespace where there was none in the original source, except where --- 3193,3199 ---- e.g.@: a single space. In GNU CPP, whitespace between tokens is collapsed to become a single space, with the exception that the first token on a non-directive line is preceded with sufficient spaces that it appears in ! the same column in the preprocessed output that it appeared in the original source file. This is so the output is easy to read. @xref{Differences from previous versions}. CPP does not insert any whitespace where there was none in the original source, except where *************** simultaneously true. *** 3601,3607 **** @cindex assertions, cancelling @findex #unassert ! Assertions can be cancelled with the the @samp{#unassert} directive. It has the same syntax as @samp{#assert}. In that form it cancels only the answer which was specified on the @samp{#unassert} line; other answers for that predicate remain true. You can cancel an entire predicate by --- 3604,3610 ---- @cindex assertions, cancelling @findex #unassert ! Assertions can be cancelled with the @samp{#unassert} directive. It has the same syntax as @samp{#assert}. In that form it cancels only the answer which was specified on the @samp{#unassert} line; other answers for that predicate remain true. You can cancel an entire predicate by *************** linemarkers. @xref{Preprocessor Output} *** 4219,4233 **** @item -C Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which are deleted ! along with the directive. Comments appearing in the expansion list of a ! macro will be preserved, and appear in place wherever the macro is ! invoked. ! You should be prepared for side effects when using @option{-C}; it causes ! the preprocessor to treat comments as tokens in their own right. For ! example, macro redefinitions that were trivial when comments were ! replaced by a single space might become significant when comments are ! retained. Also, comments appearing at the start of what would be a directive line have the effect of turning that line into an ordinary source line, since the first token on the line is no longer a @samp{#}. --- 4222,4232 ---- @item -C Do not discard comments. All comments are passed through to the output file, except for comments in processed directives, which are deleted ! along with the directive. ! You should be prepared for side effects when using @option{-C}; it ! causes the preprocessor to treat comments as tokens in their own right. ! For example, comments appearing at the start of what would be a directive line have the effect of turning that line into an ordinary source line, since the first token on the line is no longer a @samp{#}. diff -Nrc3pad gcc-3.0.1/gcc/doc/extend.texi gcc-3.0.2/gcc/doc/extend.texi *** gcc-3.0.1/gcc/doc/extend.texi Sat Aug 4 04:40:55 2001 --- gcc-3.0.2/gcc/doc/extend.texi Tue Oct 9 16:14:16 2001 *************** to relate to the structure, union or enu *** 2150,2156 **** enclosing declaration the type specifier appears in, and the type defined is not complete until after the attribute specifiers. @c Otherwise, there would be the following problems: a shift/reduce ! @c conflict between attributes binding the the struct/union/enum and @c binding to the list of specifiers/qualifiers; and "aligned" @c attributes could use sizeof for the structure, but the size could be @c changed later by "packed" attributes. --- 2150,2156 ---- enclosing declaration the type specifier appears in, and the type defined is not complete until after the attribute specifiers. @c Otherwise, there would be the following problems: a shift/reduce ! @c conflict between attributes binding the struct/union/enum and @c binding to the list of specifiers/qualifiers; and "aligned" @c attributes could use sizeof for the structure, but the size could be @c changed later by "packed" attributes. *************** On some machines it may be impossible to *** 3701,3707 **** any function other than the current one; in such cases, or when the top of the stack has been reached, this function will return @code{0}. ! This function should only be used with a non-zero argument for debugging purposes. @end deftypefn --- 3701,3707 ---- any function other than the current one; in such cases, or when the top of the stack has been reached, this function will return @code{0}. ! This function should only be used with a nonzero argument for debugging purposes. @end deftypefn diff -Nrc3pad gcc-3.0.1/gcc/doc/gcc.1 gcc-3.0.2/gcc/doc/gcc.1 *** gcc-3.0.1/gcc/doc/gcc.1 Sun Aug 19 17:45:03 2001 --- gcc-3.0.2/gcc/doc/gcc.1 Wed Oct 17 06:14:31 2001 *************** *** 1,8 **** ! .\" Automatically generated by Pod::Man version 1.16 ! .\" Tue Jul 3 00:41:07 2001 .\" .\" Standard preamble: ! .\" ====================================================================== .de Sh \" Subsection heading .br .if t .Sp --- 1,8 ---- ! .\" Automatically generated by Pod::Man version 1.19 ! .\" Wed Oct 17 11:39:25 2001 .\" .\" Standard preamble: ! .\" ======================================================================== .de Sh \" Subsection heading .br .if t .Sp *************** *** 15,26 **** .if t .sp .5v .if n .sp .. - .de Ip \" List item - .br - .ie \\n(.$>=3 .ne \\$3 - .el .ne 3 - .IP "\\$1" \\$2 - .. .de Vb \" Begin verbatim text .ft CW .nf --- 15,20 ---- *************** *** 34,42 **** .\" Set up some character translations and predefined strings. \*(-- will .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left .\" double quote, and \*(R" will give a right double quote. | will give a ! .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used ! .\" to do unbreakable dashes and therefore won't be available. \*(C` and ! .\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> .tr \(*W-|\(bv\*(Tr .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' .ie n \{\ --- 28,36 ---- .\" Set up some character translations and predefined strings. \*(-- will .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left .\" double quote, and \*(R" will give a right double quote. | will give a ! .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used to ! .\" do unbreakable dashes and therefore won't be available. \*(C` and \*(C' ! .\" expand to `' in nroff, nothing in troff, for use with C<>. .tr \(*W-|\(bv\*(Tr .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' .ie n \{\ *************** *** 56,65 **** . ds R" '' 'br\} .\" ! .\" If the F register is turned on, we'll generate index entries on stderr ! .\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and ! .\" index entries marked with X<> in POD. Of course, you'll have to process ! .\" the output yourself in some meaningful fashion. .if \nF \{\ . de IX . tm Index:\\$1\t\\n%\t"\\$2" --- 50,59 ---- . ds R" '' 'br\} .\" ! .\" If the F register is turned on, we'll generate index entries on stderr for ! .\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index ! .\" entries marked with X<> in POD. Of course, you'll have to process the ! .\" output yourself in some meaningful fashion. .if \nF \{\ . de IX . tm Index:\\$1\t\\n%\t"\\$2" *************** *** 68,81 **** . rr F .\} .\" ! .\" For nroff, turn off justification. Always turn off hyphenation; it ! .\" makes way too many mistakes in technical documents. .hy 0 .if n .na .\" .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). .\" Fear. Run. Save yourself. No user-serviceable parts. - .bd B 3 . \" fudge factors for nroff and troff .if n \{\ . ds #H 0 --- 62,74 ---- . rr F .\} .\" ! .\" For nroff, turn off justification. Always turn off hyphenation; it makes ! .\" way too many mistakes in technical documents. .hy 0 .if n .na .\" .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). .\" Fear. Run. Save yourself. No user-serviceable parts. . \" fudge factors for nroff and troff .if n \{\ . ds #H 0 *************** *** 135,144 **** . ds Ae AE .\} .rm #[ #] #H #V #F C ! .\" ====================================================================== .\" .IX Title "GCC 1" ! .TH GCC 1 "gcc-3.0.1" "2001-07-03" "GNU" .UC .SH "NAME" gcc \- \s-1GNU\s0 project C and \*(C+ compiler --- 128,137 ---- . ds Ae AE .\} .rm #[ #] #H #V #F C ! .\" ======================================================================== .\" .IX Title "GCC 1" ! .TH GCC 1 "gcc-3.0.2" "2001-10-17" "GNU" .UC .SH "NAME" gcc \- \s-1GNU\s0 project C and \*(C+ compiler *************** only one of these two forms, whichever o *** 194,204 **** .IX Subsection "Option Summary" Here is a summary of all the options, grouped by type. Explanations are in the following sections. ! .Ip "\fIOverall Options\fR" 4 .IX Item "Overall Options" \&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-pipe \-pass-exit-codes \-x\fR \fIlanguage\fR \&\fB\-v \-\-target-help \-\-help\fR ! .Ip "\fIC Language Options\fR" 4 .IX Item "C Language Options" \&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux-info\fR \fIfilename\fR \&\fB\-fno-asm \-fno-builtin --- 187,197 ---- .IX Subsection "Option Summary" Here is a summary of all the options, grouped by type. Explanations are in the following sections. ! .IP "\fIOverall Options\fR" 4 .IX Item "Overall Options" \&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-pipe \-pass-exit-codes \-x\fR \fIlanguage\fR \&\fB\-v \-\-target-help \-\-help\fR ! .IP "\fIC Language Options\fR" 4 .IX Item "C Language Options" \&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux-info\fR \fIfilename\fR \&\fB\-fno-asm \-fno-builtin *************** in the following sections. *** 208,244 **** \&\-fsigned-bitfields \-fsigned-char \&\-funsigned-bitfields \-funsigned-char \&\-fwritable-strings \-fshort-wchar\fR ! .Ip "\fI\*(C+ Language Options\fR" 4 .IX Item " Language Options" \&\fB\-fno-access-control \-fcheck-new \-fconserve-space \&\-fno-const-strings \-fdollars-in-identifiers \&\-fno-elide-constructors \&\-fno-enforce-eh-specs \-fexternal-templates \&\-falt-external-templates ! \&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords \-fno-honor-std \&\-fno-implicit-templates \&\-fno-implicit-inline-templates \&\-fno-implement-inlines \-fms-extensions \&\-fno-nonansi-builtins \-fno-operator-names \&\-fno-optional-diags \-fpermissive \&\-frepo \-fno-rtti \-fstats \-ftemplate-depth-\fR\fIn\fR ! \&\fB\-fuse-cxa-atexit \-fvtable-gc \-fno-weak \-nostdinc++ \&\-fno-default-inline \-Wctor-dtor-privacy \&\-Wnon-virtual-dtor \-Wreorder \&\-Weffc++ \-Wno-deprecated \&\-Wno-non-template-friend \-Wold-style-cast \&\-Woverloaded-virtual \-Wno-pmf-conversions \&\-Wsign-promo \-Wsynth\fR ! .Ip "\fIObjective-C Language Options\fR" 4 .IX Item "Objective-C Language Options" \&\fB\-fconstant-string-class=\fR\fIclass-name\fR \&\fB\-fgnu-runtime \-fnext-runtime \-gen-decls \&\-Wno-protocol \-Wselector\fR ! .Ip "\fILanguage Independent Options\fR" 4 .IX Item "Language Independent Options" \&\fB\-fmessage-length=\fR\fIn\fR \&\fB\-fdiagnostics-show-location=\fR[\fBonce\fR|\fBevery-line\fR] ! .Ip "\fIWarning Options\fR" 4 .IX Item "Warning Options" \&\fB\-fsyntax-only \-pedantic \-pedantic-errors \&\-w \-W \-Wall \-Waggregate-return --- 201,237 ---- \&\-fsigned-bitfields \-fsigned-char \&\-funsigned-bitfields \-funsigned-char \&\-fwritable-strings \-fshort-wchar\fR ! .IP "\fI\*(C+ Language Options\fR" 4 .IX Item " Language Options" \&\fB\-fno-access-control \-fcheck-new \-fconserve-space \&\-fno-const-strings \-fdollars-in-identifiers \&\-fno-elide-constructors \&\-fno-enforce-eh-specs \-fexternal-templates \&\-falt-external-templates ! \&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords \&\-fno-implicit-templates \&\-fno-implicit-inline-templates \&\-fno-implement-inlines \-fms-extensions \&\-fno-nonansi-builtins \-fno-operator-names \&\-fno-optional-diags \-fpermissive \&\-frepo \-fno-rtti \-fstats \-ftemplate-depth-\fR\fIn\fR ! \&\fB\-fuse-cxa-atexit \-fno-weak \-nostdinc++ \&\-fno-default-inline \-Wctor-dtor-privacy \&\-Wnon-virtual-dtor \-Wreorder \&\-Weffc++ \-Wno-deprecated \&\-Wno-non-template-friend \-Wold-style-cast \&\-Woverloaded-virtual \-Wno-pmf-conversions \&\-Wsign-promo \-Wsynth\fR ! .IP "\fIObjective-C Language Options\fR" 4 .IX Item "Objective-C Language Options" \&\fB\-fconstant-string-class=\fR\fIclass-name\fR \&\fB\-fgnu-runtime \-fnext-runtime \-gen-decls \&\-Wno-protocol \-Wselector\fR ! .IP "\fILanguage Independent Options\fR" 4 .IX Item "Language Independent Options" \&\fB\-fmessage-length=\fR\fIn\fR \&\fB\-fdiagnostics-show-location=\fR[\fBonce\fR|\fBevery-line\fR] ! .IP "\fIWarning Options\fR" 4 .IX Item "Warning Options" \&\fB\-fsyntax-only \-pedantic \-pedantic-errors \&\-w \-W \-Wall \-Waggregate-return *************** in the following sections. *** 262,272 **** \&\-Wunknown-pragmas \-Wunreachable-code \&\-Wunused \-Wunused-function \-Wunused-label \-Wunused-parameter \&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR ! .Ip "\fIC-only Warning Options\fR" 4 .IX Item "C-only Warning Options" \&\fB\-Wbad-function-cast \-Wmissing-prototypes \-Wnested-externs \&\-Wstrict-prototypes \-Wtraditional\fR ! .Ip "\fIDebugging Options\fR" 4 .IX Item "Debugging Options" \&\fB\-a \-ax \-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion \&\-fdump-unnumbered \-fdump-translation-unit\fR[\fB-\fR\fIn\fR] --- 255,265 ---- \&\-Wunknown-pragmas \-Wunreachable-code \&\-Wunused \-Wunused-function \-Wunused-label \-Wunused-parameter \&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR ! .IP "\fIC-only Warning Options\fR" 4 .IX Item "C-only Warning Options" \&\fB\-Wbad-function-cast \-Wmissing-prototypes \-Wnested-externs \&\-Wstrict-prototypes \-Wtraditional\fR ! .IP "\fIDebugging Options\fR" 4 .IX Item "Debugging Options" \&\fB\-a \-ax \-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion \&\-fdump-unnumbered \-fdump-translation-unit\fR[\fB-\fR\fIn\fR] *************** in the following sections. *** 280,286 **** \&\-print-multi-directory \-print-multi-lib \&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q \&\-save-temps \-time\fR ! .Ip "\fIOptimization Options\fR" 4 .IX Item "Optimization Options" \&\fB\-falign-functions=\fR\fIn\fR \fB\-falign-jumps=\fR\fIn\fR \&\fB\-falign-labels=\fR\fIn\fR \fB\-falign-loops=\fR\fIn\fR --- 273,279 ---- \&\-print-multi-directory \-print-multi-lib \&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q \&\-save-temps \-time\fR ! .IP "\fIOptimization Options\fR" 4 .IX Item "Optimization Options" \&\fB\-falign-functions=\fR\fIn\fR \fB\-falign-jumps=\fR\fIn\fR \&\fB\-falign-labels=\fR\fIn\fR \fB\-falign-loops=\fR\fIn\fR *************** in the following sections. *** 304,310 **** \&\-funroll-all-loops \-funroll-loops \&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR \&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR ! .Ip "\fIPreprocessor Options\fR" 4 .IX Item "Preprocessor Options" \&\fB\-$ \-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR \fB\-A-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] \&\fB\-C \-dD \-dI \-dM \-dN --- 297,303 ---- \&\-funroll-all-loops \-funroll-loops \&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR \&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR ! .IP "\fIPreprocessor Options\fR" 4 .IX Item "Preprocessor Options" \&\fB\-$ \-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR \fB\-A-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] \&\fB\-C \-dD \-dI \-dM \-dN *************** in the following sections. *** 315,324 **** \&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR \&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc \-P \-remap \&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR ! .Ip "\fIAssembler Option\fR" 4 .IX Item "Assembler Option" \&\fB\-Wa,\fR\fIoption\fR ! .Ip "\fILinker Options\fR" 4 .IX Item "Linker Options" \&\fB \&\fR\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR --- 308,317 ---- \&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR \&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc \-P \-remap \&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR ! .IP "\fIAssembler Option\fR" 4 .IX Item "Assembler Option" \&\fB\-Wa,\fR\fIoption\fR ! .IP "\fILinker Options\fR" 4 .IX Item "Linker Options" \&\fB \&\fR\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR *************** in the following sections. *** 326,338 **** \&\-s \-static \-static-libgcc \-shared \-shared-libgcc \-symbolic \&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR \&\fB\-u\fR \fIsymbol\fR ! .Ip "\fIDirectory Options\fR" 4 .IX Item "Directory Options" \&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-I- \-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR ! .Ip "\fITarget Options\fR" 4 .IX Item "Target Options" \&\fB\-b\fR \fImachine\fR \fB\-V\fR \fIversion\fR ! .Ip "\fIMachine Dependent Options\fR" 4 .IX Item "Machine Dependent Options" \&\fIM680x0 Options\fR .Sp --- 319,331 ---- \&\-s \-static \-static-libgcc \-shared \-shared-libgcc \-symbolic \&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR \&\fB\-u\fR \fIsymbol\fR ! .IP "\fIDirectory Options\fR" 4 .IX Item "Directory Options" \&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-I- \-L\fR\fIdir\fR \fB\-specs=\fR\fIfile\fR ! .IP "\fITarget Options\fR" 4 .IX Item "Target Options" \&\fB\-b\fR \fImachine\fR \fB\-V\fR \fIversion\fR ! .IP "\fIMachine Dependent Options\fR" 4 .IX Item "Machine Dependent Options" \&\fIM680x0 Options\fR .Sp *************** in the following sections. *** 594,600 **** \&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency \&\-minline-divide-max-throughput \-mno-dwarf2\-asm \&\-mfixed-range=\fR\fIregister-range\fR ! .Ip "\fICode Generation Options\fR" 4 .IX Item "Code Generation Options" \&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR \&\fB\-ffixed-\fR\fIreg\fR \fB\-fexceptions --- 587,599 ---- \&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency \&\-minline-divide-max-throughput \-mno-dwarf2\-asm \&\-mfixed-range=\fR\fIregister-range\fR ! .Sp ! \&\fIS/390 and zSeries Options\fR ! .Sp ! \&\fB\-mhard-float \-msoft-float \-mbackchain \-mno-backchain ! \&\-msmall-exec \-mno-small-exec \-mmvcle \-mno-mvcle ! \&\-m64 \-m31 \-mdebug \-mno-debug\fR ! .IP "\fICode Generation Options\fR" 4 .IX Item "Code Generation Options" \&\fB\-fcall-saved-\fR\fIreg\fR \fB\-fcall-used-\fR\fIreg\fR \&\fB\-ffixed-\fR\fIreg\fR \fB\-fexceptions *************** compiled, and those specified as input) *** 620,697 **** .PP For any given input file, the file name suffix determines what kind of compilation is done: ! .Ip "\fIfile\fR\fB.c\fR" 4 .IX Item "file.c" C source code which must be preprocessed. ! .Ip "\fIfile\fR\fB.i\fR" 4 .IX Item "file.i" C source code which should not be preprocessed. ! .Ip "\fIfile\fR\fB.ii\fR" 4 .IX Item "file.ii" \&\*(C+ source code which should not be preprocessed. ! .Ip "\fIfile\fR\fB.m\fR" 4 .IX Item "file.m" Objective-C source code. Note that you must link with the library \&\fIlibobjc.a\fR to make an Objective-C program work. ! .Ip "\fIfile\fR\fB.mi\fR" 4 .IX Item "file.mi" Objective-C source code which should not be preprocessed. ! .Ip "\fIfile\fR\fB.h\fR" 4 .IX Item "file.h" C header file (not to be compiled or linked). ! .Ip "\fIfile\fR\fB.cc\fR" 4 .IX Item "file.cc" .PD 0 ! .Ip "\fIfile\fR\fB.cp\fR" 4 .IX Item "file.cp" ! .Ip "\fIfile\fR\fB.cxx\fR" 4 .IX Item "file.cxx" ! .Ip "\fIfile\fR\fB.cpp\fR" 4 .IX Item "file.cpp" ! .Ip "\fIfile\fR\fB.c++\fR" 4 .IX Item "file.c++" ! .Ip "\fIfile\fR\fB.C\fR" 4 .IX Item "file.C" .PD \&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR, the last two letters must both be literally \fBx\fR. Likewise, \&\fB.C\fR refers to a literal capital C. ! .Ip "\fIfile\fR\fB.f\fR" 4 .IX Item "file.f" .PD 0 ! .Ip "\fIfile\fR\fB.for\fR" 4 .IX Item "file.for" ! .Ip "\fIfile\fR\fB.FOR\fR" 4 .IX Item "file.FOR" .PD Fortran source code which should not be preprocessed. ! .Ip "\fIfile\fR\fB.F\fR" 4 .IX Item "file.F" .PD 0 ! .Ip "\fIfile\fR\fB.fpp\fR" 4 .IX Item "file.fpp" ! .Ip "\fIfile\fR\fB.FPP\fR" 4 .IX Item "file.FPP" .PD Fortran source code which must be preprocessed (with the traditional preprocessor). ! .Ip "\fIfile\fR\fB.r\fR" 4 .IX Item "file.r" Fortran source code which must be preprocessed with a \s-1RATFOR\s0 preprocessor (not included with \s-1GCC\s0). ! .Ip "\fIfile\fR\fB.s\fR" 4 .IX Item "file.s" Assembler code. ! .Ip "\fIfile\fR\fB.S\fR" 4 .IX Item "file.S" Assembler code which must be preprocessed. ! .Ip "\fIother\fR" 4 .IX Item "other" An object file to be fed straight into linking. Any file name with no recognized suffix is treated this way. .PP You can specify the input language explicitly with the \fB\-x\fR option: ! .Ip "\fB\-x\fR \fIlanguage\fR" 4 .IX Item "-x language" Specify explicitly the \fIlanguage\fR for the following input files (rather than letting the compiler choose a default based on the file --- 619,696 ---- .PP For any given input file, the file name suffix determines what kind of compilation is done: ! .IP "\fIfile\fR\fB.c\fR" 4 .IX Item "file.c" C source code which must be preprocessed. ! .IP "\fIfile\fR\fB.i\fR" 4 .IX Item "file.i" C source code which should not be preprocessed. ! .IP "\fIfile\fR\fB.ii\fR" 4 .IX Item "file.ii" \&\*(C+ source code which should not be preprocessed. ! .IP "\fIfile\fR\fB.m\fR" 4 .IX Item "file.m" Objective-C source code. Note that you must link with the library \&\fIlibobjc.a\fR to make an Objective-C program work. ! .IP "\fIfile\fR\fB.mi\fR" 4 .IX Item "file.mi" Objective-C source code which should not be preprocessed. ! .IP "\fIfile\fR\fB.h\fR" 4 .IX Item "file.h" C header file (not to be compiled or linked). ! .IP "\fIfile\fR\fB.cc\fR" 4 .IX Item "file.cc" .PD 0 ! .IP "\fIfile\fR\fB.cp\fR" 4 .IX Item "file.cp" ! .IP "\fIfile\fR\fB.cxx\fR" 4 .IX Item "file.cxx" ! .IP "\fIfile\fR\fB.cpp\fR" 4 .IX Item "file.cpp" ! .IP "\fIfile\fR\fB.c++\fR" 4 .IX Item "file.c++" ! .IP "\fIfile\fR\fB.C\fR" 4 .IX Item "file.C" .PD \&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR, the last two letters must both be literally \fBx\fR. Likewise, \&\fB.C\fR refers to a literal capital C. ! .IP "\fIfile\fR\fB.f\fR" 4 .IX Item "file.f" .PD 0 ! .IP "\fIfile\fR\fB.for\fR" 4 .IX Item "file.for" ! .IP "\fIfile\fR\fB.FOR\fR" 4 .IX Item "file.FOR" .PD Fortran source code which should not be preprocessed. ! .IP "\fIfile\fR\fB.F\fR" 4 .IX Item "file.F" .PD 0 ! .IP "\fIfile\fR\fB.fpp\fR" 4 .IX Item "file.fpp" ! .IP "\fIfile\fR\fB.FPP\fR" 4 .IX Item "file.FPP" .PD Fortran source code which must be preprocessed (with the traditional preprocessor). ! .IP "\fIfile\fR\fB.r\fR" 4 .IX Item "file.r" Fortran source code which must be preprocessed with a \s-1RATFOR\s0 preprocessor (not included with \s-1GCC\s0). ! .IP "\fIfile\fR\fB.s\fR" 4 .IX Item "file.s" Assembler code. ! .IP "\fIfile\fR\fB.S\fR" 4 .IX Item "file.S" Assembler code which must be preprocessed. ! .IP "\fIother\fR" 4 .IX Item "other" An object file to be fed straight into linking. Any file name with no recognized suffix is treated this way. .PP You can specify the input language explicitly with the \fB\-x\fR option: ! .IP "\fB\-x\fR \fIlanguage\fR" 4 .IX Item "-x language" Specify explicitly the \fIlanguage\fR for the following input files (rather than letting the compiler choose a default based on the file *************** the next \fB\-x\fR option. Possible val *** 706,717 **** \& f77 f77-cpp-input ratfor \& java .Ve ! .Ip "\fB\-x none\fR" 4 .IX Item "-x none" Turn off any specification of a language, so that subsequent files are handled according to their file name suffixes (as they are if \fB\-x\fR has not been used at all). ! .Ip "\fB\-pass-exit-codes\fR" 4 .IX Item "-pass-exit-codes" Normally the \fBgcc\fR program will exit with the code of 1 if any phase of the compiler returns a non-success return code. If you specify --- 705,716 ---- \& f77 f77-cpp-input ratfor \& java .Ve ! .IP "\fB\-x none\fR" 4 .IX Item "-x none" Turn off any specification of a language, so that subsequent files are handled according to their file name suffixes (as they are if \fB\-x\fR has not been used at all). ! .IP "\fB\-pass-exit-codes\fR" 4 .IX Item "-pass-exit-codes" Normally the \fBgcc\fR program will exit with the code of 1 if any phase of the compiler returns a non-success return code. If you specify *************** If you only want some of the stages of c *** 724,730 **** one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where \&\fBgcc\fR is to stop. Note that some combinations (for example, \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all. ! .Ip "\fB\-c\fR" 4 .IX Item "-c" Compile or assemble the source files, but do not link. The linking stage simply is not done. The ultimate output is in the form of an --- 723,729 ---- one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where \&\fBgcc\fR is to stop. Note that some combinations (for example, \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all. ! .IP "\fB\-c\fR" 4 .IX Item "-c" Compile or assemble the source files, but do not link. The linking stage simply is not done. The ultimate output is in the form of an *************** the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, *** 735,741 **** .Sp Unrecognized input files, not requiring compilation or assembly, are ignored. ! .Ip "\fB\-S\fR" 4 .IX Item "-S" Stop after the stage of compilation proper; do not assemble. The output is in the form of an assembler code file for each non-assembler input --- 734,740 ---- .Sp Unrecognized input files, not requiring compilation or assembly, are ignored. ! .IP "\fB\-S\fR" 4 .IX Item "-S" Stop after the stage of compilation proper; do not assemble. The output is in the form of an assembler code file for each non-assembler input *************** By default, the assembler file name for *** 745,758 **** replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR. .Sp Input files that don't require compilation are ignored. ! .Ip "\fB\-E\fR" 4 .IX Item "-E" Stop after the preprocessing stage; do not run the compiler proper. The output is in the form of preprocessed source code, which is sent to the standard output. .Sp Input files which don't require preprocessing are ignored. ! .Ip "\fB\-o\fR \fIfile\fR" 4 .IX Item "-o file" Place output in file \fIfile\fR. This applies regardless to whatever sort of output is being produced, whether it be an executable file, --- 744,757 ---- replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR. .Sp Input files that don't require compilation are ignored. ! .IP "\fB\-E\fR" 4 .IX Item "-E" Stop after the preprocessing stage; do not run the compiler proper. The output is in the form of preprocessed source code, which is sent to the standard output. .Sp Input files which don't require preprocessing are ignored. ! .IP "\fB\-o\fR \fIfile\fR" 4 .IX Item "-o file" Place output in file \fIfile\fR. This applies regardless to whatever sort of output is being produced, whether it be an executable file, *************** If \fB\-o\fR is not specified, the defau *** 766,783 **** in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in \&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and all preprocessed C source on standard output. ! .Ip "\fB\-v\fR" 4 .IX Item "-v" Print (on standard error output) the commands executed to run the stages of compilation. Also print the version number of the compiler driver program and of the preprocessor and the compiler proper. ! .Ip "\fB\-pipe\fR" 4 .IX Item "-pipe" Use pipes rather than temporary files for communication between the various stages of compilation. This fails to work on some systems where the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has no trouble. ! .Ip "\fB\*(--help\fR" 4 .IX Item "help" Print (on the standard output) a description of the command line options understood by \fBgcc\fR. If the \fB\-v\fR option is also specified --- 765,782 ---- in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in \&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and all preprocessed C source on standard output. ! .IP "\fB\-v\fR" 4 .IX Item "-v" Print (on standard error output) the commands executed to run the stages of compilation. Also print the version number of the compiler driver program and of the preprocessor and the compiler proper. ! .IP "\fB\-pipe\fR" 4 .IX Item "-pipe" Use pipes rather than temporary files for communication between the various stages of compilation. This fails to work on some systems where the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has no trouble. ! .IP "\fB\*(--help\fR" 4 .IX Item "help" Print (on the standard output) a description of the command line options understood by \fBgcc\fR. If the \fB\-v\fR option is also specified *************** invoked by \fBgcc\fR, so that they can d *** 786,792 **** they accept. If the \fB\-W\fR option is also specified then command line options which have no documentation associated with them will also be displayed. ! .Ip "\fB\*(--target-help\fR" 4 .IX Item "target-help" Print (on the standard output) a description of target specific command line options for each tool. --- 785,791 ---- they accept. If the \fB\-W\fR option is also specified then command line options which have no documentation associated with them will also be displayed. ! .IP "\fB\*(--target-help\fR" 4 .IX Item "target-help" Print (on the standard output) a description of target specific command line options for each tool. *************** languages; or options that are meaningfu *** 816,822 **** .IX Subsection "Options Controlling C Dialect" The following options control the dialect of C (or languages derived from C, such as \*(C+ and Objective C) that the compiler accepts: ! .Ip "\fB\-ansi\fR" 4 .IX Item "-ansi" In C mode, support all \s-1ISO\s0 C89 programs. In \*(C+ mode, remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+. --- 815,821 ---- .IX Subsection "Options Controlling C Dialect" The following options control the dialect of C (or languages derived from C, such as \*(C+ and Objective C) that the compiler accepts: ! .IP "\fB\-ansi\fR" 4 .IX Item "-ansi" In C mode, support all \s-1ISO\s0 C89 programs. In \*(C+ mode, remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+. *************** programs that might use these names for *** 851,892 **** Functions which would normally be built in but do not have semantics defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in functions with \fB\-ansi\fR is used. ! .Ip "\fB\-std=\fR" 4 .IX Item "-std=" Determine the language standard. This option is currently only supported when compiling C. A value for this option must be provided; possible values are .RS 4 ! .Ip "\fBc89\fR" 4 .IX Item "c89" .PD 0 ! .Ip "\fBiso9899:1990\fR" 4 .IX Item "iso9899:1990" .PD \&\s-1ISO\s0 C89 (same as \fB\-ansi\fR). ! .Ip "\fBiso9899:199409\fR" 4 .IX Item "iso9899:199409" \&\s-1ISO\s0 C89 as modified in amendment 1. ! .Ip "\fBc99\fR" 4 .IX Item "c99" .PD 0 ! .Ip "\fBc9x\fR" 4 .IX Item "c9x" ! .Ip "\fBiso9899:1999\fR" 4 .IX Item "iso9899:1999" ! .Ip "\fBiso9899:199x\fR" 4 .IX Item "iso9899:199x" .PD \&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see <\fBhttp://gcc.gnu.org/c99status.html\fR> for more information. The names \fBc9x\fR and \fBiso9899:199x\fR are deprecated. ! .Ip "\fBgnu89\fR" 4 .IX Item "gnu89" Default, \s-1ISO\s0 C89 plus \s-1GNU\s0 extensions (including some C99 features). ! .Ip "\fBgnu99\fR" 4 .IX Item "gnu99" .PD 0 ! .Ip "\fBgnu9x\fR" 4 .IX Item "gnu9x" .PD \&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0, --- 850,891 ---- Functions which would normally be built in but do not have semantics defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in functions with \fB\-ansi\fR is used. ! .IP "\fB\-std=\fR" 4 .IX Item "-std=" Determine the language standard. This option is currently only supported when compiling C. A value for this option must be provided; possible values are .RS 4 ! .IP "\fBc89\fR" 4 .IX Item "c89" .PD 0 ! .IP "\fBiso9899:1990\fR" 4 .IX Item "iso9899:1990" .PD \&\s-1ISO\s0 C89 (same as \fB\-ansi\fR). ! .IP "\fBiso9899:199409\fR" 4 .IX Item "iso9899:199409" \&\s-1ISO\s0 C89 as modified in amendment 1. ! .IP "\fBc99\fR" 4 .IX Item "c99" .PD 0 ! .IP "\fBc9x\fR" 4 .IX Item "c9x" ! .IP "\fBiso9899:1999\fR" 4 .IX Item "iso9899:1999" ! .IP "\fBiso9899:199x\fR" 4 .IX Item "iso9899:199x" .PD \&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see <\fBhttp://gcc.gnu.org/c99status.html\fR> for more information. The names \fBc9x\fR and \fBiso9899:199x\fR are deprecated. ! .IP "\fBgnu89\fR" 4 .IX Item "gnu89" Default, \s-1ISO\s0 C89 plus \s-1GNU\s0 extensions (including some C99 features). ! .IP "\fBgnu99\fR" 4 .IX Item "gnu99" .PD 0 ! .IP "\fBgnu9x\fR" 4 .IX Item "gnu9x" .PD \&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0, *************** effects as \fB\-ansi\fR, except that fea *** 904,910 **** but are in the specified version (for example, \fB//\fR comments and the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled. .RE ! .Ip "\fB\-aux-info\fR \fIfilename\fR" 4 .IX Item "-aux-info filename" Output to the given filename prototyped declarations for all functions declared and/or defined in a translation unit, including those in header --- 903,909 ---- but are in the specified version (for example, \fB//\fR comments and the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled. .RE ! .IP "\fB\-aux-info\fR \fIfilename\fR" 4 .IX Item "-aux-info filename" Output to the given filename prototyped declarations for all functions declared and/or defined in a translation unit, including those in header *************** definition (\fBC\fR or \fBF\fR, respecti *** 919,925 **** character). In the case of function definitions, a K&R-style list of arguments followed by their declarations is also provided, inside comments, after the declaration. ! .Ip "\fB\-fno-asm\fR" 4 .IX Item "-fno-asm" Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use these words as identifiers. You can use --- 918,924 ---- character). In the case of function definitions, a K&R-style list of arguments followed by their declarations is also provided, inside comments, after the declaration. ! .IP "\fB\-fno-asm\fR" 4 .IX Item "-fno-asm" Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use these words as identifiers. You can use *************** use the \fB\-fno-gnu-keywords\fR flag in *** 932,938 **** effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99. ! .Ip "\fB\-fno-builtin\fR" 4 .IX Item "-fno-builtin" Don't recognize built-in functions that do not begin with \&\fB_\|_builtin_\fR as prefix. --- 931,937 ---- effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99. ! .IP "\fB\-fno-builtin\fR" 4 .IX Item "-fno-builtin" Don't recognize built-in functions that do not begin with \&\fB_\|_builtin_\fR as prefix. *************** optimization benefits of built-in functi *** 951,1008 **** using the \fB_\|_builtin_\fR prefix. The \s-1GNU\s0 \*(C+ Standard Library uses built-in functions to implement many functions (like \&\f(CW\*(C`std::strchr\*(C'\fR), so that you automatically get efficient code. ! .Ip "\fB\-fhosted\fR" 4 .IX Item "-fhosted" Assert that compilation takes place in a hosted environment. This implies \&\fB\-fbuiltin\fR. A hosted environment is one in which the entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel. This is equivalent to \fB\-fno-freestanding\fR. ! .Ip "\fB\-ffreestanding\fR" 4 .IX Item "-ffreestanding" Assert that compilation takes place in a freestanding environment. This implies \fB\-fno-builtin\fR. A freestanding environment is one in which the standard library may not exist, and program startup may not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel. This is equivalent to \fB\-fno-hosted\fR. ! .Ip "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR. ! .Ip "\fB\-traditional\fR" 4 .IX Item "-traditional" Attempt to support some aspects of traditional C compilers. Specifically: .RS 4 ! .Ip "\(bu" 4 All \f(CW\*(C`extern\*(C'\fR declarations take effect globally even if they are written inside of a function definition. This includes implicit declarations of functions. ! .Ip "\(bu" 4 The newer keywords \f(CW\*(C`typeof\*(C'\fR, \f(CW\*(C`inline\*(C'\fR, \f(CW\*(C`signed\*(C'\fR, \f(CW\*(C`const\*(C'\fR and \f(CW\*(C`volatile\*(C'\fR are not recognized. (You can still use the alternative keywords such as \f(CW\*(C`_\|_typeof_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR, and so on.) ! .Ip "\(bu" 4 Comparisons between pointers and integers are always allowed. ! .Ip "\(bu" 4 Integer types \f(CW\*(C`unsigned short\*(C'\fR and \f(CW\*(C`unsigned char\*(C'\fR promote to \f(CW\*(C`unsigned int\*(C'\fR. ! .Ip "\(bu" 4 Out-of-range floating point literals are not an error. ! .Ip "\(bu" 4 Certain constructs which \s-1ISO\s0 regards as a single invalid preprocessing number, such as \fB0xe-0xd\fR, are treated as expressions instead. ! .Ip "\(bu" 4 String ``constants'' are not necessarily constant; they are stored in writable space, and identical looking constants are allocated separately. (This is the same as the effect of \&\fB\-fwritable-strings\fR.) ! .Ip "\(bu" 4 All automatic variables not declared \f(CW\*(C`register\*(C'\fR are preserved by \&\f(CW\*(C`longjmp\*(C'\fR. Ordinarily, \s-1GNU\s0 C follows \s-1ISO\s0 C: automatic variables not declared \f(CW\*(C`volatile\*(C'\fR may be clobbered. ! .Ip "\(bu" 4 The character escape sequences \fB\ex\fR and \fB\ea\fR evaluate as the literal characters \fBx\fR and \fBa\fR respectively. Without \&\fB\-traditional\fR, \fB\ex\fR is a prefix for the hexadecimal --- 950,1007 ---- using the \fB_\|_builtin_\fR prefix. The \s-1GNU\s0 \*(C+ Standard Library uses built-in functions to implement many functions (like \&\f(CW\*(C`std::strchr\*(C'\fR), so that you automatically get efficient code. ! .IP "\fB\-fhosted\fR" 4 .IX Item "-fhosted" Assert that compilation takes place in a hosted environment. This implies \&\fB\-fbuiltin\fR. A hosted environment is one in which the entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel. This is equivalent to \fB\-fno-freestanding\fR. ! .IP "\fB\-ffreestanding\fR" 4 .IX Item "-ffreestanding" Assert that compilation takes place in a freestanding environment. This implies \fB\-fno-builtin\fR. A freestanding environment is one in which the standard library may not exist, and program startup may not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel. This is equivalent to \fB\-fno-hosted\fR. ! .IP "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR. ! .IP "\fB\-traditional\fR" 4 .IX Item "-traditional" Attempt to support some aspects of traditional C compilers. Specifically: .RS 4 ! .IP "\(bu" 4 All \f(CW\*(C`extern\*(C'\fR declarations take effect globally even if they are written inside of a function definition. This includes implicit declarations of functions. ! .IP "\(bu" 4 The newer keywords \f(CW\*(C`typeof\*(C'\fR, \f(CW\*(C`inline\*(C'\fR, \f(CW\*(C`signed\*(C'\fR, \f(CW\*(C`const\*(C'\fR and \f(CW\*(C`volatile\*(C'\fR are not recognized. (You can still use the alternative keywords such as \f(CW\*(C`_\|_typeof_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR, and so on.) ! .IP "\(bu" 4 Comparisons between pointers and integers are always allowed. ! .IP "\(bu" 4 Integer types \f(CW\*(C`unsigned short\*(C'\fR and \f(CW\*(C`unsigned char\*(C'\fR promote to \f(CW\*(C`unsigned int\*(C'\fR. ! .IP "\(bu" 4 Out-of-range floating point literals are not an error. ! .IP "\(bu" 4 Certain constructs which \s-1ISO\s0 regards as a single invalid preprocessing number, such as \fB0xe-0xd\fR, are treated as expressions instead. ! .IP "\(bu" 4 String ``constants'' are not necessarily constant; they are stored in writable space, and identical looking constants are allocated separately. (This is the same as the effect of \&\fB\-fwritable-strings\fR.) ! .IP "\(bu" 4 All automatic variables not declared \f(CW\*(C`register\*(C'\fR are preserved by \&\f(CW\*(C`longjmp\*(C'\fR. Ordinarily, \s-1GNU\s0 C follows \s-1ISO\s0 C: automatic variables not declared \f(CW\*(C`volatile\*(C'\fR may be clobbered. ! .IP "\(bu" 4 The character escape sequences \fB\ex\fR and \fB\ea\fR evaluate as the literal characters \fBx\fR and \fBa\fR respectively. Without \&\fB\-traditional\fR, \fB\ex\fR is a prefix for the hexadecimal *************** systems to compile files that include an *** 1022,1044 **** The \fB\-traditional\fR option also enables \fB\-traditional-cpp\fR, which is described next. .RE ! .Ip "\fB\-traditional-cpp\fR" 4 .IX Item "-traditional-cpp" Attempt to support some aspects of traditional C preprocessors. Specifically: .RS 4 ! .Ip "\(bu" 4 Comments convert to nothing at all, rather than to a space. This allows traditional token concatenation. ! .Ip "\(bu" 4 In a preprocessing directive, the \fB#\fR symbol must appear as the first character of a line. ! .Ip "\(bu" 4 Macro arguments are recognized within string constants in a macro definition (and their values are stringified, though without additional quote marks, when they appear in such a context). The preprocessor always considers a string constant to end at a newline. ! .Ip "\(bu" 4 The predefined macro \f(CW\*(C`_\|_STDC_\|_\*(C'\fR is not defined when you use \&\fB\-traditional\fR, but \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR is (since the \s-1GNU\s0 extensions which \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR indicates are not affected by --- 1021,1043 ---- The \fB\-traditional\fR option also enables \fB\-traditional-cpp\fR, which is described next. .RE ! .IP "\fB\-traditional-cpp\fR" 4 .IX Item "-traditional-cpp" Attempt to support some aspects of traditional C preprocessors. Specifically: .RS 4 ! .IP "\(bu" 4 Comments convert to nothing at all, rather than to a space. This allows traditional token concatenation. ! .IP "\(bu" 4 In a preprocessing directive, the \fB#\fR symbol must appear as the first character of a line. ! .IP "\(bu" 4 Macro arguments are recognized within string constants in a macro definition (and their values are stringified, though without additional quote marks, when they appear in such a context). The preprocessor always considers a string constant to end at a newline. ! .IP "\(bu" 4 The predefined macro \f(CW\*(C`_\|_STDC_\|_\*(C'\fR is not defined when you use \&\fB\-traditional\fR, but \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR is (since the \s-1GNU\s0 extensions which \f(CW\*(C`_\|_GNUC_\|_\*(C'\fR indicates are not affected by *************** testing both of these predefined macros *** 1048,1066 **** situations: \s-1GNU\s0 C, traditional \s-1GNU\s0 C, other \s-1ISO\s0 C compilers, and other old C compilers. The predefined macro \f(CW\*(C`_\|_STDC_VERSION_\|_\*(C'\fR is also not defined when you use \fB\-traditional\fR. ! .Ip "\(bu" 4 The preprocessor considers a string constant to end at a newline (unless the newline is escaped with \fB\e\fR). (Without \fB\-traditional\fR, string constants can contain the newline character as typed.) .RE .RS 4 .RE ! .Ip "\fB\-fcond-mismatch\fR" 4 .IX Item "-fcond-mismatch" Allow conditional expressions with mismatched types in the second and third arguments. The value of such an expression is void. This option is not supported for \*(C+. ! .Ip "\fB\-funsigned-char\fR" 4 .IX Item "-funsigned-char" Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR. .Sp --- 1047,1065 ---- situations: \s-1GNU\s0 C, traditional \s-1GNU\s0 C, other \s-1ISO\s0 C compilers, and other old C compilers. The predefined macro \f(CW\*(C`_\|_STDC_VERSION_\|_\*(C'\fR is also not defined when you use \fB\-traditional\fR. ! .IP "\(bu" 4 The preprocessor considers a string constant to end at a newline (unless the newline is escaped with \fB\e\fR). (Without \fB\-traditional\fR, string constants can contain the newline character as typed.) .RE .RS 4 .RE ! .IP "\fB\-fcond-mismatch\fR" 4 .IX Item "-fcond-mismatch" Allow conditional expressions with mismatched types in the second and third arguments. The value of such an expression is void. This option is not supported for \*(C+. ! .IP "\fB\-funsigned-char\fR" 4 .IX Item "-funsigned-char" Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR. .Sp *************** make such a program work with the opposi *** 1078,1098 **** The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior is always just like one of those two. ! .Ip "\fB\-fsigned-char\fR" 4 .IX Item "-fsigned-char" Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR. .Sp Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is the negative form of \fB\-funsigned-char\fR. Likewise, the option \&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR. ! .Ip "\fB\-fsigned-bitfields\fR" 4 .IX Item "-fsigned-bitfields" .PD 0 ! .Ip "\fB\-funsigned-bitfields\fR" 4 .IX Item "-funsigned-bitfields" ! .Ip "\fB\-fno-signed-bitfields\fR" 4 .IX Item "-fno-signed-bitfields" ! .Ip "\fB\-fno-unsigned-bitfields\fR" 4 .IX Item "-fno-unsigned-bitfields" .PD These options control whether a bit-field is signed or unsigned, when the --- 1077,1097 ---- The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior is always just like one of those two. ! .IP "\fB\-fsigned-char\fR" 4 .IX Item "-fsigned-char" Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR. .Sp Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is the negative form of \fB\-funsigned-char\fR. Likewise, the option \&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR. ! .IP "\fB\-fsigned-bitfields\fR" 4 .IX Item "-fsigned-bitfields" .PD 0 ! .IP "\fB\-funsigned-bitfields\fR" 4 .IX Item "-funsigned-bitfields" ! .IP "\fB\-fno-signed-bitfields\fR" 4 .IX Item "-fno-signed-bitfields" ! .IP "\fB\-fno-unsigned-bitfields\fR" 4 .IX Item "-fno-unsigned-bitfields" .PD These options control whether a bit-field is signed or unsigned, when the *************** basic integer types such as \f(CW\*(C`in *** 1102,1108 **** .Sp However, when \fB\-traditional\fR is used, bit-fields are all unsigned no matter what. ! .Ip "\fB\-fwritable-strings\fR" 4 .IX Item "-fwritable-strings" Store string constants in the writable data segment and don't uniquize them. This is for compatibility with old programs which assume they can --- 1101,1107 ---- .Sp However, when \fB\-traditional\fR is used, bit-fields are all unsigned no matter what. ! .IP "\fB\-fwritable-strings\fR" 4 .IX Item "-fwritable-strings" Store string constants in the writable data segment and don't uniquize them. This is for compatibility with old programs which assume they can *************** this effect. *** 1111,1117 **** .Sp Writing into string constants is a very bad idea; ``constants'' should be constant. ! .Ip "\fB\-fallow-single-precision\fR" 4 .IX Item "-fallow-single-precision" Do not promote single precision math operations to double precision, even when compiling with \fB\-traditional\fR. --- 1110,1116 ---- .Sp Writing into string constants is a very bad idea; ``constants'' should be constant. ! .IP "\fB\-fallow-single-precision\fR" 4 .IX Item "-fallow-single-precision" Do not promote single precision math operations to double precision, even when compiling with \fB\-traditional\fR. *************** than double precision. If you must use *** 1123,1129 **** to use single precision operations when the operands are single precision, use this option. This option has no effect when compiling with \s-1ISO\s0 or \s-1GNU\s0 C conventions (the default). ! .Ip "\fB\-fshort-wchar\fR" 4 .IX Item "-fshort-wchar" Override the underlying type for \fBwchar_t\fR to be \fBshort unsigned int\fR instead of the default for the target. This option is --- 1122,1128 ---- to use single precision operations when the operands are single precision, use this option. This option has no effect when compiling with \s-1ISO\s0 or \s-1GNU\s0 C conventions (the default). ! .IP "\fB\-fshort-wchar\fR" 4 .IX Item "-fshort-wchar" Override the underlying type for \fBwchar_t\fR to be \fBshort unsigned int\fR instead of the default for the target. This option is *************** only for \*(C+ programs; you can use the *** 1143,1153 **** language supported by \s-1GCC\s0. .PP Here is a list of options that are \fIonly\fR for compiling \*(C+ programs: ! .Ip "\fB\-fno-access-control\fR" 4 .IX Item "-fno-access-control" Turn off all access checking. This switch is mainly useful for working around bugs in the access control code. ! .Ip "\fB\-fcheck-new\fR" 4 .IX Item "-fcheck-new" Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null before attempting to modify the storage allocated. The current Working --- 1142,1152 ---- language supported by \s-1GCC\s0. .PP Here is a list of options that are \fIonly\fR for compiling \*(C+ programs: ! .IP "\fB\-fno-access-control\fR" 4 .IX Item "-fno-access-control" Turn off all access checking. This switch is mainly useful for working around bugs in the access control code. ! .IP "\fB\-fcheck-new\fR" 4 .IX Item "-fcheck-new" Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null before attempting to modify the storage allocated. The current Working *************** An alternative to using this option is t *** 1158,1164 **** \&\f(CW\*(C`operator new\*(C'\fR does not throw any exceptions; if you declare it \&\fB\f(BIthrow()\fB\fR, G++ will check the return value. See also \fBnew (nothrow)\fR. ! .Ip "\fB\-fconserve-space\fR" 4 .IX Item "-fconserve-space" Put uninitialized or runtime-initialized global variables into the common segment, as C does. This saves space in the executable at the --- 1157,1163 ---- \&\f(CW\*(C`operator new\*(C'\fR does not throw any exceptions; if you declare it \&\fB\f(BIthrow()\fB\fR, G++ will check the return value. See also \fBnew (nothrow)\fR. ! .IP "\fB\-fconserve-space\fR" 4 .IX Item "-fconserve-space" Put uninitialized or runtime-initialized global variables into the common segment, as C does. This saves space in the executable at the *************** two definitions were merged. *** 1169,1175 **** .Sp This option is no longer useful on most targets, now that support has been added for putting variables into \s-1BSS\s0 without making them common. ! .Ip "\fB\-fno-const-strings\fR" 4 .IX Item "-fno-const-strings" Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const char *\*(C'\fR. By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by --- 1168,1174 ---- .Sp This option is no longer useful on most targets, now that support has been added for putting variables into \s-1BSS\s0 without making them common. ! .IP "\fB\-fno-const-strings\fR" 4 .IX Item "-fno-const-strings" Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const char *\*(C'\fR. By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by *************** actually modify the value of a string co *** 1180,1221 **** This option might be removed in a future release of G++. For maximum portability, you should structure your code so that it works with string constants that have type \f(CW\*(C`const char *\*(C'\fR. ! .Ip "\fB\-fdollars-in-identifiers\fR" 4 .IX Item "-fdollars-in-identifiers" Accept \fB$\fR in identifiers. You can also explicitly prohibit use of \&\fB$\fR with the option \fB\-fno-dollars-in-identifiers\fR. (\s-1GNU\s0 C allows \&\fB$\fR by default on most target systems, but there are a few exceptions.) Traditional C allowed the character \fB$\fR to form part of identifiers. However, \s-1ISO\s0 C and \*(C+ forbid \fB$\fR in identifiers. ! .Ip "\fB\-fno-elide-constructors\fR" 4 .IX Item "-fno-elide-constructors" The \*(C+ standard allows an implementation to omit creating a temporary which is only used to initialize another object of the same type. Specifying this option disables that optimization, and forces G++ to call the copy constructor in all cases. ! .Ip "\fB\-fno-enforce-eh-specs\fR" 4 .IX Item "-fno-enforce-eh-specs" Don't check for violation of exception specifications at runtime. This option violates the \*(C+ standard, but may be useful for reducing code size in production builds, much like defining \fB\s-1NDEBUG\s0\fR. The compiler will still optimize based on the exception specifications. ! .Ip "\fB\-fexternal-templates\fR" 4 .IX Item "-fexternal-templates" Cause template instantiations to obey \fB#pragma interface\fR and \&\fBimplementation\fR; template instances are emitted or not according to the location of the template definition. .Sp This option is deprecated. ! .Ip "\fB\-falt-external-templates\fR" 4 .IX Item "-falt-external-templates" Similar to \fB\-fexternal-templates\fR, but template instances are emitted or not according to the place where they are first instantiated. .Sp This option is deprecated. ! .Ip "\fB\-ffor-scope\fR" 4 .IX Item "-ffor-scope" .PD 0 ! .Ip "\fB\-fno-for-scope\fR" 4 .IX Item "-fno-for-scope" .PD If \fB\-ffor-scope\fR is specified, the scope of variables declared in --- 1179,1220 ---- This option might be removed in a future release of G++. For maximum portability, you should structure your code so that it works with string constants that have type \f(CW\*(C`const char *\*(C'\fR. ! .IP "\fB\-fdollars-in-identifiers\fR" 4 .IX Item "-fdollars-in-identifiers" Accept \fB$\fR in identifiers. You can also explicitly prohibit use of \&\fB$\fR with the option \fB\-fno-dollars-in-identifiers\fR. (\s-1GNU\s0 C allows \&\fB$\fR by default on most target systems, but there are a few exceptions.) Traditional C allowed the character \fB$\fR to form part of identifiers. However, \s-1ISO\s0 C and \*(C+ forbid \fB$\fR in identifiers. ! .IP "\fB\-fno-elide-constructors\fR" 4 .IX Item "-fno-elide-constructors" The \*(C+ standard allows an implementation to omit creating a temporary which is only used to initialize another object of the same type. Specifying this option disables that optimization, and forces G++ to call the copy constructor in all cases. ! .IP "\fB\-fno-enforce-eh-specs\fR" 4 .IX Item "-fno-enforce-eh-specs" Don't check for violation of exception specifications at runtime. This option violates the \*(C+ standard, but may be useful for reducing code size in production builds, much like defining \fB\s-1NDEBUG\s0\fR. The compiler will still optimize based on the exception specifications. ! .IP "\fB\-fexternal-templates\fR" 4 .IX Item "-fexternal-templates" Cause template instantiations to obey \fB#pragma interface\fR and \&\fBimplementation\fR; template instances are emitted or not according to the location of the template definition. .Sp This option is deprecated. ! .IP "\fB\-falt-external-templates\fR" 4 .IX Item "-falt-external-templates" Similar to \fB\-fexternal-templates\fR, but template instances are emitted or not according to the place where they are first instantiated. .Sp This option is deprecated. ! .IP "\fB\-ffor-scope\fR" 4 .IX Item "-ffor-scope" .PD 0 ! .IP "\fB\-fno-for-scope\fR" 4 .IX Item "-fno-for-scope" .PD If \fB\-ffor-scope\fR is specified, the scope of variables declared in *************** implementations of \*(C+. *** 1229,1295 **** The default if neither flag is given to follow the standard, but to allow and give a warning for old-style code that would otherwise be invalid, or have different behavior. ! .Ip "\fB\-fno-gnu-keywords\fR" 4 .IX Item "-fno-gnu-keywords" Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead. \&\fB\-ansi\fR implies \fB\-fno-gnu-keywords\fR. ! .Ip "\fB\-fno-honor-std\fR" 4 ! .IX Item "-fno-honor-std" ! Ignore \f(CW\*(C`namespace std\*(C'\fR, instead of treating it as a real namespace. ! With this switch, the compiler will ignore ! \&\f(CW\*(C`namespace\-declarations\*(C'\fR, \f(CW\*(C`using\-declarations\*(C'\fR, ! \&\f(CW\*(C`using\-directives\*(C'\fR, and \f(CW\*(C`namespace\-names\*(C'\fR, if they involve ! \&\f(CW\*(C`std\*(C'\fR. ! .Sp ! This option is only useful if you have manually compiled the \*(C+ ! run-time library with the same switch. Otherwise, your programs will ! not link. The use of this option is not recommended, and the option may ! be removed from a future version of G++. ! .Ip "\fB\-fno-implicit-templates\fR" 4 .IX Item "-fno-implicit-templates" Never emit code for non-inline templates which are instantiated implicitly (i.e. by use); only emit code for explicit instantiations. ! .Ip "\fB\-fno-implicit-inline-templates\fR" 4 .IX Item "-fno-implicit-inline-templates" Don't emit code for implicit instantiations of inline templates, either. The default is to handle inlines differently so that compiles with and without optimization will need the same set of explicit instantiations. ! .Ip "\fB\-fno-implement-inlines\fR" 4 .IX Item "-fno-implement-inlines" To save space, do not emit out-of-line copies of inline functions controlled by \fB#pragma implementation\fR. This will cause linker errors if these functions are not inlined everywhere they are called. ! .Ip "\fB\-fms-extensions\fR" 4 .IX Item "-fms-extensions" Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit int and getting a pointer to member function via non-standard syntax. ! .Ip "\fB\-fno-nonansi-builtins\fR" 4 .IX Item "-fno-nonansi-builtins" Disable built-in declarations of functions that are not mandated by \&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR, \&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions. ! .Ip "\fB\-fno-operator-names\fR" 4 .IX Item "-fno-operator-names" Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR, \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as synonyms as keywords. ! .Ip "\fB\-fno-optional-diags\fR" 4 .IX Item "-fno-optional-diags" Disable diagnostics that the standard says a compiler does not need to issue. Currently, the only such diagnostic issued by G++ is the one for a name having multiple meanings within a class. ! .Ip "\fB\-fpermissive\fR" 4 .IX Item "-fpermissive" Downgrade messages about nonconformant code from errors to warnings. By default, G++ effectively sets \fB\-pedantic-errors\fR without \&\fB\-pedantic\fR; this option reverses that. This behavior and this option are superseded by \fB\-pedantic\fR, which works as it does for \s-1GNU\s0 C. ! .Ip "\fB\-frepo\fR" 4 .IX Item "-frepo" Enable automatic template instantiation. This option also implies \&\fB\-fno-implicit-templates\fR. ! .Ip "\fB\-fno-rtti\fR" 4 .IX Item "-fno-rtti" Disable generation of information about every class with virtual functions for use by the \*(C+ runtime type identification features --- 1228,1282 ---- The default if neither flag is given to follow the standard, but to allow and give a warning for old-style code that would otherwise be invalid, or have different behavior. ! .IP "\fB\-fno-gnu-keywords\fR" 4 .IX Item "-fno-gnu-keywords" Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead. \&\fB\-ansi\fR implies \fB\-fno-gnu-keywords\fR. ! .IP "\fB\-fno-implicit-templates\fR" 4 .IX Item "-fno-implicit-templates" Never emit code for non-inline templates which are instantiated implicitly (i.e. by use); only emit code for explicit instantiations. ! .IP "\fB\-fno-implicit-inline-templates\fR" 4 .IX Item "-fno-implicit-inline-templates" Don't emit code for implicit instantiations of inline templates, either. The default is to handle inlines differently so that compiles with and without optimization will need the same set of explicit instantiations. ! .IP "\fB\-fno-implement-inlines\fR" 4 .IX Item "-fno-implement-inlines" To save space, do not emit out-of-line copies of inline functions controlled by \fB#pragma implementation\fR. This will cause linker errors if these functions are not inlined everywhere they are called. ! .IP "\fB\-fms-extensions\fR" 4 .IX Item "-fms-extensions" Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit int and getting a pointer to member function via non-standard syntax. ! .IP "\fB\-fno-nonansi-builtins\fR" 4 .IX Item "-fno-nonansi-builtins" Disable built-in declarations of functions that are not mandated by \&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR, \&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions. ! .IP "\fB\-fno-operator-names\fR" 4 .IX Item "-fno-operator-names" Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR, \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as synonyms as keywords. ! .IP "\fB\-fno-optional-diags\fR" 4 .IX Item "-fno-optional-diags" Disable diagnostics that the standard says a compiler does not need to issue. Currently, the only such diagnostic issued by G++ is the one for a name having multiple meanings within a class. ! .IP "\fB\-fpermissive\fR" 4 .IX Item "-fpermissive" Downgrade messages about nonconformant code from errors to warnings. By default, G++ effectively sets \fB\-pedantic-errors\fR without \&\fB\-pedantic\fR; this option reverses that. This behavior and this option are superseded by \fB\-pedantic\fR, which works as it does for \s-1GNU\s0 C. ! .IP "\fB\-frepo\fR" 4 .IX Item "-frepo" Enable automatic template instantiation. This option also implies \&\fB\-fno-implicit-templates\fR. ! .IP "\fB\-fno-rtti\fR" 4 .IX Item "-fno-rtti" Disable generation of information about every class with virtual functions for use by the \*(C+ runtime type identification features *************** functions for use by the \*(C+ runtime t *** 1297,1327 **** of the language, you can save some space by using this flag. Note that exception handling uses the same information, but it will generate it as needed. ! .Ip "\fB\-fstats\fR" 4 .IX Item "-fstats" Emit statistics about front-end processing at the end of the compilation. This information is generally only useful to the G++ development team. ! .Ip "\fB\-ftemplate-depth-\fR\fIn\fR" 4 .IX Item "-ftemplate-depth-n" Set the maximum instantiation depth for template classes to \fIn\fR. A limit on the template instantiation depth is needed to detect endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+ conforming programs must not rely on a maximum depth greater than 17. ! .Ip "\fB\-fuse-cxa-atexit\fR" 4 .IX Item "-fuse-cxa-atexit" Register destructors for objects with static storage duration with the \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function. This option is required for fully standards-compliant handling of static destructors, but will only work if your C library supports \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR. ! .Ip "\fB\-fno-weak\fR" 4 .IX Item "-fno-weak" Do not use weak symbol support, even if it is provided by the linker. By default, G++ will use weak symbols if they are available. This option exists only for testing, and should not be used by end-users; it will result in inferior code and has no benefits. This option may be removed in a future release of G++. ! .Ip "\fB\-nostdinc++\fR" 4 .IX Item "-nostdinc++" Do not search for header files in the standard directories specific to \&\*(C+, but do still search the other standard directories. (This option --- 1284,1314 ---- of the language, you can save some space by using this flag. Note that exception handling uses the same information, but it will generate it as needed. ! .IP "\fB\-fstats\fR" 4 .IX Item "-fstats" Emit statistics about front-end processing at the end of the compilation. This information is generally only useful to the G++ development team. ! .IP "\fB\-ftemplate-depth-\fR\fIn\fR" 4 .IX Item "-ftemplate-depth-n" Set the maximum instantiation depth for template classes to \fIn\fR. A limit on the template instantiation depth is needed to detect endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+ conforming programs must not rely on a maximum depth greater than 17. ! .IP "\fB\-fuse-cxa-atexit\fR" 4 .IX Item "-fuse-cxa-atexit" Register destructors for objects with static storage duration with the \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function. This option is required for fully standards-compliant handling of static destructors, but will only work if your C library supports \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR. ! .IP "\fB\-fno-weak\fR" 4 .IX Item "-fno-weak" Do not use weak symbol support, even if it is provided by the linker. By default, G++ will use weak symbols if they are available. This option exists only for testing, and should not be used by end-users; it will result in inferior code and has no benefits. This option may be removed in a future release of G++. ! .IP "\fB\-nostdinc++\fR" 4 .IX Item "-nostdinc++" Do not search for header files in the standard directories specific to \&\*(C+, but do still search the other standard directories. (This option *************** is used when building the \*(C+ library. *** 1329,1350 **** .PP In addition, these optimization, warning, and code generation options have meanings only for \*(C+ programs: ! .Ip "\fB\-fno-default-inline\fR" 4 .IX Item "-fno-default-inline" Do not assume \fBinline\fR for functions defined inside a class scope. Note that these functions will have linkage like inline functions; they just won't be inlined by default. ! .Ip "\fB\-Wctor-dtor-privacy\fR (\*(C+ only)" 4 .IX Item "-Wctor-dtor-privacy ( only)" Warn when a class seems unusable, because all the constructors or destructors in a class are private and the class has no friends or public static member functions. ! .Ip "\fB\-Wnon-virtual-dtor\fR (\*(C+ only)" 4 .IX Item "-Wnon-virtual-dtor ( only)" Warn when a class declares a non-virtual destructor that should probably be virtual, because it looks like the class will be used polymorphically. ! .Ip "\fB\-Wreorder\fR (\*(C+ only)" 4 .IX Item "-Wreorder ( only)" Warn when the order of member initializers given in the code does not match the order in which they must be executed. For instance: --- 1316,1337 ---- .PP In addition, these optimization, warning, and code generation options have meanings only for \*(C+ programs: ! .IP "\fB\-fno-default-inline\fR" 4 .IX Item "-fno-default-inline" Do not assume \fBinline\fR for functions defined inside a class scope. Note that these functions will have linkage like inline functions; they just won't be inlined by default. ! .IP "\fB\-Wctor-dtor-privacy\fR (\*(C+ only)" 4 .IX Item "-Wctor-dtor-privacy ( only)" Warn when a class seems unusable, because all the constructors or destructors in a class are private and the class has no friends or public static member functions. ! .IP "\fB\-Wnon-virtual-dtor\fR (\*(C+ only)" 4 .IX Item "-Wnon-virtual-dtor ( only)" Warn when a class declares a non-virtual destructor that should probably be virtual, because it looks like the class will be used polymorphically. ! .IP "\fB\-Wreorder\fR (\*(C+ only)" 4 .IX Item "-Wreorder ( only)" Warn when the order of member initializers given in the code does not match the order in which they must be executed. For instance: *************** and \fBj\fR will be rearranged to match *** 1361,1376 **** members. .PP The following \fB\-W...\fR options are not affected by \fB\-Wall\fR. ! .Ip "\fB\-Weffc++\fR (\*(C+ only)" 4 .IX Item "-Weffc++ ( only)" Warn about violations of various style guidelines from Scott Meyers' \&\fIEffective \*(C+\fR books. If you use this option, you should be aware that the standard library headers do not obey all of these guidelines; you can use \fBgrep \-v\fR to filter out those warnings. ! .Ip "\fB\-Wno-deprecated\fR (\*(C+ only)" 4 .IX Item "-Wno-deprecated ( only)" Do not warn about usage of deprecated features. ! .Ip "\fB\-Wno-non-template-friend\fR (\*(C+ only)" 4 .IX Item "-Wno-non-template-friend ( only)" Disable warnings when non-templatized friend functions are declared within a template. With the advent of explicit template specification --- 1348,1363 ---- members. .PP The following \fB\-W...\fR options are not affected by \fB\-Wall\fR. ! .IP "\fB\-Weffc++\fR (\*(C+ only)" 4 .IX Item "-Weffc++ ( only)" Warn about violations of various style guidelines from Scott Meyers' \&\fIEffective \*(C+\fR books. If you use this option, you should be aware that the standard library headers do not obey all of these guidelines; you can use \fBgrep \-v\fR to filter out those warnings. ! .IP "\fB\-Wno-deprecated\fR (\*(C+ only)" 4 .IX Item "-Wno-deprecated ( only)" Do not warn about usage of deprecated features. ! .IP "\fB\-Wno-non-template-friend\fR (\*(C+ only)" 4 .IX Item "-Wno-non-template-friend ( only)" Disable warnings when non-templatized friend functions are declared within a template. With the advent of explicit template specification *************** check existing code for potential troubl *** 1385,1397 **** This new compiler behavior can be turned off with \&\fB\-Wno-non-template-friend\fR which keeps the conformant compiler code but disables the helpful warning. ! .Ip "\fB\-Wold-style-cast\fR (\*(C+ only)" 4 .IX Item "-Wold-style-cast ( only)" Warn if an old-style (C-style) cast is used within a \*(C+ program. The new-style casts (\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \&\fBconst_cast\fR) are less vulnerable to unintended effects, and much easier to grep for. ! .Ip "\fB\-Woverloaded-virtual\fR (\*(C+ only)" 4 .IX Item "-Woverloaded-virtual ( only)" Warn when a derived class function declaration may be an error in defining a virtual function. In a derived class, the --- 1372,1384 ---- This new compiler behavior can be turned off with \&\fB\-Wno-non-template-friend\fR which keeps the conformant compiler code but disables the helpful warning. ! .IP "\fB\-Wold-style-cast\fR (\*(C+ only)" 4 .IX Item "-Wold-style-cast ( only)" Warn if an old-style (C-style) cast is used within a \*(C+ program. The new-style casts (\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \&\fBconst_cast\fR) are less vulnerable to unintended effects, and much easier to grep for. ! .IP "\fB\-Woverloaded-virtual\fR (\*(C+ only)" 4 .IX Item "-Woverloaded-virtual ( only)" Warn when a derived class function declaration may be an error in defining a virtual function. In a derived class, the *************** virtual function declared in the base cl *** 1400,1416 **** compiler warns when you define a function with the same name as a virtual function, but with a type signature that does not match any declarations from the base class. ! .Ip "\fB\-Wno-pmf-conversions\fR (\*(C+ only)" 4 .IX Item "-Wno-pmf-conversions ( only)" Disable the diagnostic for converting a bound pointer to member function to a plain pointer. ! .Ip "\fB\-Wsign-promo\fR (\*(C+ only)" 4 .IX Item "-Wsign-promo ( only)" Warn when overload resolution chooses a promotion from unsigned or enumeral type to a signed type over a conversion to an unsigned type of the same size. Previous versions of G++ would try to preserve unsignedness, but the standard mandates the current behavior. ! .Ip "\fB\-Wsynth\fR (\*(C+ only)" 4 .IX Item "-Wsynth ( only)" Warn when G++'s synthesis behavior does not match that of cfront. For instance: --- 1387,1403 ---- compiler warns when you define a function with the same name as a virtual function, but with a type signature that does not match any declarations from the base class. ! .IP "\fB\-Wno-pmf-conversions\fR (\*(C+ only)" 4 .IX Item "-Wno-pmf-conversions ( only)" Disable the diagnostic for converting a bound pointer to member function to a plain pointer. ! .IP "\fB\-Wsign-promo\fR (\*(C+ only)" 4 .IX Item "-Wsign-promo ( only)" Warn when overload resolution chooses a promotion from unsigned or enumeral type to a signed type over a conversion to an unsigned type of the same size. Previous versions of G++ would try to preserve unsignedness, but the standard mandates the current behavior. ! .IP "\fB\-Wsynth\fR (\*(C+ only)" 4 .IX Item "-Wsynth ( only)" Warn when G++'s synthesis behavior does not match that of cfront. For instance: *************** supported by \s-1GCC\s0. *** 1446,1473 **** .PP Here is a list of options that are \fIonly\fR for compiling Objective-C programs: ! .Ip "\fB\-fconstant-string-class=\fR\fIclass-name\fR" 4 .IX Item "-fconstant-string-class=class-name" Use \fIclass-name\fR as the name of the class to instantiate for each literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default class name is \f(CW\*(C`NXConstantString\*(C'\fR. ! .Ip "\fB\-fgnu-runtime\fR" 4 .IX Item "-fgnu-runtime" Generate object code compatible with the standard \s-1GNU\s0 Objective-C runtime. This is the default for most types of systems. ! .Ip "\fB\-fnext-runtime\fR" 4 .IX Item "-fnext-runtime" Generate output compatible with the NeXT runtime. This is the default for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. ! .Ip "\fB\-gen-decls\fR" 4 .IX Item "-gen-decls" Dump interface declarations for all classes seen in the source file to a file named \fI\fIsourcename\fI.decl\fR. ! .Ip "\fB\-Wno-protocol\fR" 4 .IX Item "-Wno-protocol" Do not warn if methods required by a protocol are not implemented in the class adopting it. ! .Ip "\fB\-Wselector\fR" 4 .IX Item "-Wselector" Warn if a selector has multiple methods of different types defined. .Sh "Options to Control Diagnostic Messages Formatting" --- 1433,1460 ---- .PP Here is a list of options that are \fIonly\fR for compiling Objective-C programs: ! .IP "\fB\-fconstant-string-class=\fR\fIclass-name\fR" 4 .IX Item "-fconstant-string-class=class-name" Use \fIclass-name\fR as the name of the class to instantiate for each literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default class name is \f(CW\*(C`NXConstantString\*(C'\fR. ! .IP "\fB\-fgnu-runtime\fR" 4 .IX Item "-fgnu-runtime" Generate object code compatible with the standard \s-1GNU\s0 Objective-C runtime. This is the default for most types of systems. ! .IP "\fB\-fnext-runtime\fR" 4 .IX Item "-fnext-runtime" Generate output compatible with the NeXT runtime. This is the default for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. ! .IP "\fB\-gen-decls\fR" 4 .IX Item "-gen-decls" Dump interface declarations for all classes seen in the source file to a file named \fI\fIsourcename\fI.decl\fR. ! .IP "\fB\-Wno-protocol\fR" 4 .IX Item "-Wno-protocol" Do not warn if methods required by a protocol are not implemented in the class adopting it. ! .IP "\fB\-Wselector\fR" 4 .IX Item "-Wselector" Warn if a selector has multiple methods of different types defined. .Sh "Options to Control Diagnostic Messages Formatting" *************** algorithm, e.g. how many characters per *** 1479,1492 **** information should be reported. Right now, only the \*(C+ front end can honor these options. However it is expected, in the near future, that the remaining front ends would be able to digest them correctly. ! .Ip "\fB\-fmessage-length=\fR\fIn\fR" 4 .IX Item "-fmessage-length=n" Try to format error messages so that they fit on lines of about \fIn\fR characters. The default is 72 characters for \fBg++\fR and 0 for the rest of the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no line-wrapping will be done; each error message will appear on a single line. ! .Ip "\fB\-fdiagnostics-show-location=once\fR" 4 .IX Item "-fdiagnostics-show-location=once" Only meaningful in line-wrapping mode. Instructs the diagnostic messages reporter to emit \fIonce\fR source location information; that is, in --- 1466,1479 ---- information should be reported. Right now, only the \*(C+ front end can honor these options. However it is expected, in the near future, that the remaining front ends would be able to digest them correctly. ! .IP "\fB\-fmessage-length=\fR\fIn\fR" 4 .IX Item "-fmessage-length=n" Try to format error messages so that they fit on lines of about \fIn\fR characters. The default is 72 characters for \fBg++\fR and 0 for the rest of the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no line-wrapping will be done; each error message will appear on a single line. ! .IP "\fB\-fdiagnostics-show-location=once\fR" 4 .IX Item "-fdiagnostics-show-location=once" Only meaningful in line-wrapping mode. Instructs the diagnostic messages reporter to emit \fIonce\fR source location information; that is, in *************** case the message is too long to fit on a *** 1494,1504 **** be wrapped, the source location won't be emitted (as prefix) again, over and over, in subsequent continuation lines. This is the default behaviour. ! .Ip "\fB\-fdiagnostics-show-location=every-line\fR" 4 .IX Item "-fdiagnostics-show-location=every-line" Only meaningful in line-wrapping mode. Instructs the diagnostic messages reporter to emit the same source location information (as ! prefix) for physical lines that result from the process of breaking a a message which is too long to fit on a single line. .Sh "Options to Request or Suppress Warnings" .IX Subsection "Options to Request or Suppress Warnings" --- 1481,1491 ---- be wrapped, the source location won't be emitted (as prefix) again, over and over, in subsequent continuation lines. This is the default behaviour. ! .IP "\fB\-fdiagnostics-show-location=every-line\fR" 4 .IX Item "-fdiagnostics-show-location=every-line" Only meaningful in line-wrapping mode. Instructs the diagnostic messages reporter to emit the same source location information (as ! prefix) for physical lines that result from the process of breaking a message which is too long to fit on a single line. .Sh "Options to Request or Suppress Warnings" .IX Subsection "Options to Request or Suppress Warnings" *************** for example, \fB\-Wno-implicit\fR. This *** 1514,1523 **** two forms, whichever is not the default. .PP These options control the amount and kinds of warnings produced by \s-1GCC:\s0 ! .Ip "\fB\-fsyntax-only\fR" 4 .IX Item "-fsyntax-only" Check the code for syntax errors, but don't do anything beyond that. ! .Ip "\fB\-pedantic\fR" 4 .IX Item "-pedantic" Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+; reject all programs that use forbidden extensions, and some other --- 1501,1510 ---- two forms, whichever is not the default. .PP These options control the amount and kinds of warnings produced by \s-1GCC:\s0 ! .IP "\fB\-fsyntax-only\fR" 4 .IX Item "-fsyntax-only" Check the code for syntax errors, but don't do anything beyond that. ! .IP "\fB\-pedantic\fR" 4 .IX Item "-pedantic" Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+; reject all programs that use forbidden extensions, and some other *************** for such warnings to be given only for f *** 1556,1581 **** C dialect, since by definition the \s-1GNU\s0 dialects of C include all features the compiler supports with the given option, and there would be nothing to warn about.) ! .Ip "\fB\-pedantic-errors\fR" 4 .IX Item "-pedantic-errors" Like \fB\-pedantic\fR, except that errors are produced rather than warnings. ! .Ip "\fB\-w\fR" 4 .IX Item "-w" Inhibit all warning messages. ! .Ip "\fB\-Wno-import\fR" 4 .IX Item "-Wno-import" Inhibit warning messages about the use of \fB#import\fR. ! .Ip "\fB\-Wchar-subscripts\fR" 4 .IX Item "-Wchar-subscripts" Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause of error, as programmers often forget that this type is signed on some machines. ! .Ip "\fB\-Wcomment\fR" 4 .IX Item "-Wcomment" Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR comment, or whenever a Backslash-Newline appears in a \fB//\fR comment. ! .Ip "\fB\-Wformat\fR" 4 .IX Item "-Wformat" Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that the arguments supplied have types appropriate to the format string --- 1543,1568 ---- C dialect, since by definition the \s-1GNU\s0 dialects of C include all features the compiler supports with the given option, and there would be nothing to warn about.) ! .IP "\fB\-pedantic-errors\fR" 4 .IX Item "-pedantic-errors" Like \fB\-pedantic\fR, except that errors are produced rather than warnings. ! .IP "\fB\-w\fR" 4 .IX Item "-w" Inhibit all warning messages. ! .IP "\fB\-Wno-import\fR" 4 .IX Item "-Wno-import" Inhibit warning messages about the use of \fB#import\fR. ! .IP "\fB\-Wchar-subscripts\fR" 4 .IX Item "-Wchar-subscripts" Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause of error, as programmers often forget that this type is signed on some machines. ! .IP "\fB\-Wcomment\fR" 4 .IX Item "-Wcomment" Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR comment, or whenever a Backslash-Newline appears in a \fB//\fR comment. ! .IP "\fB\-Wformat\fR" 4 .IX Item "-Wformat" Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that the arguments supplied have types appropriate to the format string *************** aspects of format checking, the options *** 1600,1620 **** \&\fB\-Wno-format-extra-args\fR, \fB\-Wformat-nonliteral\fR, \&\fB\-Wformat-security\fR and \fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR. ! .Ip "\fB\-Wno-format-y2k\fR" 4 .IX Item "-Wno-format-y2k" If \fB\-Wformat\fR is specified, do not warn about \f(CW\*(C`strftime\*(C'\fR formats which may yield only a two-digit year. ! .Ip "\fB\-Wno-format-extra-args\fR" 4 .IX Item "-Wno-format-extra-args" If \fB\-Wformat\fR is specified, do not warn about excess arguments to a \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies that such arguments are ignored. ! .Ip "\fB\-Wformat-nonliteral\fR" 4 .IX Item "-Wformat-nonliteral" If \fB\-Wformat\fR is specified, also warn if the format string is not a string literal and so cannot be checked, unless the format function takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR. ! .Ip "\fB\-Wformat-security\fR" 4 .IX Item "-Wformat-security" If \fB\-Wformat\fR is specified, also warn about uses of format functions that represent possible security problems. At present, this --- 1587,1607 ---- \&\fB\-Wno-format-extra-args\fR, \fB\-Wformat-nonliteral\fR, \&\fB\-Wformat-security\fR and \fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR. ! .IP "\fB\-Wno-format-y2k\fR" 4 .IX Item "-Wno-format-y2k" If \fB\-Wformat\fR is specified, do not warn about \f(CW\*(C`strftime\*(C'\fR formats which may yield only a two-digit year. ! .IP "\fB\-Wno-format-extra-args\fR" 4 .IX Item "-Wno-format-extra-args" If \fB\-Wformat\fR is specified, do not warn about excess arguments to a \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies that such arguments are ignored. ! .IP "\fB\-Wformat-nonliteral\fR" 4 .IX Item "-Wformat-nonliteral" If \fB\-Wformat\fR is specified, also warn if the format string is not a string literal and so cannot be checked, unless the format function takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR. ! .IP "\fB\-Wformat-security\fR" 4 .IX Item "-Wformat-security" If \fB\-Wformat\fR is specified, also warn about uses of format functions that represent possible security problems. At present, this *************** string came from untrusted input and con *** 1625,1655 **** currently a subset of what \fB\-Wformat-nonliteral\fR warns about, but in future warnings may be added to \fB\-Wformat-security\fR that are not included in \fB\-Wformat-nonliteral\fR.) ! .Ip "\fB\-Wformat=2\fR" 4 .IX Item "-Wformat=2" Enable \fB\-Wformat\fR plus format checks not included in \&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat \&\-Wformat-nonliteral \-Wformat-security\fR. ! .Ip "\fB\-Wimplicit-int\fR" 4 .IX Item "-Wimplicit-int" Warn when a declaration does not specify a type. ! .Ip "\fB\-Wimplicit-function-declaration\fR" 4 .IX Item "-Wimplicit-function-declaration" .PD 0 ! .Ip "\fB\-Werror-implicit-function-declaration\fR" 4 .IX Item "-Werror-implicit-function-declaration" .PD Give a warning (or error) whenever a function is used before being declared. ! .Ip "\fB\-Wimplicit\fR" 4 .IX Item "-Wimplicit" Same as \fB\-Wimplicit-int\fR and \fB\-Wimplicit-function-declaration\fR. ! .Ip "\fB\-Wmain\fR" 4 .IX Item "-Wmain" Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a function with external linkage, returning int, taking either zero arguments, two, or three arguments of appropriate types. ! .Ip "\fB\-Wmissing-braces\fR" 4 .IX Item "-Wmissing-braces" Warn if an aggregate or union initializer is not fully bracketed. In the following example, the initializer for \fBa\fR is not fully --- 1612,1642 ---- currently a subset of what \fB\-Wformat-nonliteral\fR warns about, but in future warnings may be added to \fB\-Wformat-security\fR that are not included in \fB\-Wformat-nonliteral\fR.) ! .IP "\fB\-Wformat=2\fR" 4 .IX Item "-Wformat=2" Enable \fB\-Wformat\fR plus format checks not included in \&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat \&\-Wformat-nonliteral \-Wformat-security\fR. ! .IP "\fB\-Wimplicit-int\fR" 4 .IX Item "-Wimplicit-int" Warn when a declaration does not specify a type. ! .IP "\fB\-Wimplicit-function-declaration\fR" 4 .IX Item "-Wimplicit-function-declaration" .PD 0 ! .IP "\fB\-Werror-implicit-function-declaration\fR" 4 .IX Item "-Werror-implicit-function-declaration" .PD Give a warning (or error) whenever a function is used before being declared. ! .IP "\fB\-Wimplicit\fR" 4 .IX Item "-Wimplicit" Same as \fB\-Wimplicit-int\fR and \fB\-Wimplicit-function-declaration\fR. ! .IP "\fB\-Wmain\fR" 4 .IX Item "-Wmain" Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a function with external linkage, returning int, taking either zero arguments, two, or three arguments of appropriate types. ! .IP "\fB\-Wmissing-braces\fR" 4 .IX Item "-Wmissing-braces" Warn if an aggregate or union initializer is not fully bracketed. In the following example, the initializer for \fBa\fR is not fully *************** bracketed, but that for \fBb\fR is fully *** 1659,1670 **** \& int a[2][2] = { 0, 1, 2, 3 }; \& int b[2][2] = { { 0, 1 }, { 2, 3 } }; .Ve ! .Ip "\fB\-Wmultichar\fR" 4 .IX Item "-Wmultichar" Warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used. Usually they indicate a typo in the user's code, as they have implementation-defined values, and should not be used in portable code. ! .Ip "\fB\-Wparentheses\fR" 4 .IX Item "-Wparentheses" Warn if parentheses are omitted in certain contexts, such as when there is an assignment in a context where a truth value --- 1646,1657 ---- \& int a[2][2] = { 0, 1, 2, 3 }; \& int b[2][2] = { { 0, 1 }, { 2, 3 } }; .Ve ! .IP "\fB\-Wmultichar\fR" 4 .IX Item "-Wmultichar" Warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used. Usually they indicate a typo in the user's code, as they have implementation-defined values, and should not be used in portable code. ! .IP "\fB\-Wparentheses\fR" 4 .IX Item "-Wparentheses" Warn if parentheses are omitted in certain contexts, such as when there is an assignment in a context where a truth value *************** the enclosing \f(CW\*(C`if\*(C'\fR. The *** 1704,1710 **** \& } \& } .Ve ! .Ip "\fB\-Wsequence-point\fR" 4 .IX Item "-Wsequence-point" Warn about code that may have undefined semantics because of violations of sequence point rules in the C standard. --- 1691,1697 ---- \& } \& } .Ve ! .IP "\fB\-Wsequence-point\fR" 4 .IX Item "-Wsequence-point" Warn about code that may have undefined semantics because of violations of sequence point rules in the C standard. *************** There is some controversy over the preci *** 1748,1754 **** rules in subtle cases. Links to papers with alternative formal definitions and other related discussions may be found on our readings page <\fBhttp://gcc.gnu.org/readings.html\fR>. ! .Ip "\fB\-Wreturn-type\fR" 4 .IX Item "-Wreturn-type" Warn whenever a function is defined with a return-type that defaults to \&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no --- 1735,1741 ---- rules in subtle cases. Links to papers with alternative formal definitions and other related discussions may be found on our readings page <\fBhttp://gcc.gnu.org/readings.html\fR>. ! .IP "\fB\-Wreturn-type\fR" 4 .IX Item "-Wreturn-type" Warn whenever a function is defined with a return-type that defaults to \&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no *************** return-value in a function whose return- *** 1757,1806 **** For \*(C+, a function without return type always produces a diagnostic message, even when \fB\-Wno-return-type\fR is specified. The only exceptions are \fBmain\fR and functions defined in system headers. ! .Ip "\fB\-Wswitch\fR" 4 .IX Item "-Wswitch" Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumeral type and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also provoke warnings when this option is used. ! .Ip "\fB\-Wtrigraphs\fR" 4 .IX Item "-Wtrigraphs" Warn if any trigraphs are encountered that might change the meaning of the program (trigraphs within comments are not warned about). ! .Ip "\fB\-Wunused-function\fR" 4 .IX Item "-Wunused-function" Warn whenever a static function is declared but not defined or a non\e-inline static function is unused. ! .Ip "\fB\-Wunused-label\fR" 4 .IX Item "-Wunused-label" Warn whenever a label is declared but not used. .Sp To suppress this warning use the \fBunused\fR attribute. ! .Ip "\fB\-Wunused-parameter\fR" 4 .IX Item "-Wunused-parameter" Warn whenever a function parameter is unused aside from its declaration. .Sp To suppress this warning use the \fBunused\fR attribute. ! .Ip "\fB\-Wunused-variable\fR" 4 .IX Item "-Wunused-variable" Warn whenever a local variable or non-constant static variable is unused aside from its declaration .Sp To suppress this warning use the \fBunused\fR attribute. ! .Ip "\fB\-Wunused-value\fR" 4 .IX Item "-Wunused-value" Warn whenever a statement computes a result that is explicitly not used. .Sp To suppress this warning cast the expression to \fBvoid\fR. ! .Ip "\fB\-Wunused\fR" 4 .IX Item "-Wunused" All all the above \fB\-Wunused\fR options combined. .Sp In order to get a warning about an unused function parameter, you must either specify \fB\-W \-Wunused\fR or separately specify \&\fB\-Wunused-parameter\fR. ! .Ip "\fB\-Wuninitialized\fR" 4 .IX Item "-Wuninitialized" Warn if an automatic variable is used without first being initialized or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. --- 1744,1793 ---- For \*(C+, a function without return type always produces a diagnostic message, even when \fB\-Wno-return-type\fR is specified. The only exceptions are \fBmain\fR and functions defined in system headers. ! .IP "\fB\-Wswitch\fR" 4 .IX Item "-Wswitch" Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumeral type and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also provoke warnings when this option is used. ! .IP "\fB\-Wtrigraphs\fR" 4 .IX Item "-Wtrigraphs" Warn if any trigraphs are encountered that might change the meaning of the program (trigraphs within comments are not warned about). ! .IP "\fB\-Wunused-function\fR" 4 .IX Item "-Wunused-function" Warn whenever a static function is declared but not defined or a non\e-inline static function is unused. ! .IP "\fB\-Wunused-label\fR" 4 .IX Item "-Wunused-label" Warn whenever a label is declared but not used. .Sp To suppress this warning use the \fBunused\fR attribute. ! .IP "\fB\-Wunused-parameter\fR" 4 .IX Item "-Wunused-parameter" Warn whenever a function parameter is unused aside from its declaration. .Sp To suppress this warning use the \fBunused\fR attribute. ! .IP "\fB\-Wunused-variable\fR" 4 .IX Item "-Wunused-variable" Warn whenever a local variable or non-constant static variable is unused aside from its declaration .Sp To suppress this warning use the \fBunused\fR attribute. ! .IP "\fB\-Wunused-value\fR" 4 .IX Item "-Wunused-value" Warn whenever a statement computes a result that is explicitly not used. .Sp To suppress this warning cast the expression to \fBvoid\fR. ! .IP "\fB\-Wunused\fR" 4 .IX Item "-Wunused" All all the above \fB\-Wunused\fR options combined. .Sp In order to get a warning about an unused function parameter, you must either specify \fB\-W \-Wunused\fR or separately specify \&\fB\-Wunused-parameter\fR. ! .IP "\fB\-Wuninitialized\fR" 4 .IX Item "-Wuninitialized" Warn if an automatic variable is used without first being initialized or if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call. *************** in fact be called at the place which wou *** 1866,1888 **** .Sp Some spurious warnings can be avoided if you declare all the functions you use that never return as \f(CW\*(C`noreturn\*(C'\fR. ! .Ip "\fB\-Wreorder\fR (\*(C+ only)" 4 .IX Item "-Wreorder ( only)" Warn when the order of member initializers given in the code does not match the order in which they must be executed. For instance: ! .Ip "\fB\-Wunknown-pragmas\fR" 4 .IX Item "-Wunknown-pragmas" Warn when a #pragma directive is encountered which is not understood by \&\s-1GCC\s0. If this command line option is used, warnings will even be issued for unknown pragmas in system header files. This is not the case if the warnings were only enabled by the \fB\-Wall\fR command line option. ! .Ip "\fB\-Wall\fR" 4 .IX Item "-Wall" All of the above \fB\-W\fR options combined. This enables all the warnings about constructions that some users consider questionable, and that are easy to avoid (or modify to prevent the warning), even in conjunction with macros. ! .Ip "\fB\-Wsystem-headers\fR" 4 .IX Item "-Wsystem-headers" Print warning messages for constructs found in system header files. Warnings from system headers are normally suppressed, on the assumption --- 1853,1875 ---- .Sp Some spurious warnings can be avoided if you declare all the functions you use that never return as \f(CW\*(C`noreturn\*(C'\fR. ! .IP "\fB\-Wreorder\fR (\*(C+ only)" 4 .IX Item "-Wreorder ( only)" Warn when the order of member initializers given in the code does not match the order in which they must be executed. For instance: ! .IP "\fB\-Wunknown-pragmas\fR" 4 .IX Item "-Wunknown-pragmas" Warn when a #pragma directive is encountered which is not understood by \&\s-1GCC\s0. If this command line option is used, warnings will even be issued for unknown pragmas in system header files. This is not the case if the warnings were only enabled by the \fB\-Wall\fR command line option. ! .IP "\fB\-Wall\fR" 4 .IX Item "-Wall" All of the above \fB\-W\fR options combined. This enables all the warnings about constructions that some users consider questionable, and that are easy to avoid (or modify to prevent the warning), even in conjunction with macros. ! .IP "\fB\-Wsystem-headers\fR" 4 .IX Item "-Wsystem-headers" Print warning messages for constructs found in system header files. Warnings from system headers are normally suppressed, on the assumption *************** consider questionable, but which occasio *** 1899,1909 **** for; others warn about constructions that are necessary or hard to avoid in some cases, and there is no simple way to modify the code to suppress the warning. ! .Ip "\fB\-W\fR" 4 .IX Item "-W" Print extra warning messages for these events: .RS 4 ! .Ip "\(bu" 4 A function can return either with or without a value. (Falling off the end of the function body is considered returning without a value.) For example, this function would evoke such a --- 1886,1896 ---- for; others warn about constructions that are necessary or hard to avoid in some cases, and there is no simple way to modify the code to suppress the warning. ! .IP "\fB\-W\fR" 4 .IX Item "-W" Print extra warning messages for these events: .RS 4 ! .IP "\(bu" 4 A function can return either with or without a value. (Falling off the end of the function body is considered returning without a value.) For example, this function would evoke such a *************** warning: *** 1916,1950 **** \& return a; \& } .Ve ! .Ip "\(bu" 4 An expression-statement or the left-hand side of a comma expression contains no side effects. To suppress the warning, cast the unused expression to void. For example, an expression such as \fBx[i,j]\fR will cause a warning, but \fBx[(void)i,j]\fR will not. ! .Ip "\(bu" 4 An unsigned value is compared against zero with \fB<\fR or \fB<=\fR. ! .Ip "\(bu" 4 A comparison like \fBx<=y<=z\fR appears; this is equivalent to \&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from that of ordinary mathematical notation. ! .Ip "\(bu" 4 Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in a declaration. According to the C Standard, this usage is obsolescent. ! .Ip "\(bu" 4 The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR. Such a type qualifier has no effect, since the value returned by a function is not an lvalue. (But don't warn about the \s-1GNU\s0 extension of \&\f(CW\*(C`volatile void\*(C'\fR return types. That extension will be warned about if \fB\-pedantic\fR is specified.) ! .Ip "\(bu" 4 If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused arguments. ! .Ip "\(bu" 4 A comparison between signed and unsigned values could produce an incorrect result when the signed value is converted to unsigned. (But don't warn if \fB\-Wno-sign-compare\fR is also specified.) ! .Ip "\(bu" 4 An aggregate has a partly bracketed initializer. For example, the following code would evoke such a warning, because braces are missing around the initializer for \f(CW\*(C`x.h\*(C'\fR: --- 1903,1937 ---- \& return a; \& } .Ve ! .IP "\(bu" 4 An expression-statement or the left-hand side of a comma expression contains no side effects. To suppress the warning, cast the unused expression to void. For example, an expression such as \fBx[i,j]\fR will cause a warning, but \fBx[(void)i,j]\fR will not. ! .IP "\(bu" 4 An unsigned value is compared against zero with \fB<\fR or \fB<=\fR. ! .IP "\(bu" 4 A comparison like \fBx<=y<=z\fR appears; this is equivalent to \&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from that of ordinary mathematical notation. ! .IP "\(bu" 4 Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in a declaration. According to the C Standard, this usage is obsolescent. ! .IP "\(bu" 4 The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR. Such a type qualifier has no effect, since the value returned by a function is not an lvalue. (But don't warn about the \s-1GNU\s0 extension of \&\f(CW\*(C`volatile void\*(C'\fR return types. That extension will be warned about if \fB\-pedantic\fR is specified.) ! .IP "\(bu" 4 If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused arguments. ! .IP "\(bu" 4 A comparison between signed and unsigned values could produce an incorrect result when the signed value is converted to unsigned. (But don't warn if \fB\-Wno-sign-compare\fR is also specified.) ! .IP "\(bu" 4 An aggregate has a partly bracketed initializer. For example, the following code would evoke such a warning, because braces are missing around the initializer for \f(CW\*(C`x.h\*(C'\fR: *************** because braces are missing around the in *** 1954,1960 **** \& struct t { struct s h; int i; }; \& struct t x = { 1, 2, 3 }; .Ve ! .Ip "\(bu" 4 An aggregate has an initializer which does not initialize all members. For example, the following code would cause such a warning, because \&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero: --- 1941,1947 ---- \& struct t { struct s h; int i; }; \& struct t x = { 1, 2, 3 }; .Ve ! .IP "\(bu" 4 An aggregate has an initializer which does not initialize all members. For example, the following code would cause such a warning, because \&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero: *************** For example, the following code would ca *** 1966,1972 **** .RE .RS 4 .RE ! .Ip "\fB\-Wfloat-equal\fR" 4 .IX Item "-Wfloat-equal" Warn if floating point values are used in equality comparisons. .Sp --- 1953,1959 ---- .RE .RS 4 .RE ! .IP "\fB\-Wfloat-equal\fR" 4 .IX Item "-Wfloat-equal" Warn if floating point values are used in equality comparisons. .Sp *************** different problem). In particular, inst *** 1980,1996 **** would check to see whether the two values have ranges that overlap; and this is done with the relational operators, so equality comparisons are probably mistaken. ! .Ip "\fB\-Wtraditional\fR (C only)" 4 .IX Item "-Wtraditional (C only)" Warn about certain constructs that behave differently in traditional and \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C equivalent, and/or problematic constructs which should be avoided. .RS 4 ! .Ip "\(bu" 4 Macro parameters that appear within string literals in the macro body. In traditional C macro replacement takes place within string literals, but does not in \s-1ISO\s0 C. ! .Ip "\(bu" 4 In traditional C, some preprocessor directives did not exist. Traditional preprocessors would only consider a line to be a directive if the \fB#\fR appeared in column 1 on the line. Therefore --- 1967,1983 ---- would check to see whether the two values have ranges that overlap; and this is done with the relational operators, so equality comparisons are probably mistaken. ! .IP "\fB\-Wtraditional\fR (C only)" 4 .IX Item "-Wtraditional (C only)" Warn about certain constructs that behave differently in traditional and \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C equivalent, and/or problematic constructs which should be avoided. .RS 4 ! .IP "\(bu" 4 Macro parameters that appear within string literals in the macro body. In traditional C macro replacement takes place within string literals, but does not in \s-1ISO\s0 C. ! .IP "\(bu" 4 In traditional C, some preprocessor directives did not exist. Traditional preprocessors would only consider a line to be a directive if the \fB#\fR appeared in column 1 on the line. Therefore *************** first character on the line. It also su *** 2000,2010 **** \&\fB#pragma\fR not understood by traditional C by indenting them. Some traditional implementations would not recognise \fB#elif\fR, so it suggests avoiding it altogether. ! .Ip "\(bu" 4 A function-like macro that appears without arguments. ! .Ip "\(bu" 4 The unary plus operator. ! .Ip "\(bu" 4 The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point constant suffixes. (Traditional C does support the \fBL\fR suffix on integer constants.) Note, these suffixes appear in macros defined in the system --- 1987,1997 ---- \&\fB#pragma\fR not understood by traditional C by indenting them. Some traditional implementations would not recognise \fB#elif\fR, so it suggests avoiding it altogether. ! .IP "\(bu" 4 A function-like macro that appears without arguments. ! .IP "\(bu" 4 The unary plus operator. ! .IP "\(bu" 4 The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point constant suffixes. (Traditional C does support the \fBL\fR suffix on integer constants.) Note, these suffixes appear in macros defined in the system *************** headers of most modern systems, e.g. the *** 2012,2044 **** Use of these macros in user code might normally lead to spurious warnings, however gcc's integrated preprocessor has enough context to avoid warning in these cases. ! .Ip "\(bu" 4 A function declared external in one block and then used after the end of the block. ! .Ip "\(bu" 4 A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR. ! .Ip "\(bu" 4 A non-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one. This construct is not accepted by some traditional C compilers. ! .Ip "\(bu" 4 The \s-1ISO\s0 type of an integer constant has a different width or signedness from its traditional type. This warning is only issued if the base of the constant is ten. I.e. hexadecimal or octal values, which typically represent bit patterns, are not warned about. ! .Ip "\(bu" 4 Usage of \s-1ISO\s0 string concatenation is detected. ! .Ip "\(bu" 4 Initialization of automatic aggregates. ! .Ip "\(bu" 4 Identifier conflicts with labels. Traditional C lacks a separate namespace for labels. ! .Ip "\(bu" 4 Initialization of unions. If the initializer is zero, the warning is omitted. This is done under the assumption that the zero initializer in user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing initializer warnings and relies on default initialization to zero in the traditional C case. ! .Ip "\(bu" 4 Conversions by prototypes between fixed/floating point values and vice versa. The absence of these prototypes when compiling with traditional C would cause serious problems. This is a subset of the possible --- 1999,2031 ---- Use of these macros in user code might normally lead to spurious warnings, however gcc's integrated preprocessor has enough context to avoid warning in these cases. ! .IP "\(bu" 4 A function declared external in one block and then used after the end of the block. ! .IP "\(bu" 4 A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR. ! .IP "\(bu" 4 A non-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one. This construct is not accepted by some traditional C compilers. ! .IP "\(bu" 4 The \s-1ISO\s0 type of an integer constant has a different width or signedness from its traditional type. This warning is only issued if the base of the constant is ten. I.e. hexadecimal or octal values, which typically represent bit patterns, are not warned about. ! .IP "\(bu" 4 Usage of \s-1ISO\s0 string concatenation is detected. ! .IP "\(bu" 4 Initialization of automatic aggregates. ! .IP "\(bu" 4 Identifier conflicts with labels. Traditional C lacks a separate namespace for labels. ! .IP "\(bu" 4 Initialization of unions. If the initializer is zero, the warning is omitted. This is done under the assumption that the zero initializer in user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing initializer warnings and relies on default initialization to zero in the traditional C case. ! .IP "\(bu" 4 Conversions by prototypes between fixed/floating point values and vice versa. The absence of these prototypes when compiling with traditional C would cause serious problems. This is a subset of the possible *************** conversion warnings, for the full set us *** 2046,2088 **** .RE .RS 4 .RE ! .Ip "\fB\-Wundef\fR" 4 .IX Item "-Wundef" Warn if an undefined identifier is evaluated in an \fB#if\fR directive. ! .Ip "\fB\-Wshadow\fR" 4 .IX Item "-Wshadow" Warn whenever a local variable shadows another local variable, parameter or global variable or whenever a built-in function is shadowed. ! .Ip "\fB\-Wid-clash-\fR\fIlen\fR" 4 .IX Item "-Wid-clash-len" Warn whenever two distinct identifiers match in the first \fIlen\fR characters. This may help you prepare a program that will compile with certain obsolete, brain-damaged compilers. ! .Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4 .IX Item "-Wlarger-than-len" Warn whenever an object of larger than \fIlen\fR bytes is defined. ! .Ip "\fB\-Wpointer-arith\fR" 4 .IX Item "-Wpointer-arith" Warn about anything that depends on the ``size of'' a function type or of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers to functions. ! .Ip "\fB\-Wbad-function-cast\fR (C only)" 4 .IX Item "-Wbad-function-cast (C only)" Warn whenever a function call is cast to a non-matching type. For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR. ! .Ip "\fB\-Wcast-qual\fR" 4 .IX Item "-Wcast-qual" Warn whenever a pointer is cast so as to remove a type qualifier from the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast to an ordinary \f(CW\*(C`char *\*(C'\fR. ! .Ip "\fB\-Wcast-align\fR" 4 .IX Item "-Wcast-align" Warn whenever a pointer is cast such that the required alignment of the target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at two- or four-byte boundaries. ! .Ip "\fB\-Wwrite-strings\fR" 4 .IX Item "-Wwrite-strings" When compiling C, give string constants the type \f(CW\*(C`const char[\f(CIlength\f(CW]\*(C'\fR so that --- 2033,2075 ---- .RE .RS 4 .RE ! .IP "\fB\-Wundef\fR" 4 .IX Item "-Wundef" Warn if an undefined identifier is evaluated in an \fB#if\fR directive. ! .IP "\fB\-Wshadow\fR" 4 .IX Item "-Wshadow" Warn whenever a local variable shadows another local variable, parameter or global variable or whenever a built-in function is shadowed. ! .IP "\fB\-Wid-clash-\fR\fIlen\fR" 4 .IX Item "-Wid-clash-len" Warn whenever two distinct identifiers match in the first \fIlen\fR characters. This may help you prepare a program that will compile with certain obsolete, brain-damaged compilers. ! .IP "\fB\-Wlarger-than-\fR\fIlen\fR" 4 .IX Item "-Wlarger-than-len" Warn whenever an object of larger than \fIlen\fR bytes is defined. ! .IP "\fB\-Wpointer-arith\fR" 4 .IX Item "-Wpointer-arith" Warn about anything that depends on the ``size of'' a function type or of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers to functions. ! .IP "\fB\-Wbad-function-cast\fR (C only)" 4 .IX Item "-Wbad-function-cast (C only)" Warn whenever a function call is cast to a non-matching type. For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR. ! .IP "\fB\-Wcast-qual\fR" 4 .IX Item "-Wcast-qual" Warn whenever a pointer is cast so as to remove a type qualifier from the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast to an ordinary \f(CW\*(C`char *\*(C'\fR. ! .IP "\fB\-Wcast-align\fR" 4 .IX Item "-Wcast-align" Warn whenever a pointer is cast such that the required alignment of the target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at two- or four-byte boundaries. ! .IP "\fB\-Wwrite-strings\fR" 4 .IX Item "-Wwrite-strings" When compiling C, give string constants the type \f(CW\*(C`const char[\f(CIlength\f(CW]\*(C'\fR so that *************** compile time code that can try to write *** 2094,2100 **** only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will just be a nuisance; this is why we did not make \fB\-Wall\fR request these warnings. ! .Ip "\fB\-Wconversion\fR" 4 .IX Item "-Wconversion" Warn if a prototype causes a type conversion that is different from what would happen to the same argument in the absence of a prototype. This --- 2081,2087 ---- only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in declarations and prototypes. Otherwise, it will just be a nuisance; this is why we did not make \fB\-Wall\fR request these warnings. ! .IP "\fB\-Wconversion\fR" 4 .IX Item "-Wconversion" Warn if a prototype causes a type conversion that is different from what would happen to the same argument in the absence of a prototype. This *************** Also, warn if a negative integer constan *** 2106,2141 **** converted to an unsigned type. For example, warn about the assignment \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR. ! .Ip "\fB\-Wsign-compare\fR" 4 .IX Item "-Wsign-compare" Warn when a comparison between signed and unsigned values could produce an incorrect result when the signed value is converted to unsigned. This warning is also enabled by \fB\-W\fR; to get the other warnings of \fB\-W\fR without this warning, use \fB\-W \-Wno-sign-compare\fR. ! .Ip "\fB\-Waggregate-return\fR" 4 .IX Item "-Waggregate-return" Warn if any functions that return structures or unions are defined or called. (In languages where you can return an array, this also elicits a warning.) ! .Ip "\fB\-Wstrict-prototypes\fR (C only)" 4 .IX Item "-Wstrict-prototypes (C only)" Warn if a function is declared or defined without specifying the argument types. (An old-style function definition is permitted without a warning if preceded by a declaration which specifies the argument types.) ! .Ip "\fB\-Wmissing-prototypes\fR (C only)" 4 .IX Item "-Wmissing-prototypes (C only)" Warn if a global function is defined without a previous prototype declaration. This warning is issued even if the definition itself provides a prototype. The aim is to detect global functions that fail to be declared in header files. ! .Ip "\fB\-Wmissing-declarations\fR" 4 .IX Item "-Wmissing-declarations" Warn if a global function is defined without a previous declaration. Do so even if the definition itself provides a prototype. Use this option to detect global functions that are not declared in header files. ! .Ip "\fB\-Wmissing-noreturn\fR" 4 .IX Item "-Wmissing-noreturn" Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR. Note these are only possible candidates, not absolute ones. Care should --- 2093,2128 ---- converted to an unsigned type. For example, warn about the assignment \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR. ! .IP "\fB\-Wsign-compare\fR" 4 .IX Item "-Wsign-compare" Warn when a comparison between signed and unsigned values could produce an incorrect result when the signed value is converted to unsigned. This warning is also enabled by \fB\-W\fR; to get the other warnings of \fB\-W\fR without this warning, use \fB\-W \-Wno-sign-compare\fR. ! .IP "\fB\-Waggregate-return\fR" 4 .IX Item "-Waggregate-return" Warn if any functions that return structures or unions are defined or called. (In languages where you can return an array, this also elicits a warning.) ! .IP "\fB\-Wstrict-prototypes\fR (C only)" 4 .IX Item "-Wstrict-prototypes (C only)" Warn if a function is declared or defined without specifying the argument types. (An old-style function definition is permitted without a warning if preceded by a declaration which specifies the argument types.) ! .IP "\fB\-Wmissing-prototypes\fR (C only)" 4 .IX Item "-Wmissing-prototypes (C only)" Warn if a global function is defined without a previous prototype declaration. This warning is issued even if the definition itself provides a prototype. The aim is to detect global functions that fail to be declared in header files. ! .IP "\fB\-Wmissing-declarations\fR" 4 .IX Item "-Wmissing-declarations" Warn if a global function is defined without a previous declaration. Do so even if the definition itself provides a prototype. Use this option to detect global functions that are not declared in header files. ! .IP "\fB\-Wmissing-noreturn\fR" 4 .IX Item "-Wmissing-noreturn" Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR. Note these are only possible candidates, not absolute ones. Care should *************** be taken to manually verify functions ac *** 2143,2149 **** adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in hosted C environments. ! .Ip "\fB\-Wmissing-format-attribute\fR" 4 .IX Item "-Wmissing-format-attribute" If \fB\-Wformat\fR is enabled, also warn about functions which might be candidates for \f(CW\*(C`format\*(C'\fR attributes. Note these are only possible --- 2130,2136 ---- adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in hosted C environments. ! .IP "\fB\-Wmissing-format-attribute\fR" 4 .IX Item "-Wmissing-format-attribute" If \fB\-Wformat\fR is enabled, also warn about functions which might be candidates for \f(CW\*(C`format\*(C'\fR attributes. Note these are only possible *************** like \f(CW\*(C`vprintf\*(C'\fR or \f(CW\ *** 2153,2159 **** case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are appropriate may not be detected. This option has no effect unless \&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR). ! .Ip "\fB\-Wpacked\fR" 4 .IX Item "-Wpacked" Warn if a structure is given the packed attribute, but the packed attribute has no effect on the layout or size of the structure. --- 2140,2146 ---- case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are appropriate may not be detected. This option has no effect unless \&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR). ! .IP "\fB\-Wpacked\fR" 4 .IX Item "-Wpacked" Warn if a structure is given the packed attribute, but the packed attribute has no effect on the layout or size of the structure. *************** have the packed attribute: *** 2172,2191 **** \& struct foo f; \& }; .Ve ! .Ip "\fB\-Wpadded\fR" 4 .IX Item "-Wpadded" Warn if padding is included in a structure, either to align an element of the structure or to align the whole structure. Sometimes when this happens it is possible to rearrange the fields of the structure to reduce the padding and so make the structure smaller. ! .Ip "\fB\-Wredundant-decls\fR" 4 .IX Item "-Wredundant-decls" Warn if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. ! .Ip "\fB\-Wnested-externs\fR (C only)" 4 .IX Item "-Wnested-externs (C only)" Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function. ! .Ip "\fB\-Wunreachable-code\fR" 4 .IX Item "-Wunreachable-code" Warn if the compiler detects that code will never be executed. .Sp --- 2159,2178 ---- \& struct foo f; \& }; .Ve ! .IP "\fB\-Wpadded\fR" 4 .IX Item "-Wpadded" Warn if padding is included in a structure, either to align an element of the structure or to align the whole structure. Sometimes when this happens it is possible to rearrange the fields of the structure to reduce the padding and so make the structure smaller. ! .IP "\fB\-Wredundant-decls\fR" 4 .IX Item "-Wredundant-decls" Warn if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. ! .IP "\fB\-Wnested-externs\fR (C only)" 4 .IX Item "-Wnested-externs (C only)" Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function. ! .IP "\fB\-Wunreachable-code\fR" 4 .IX Item "-Wunreachable-code" Warn if the compiler detects that code will never be executed. .Sp *************** version of a program there is often subs *** 2206,2221 **** correct functioning of the program and is, hopefully, unreachable because the program does work. Another common use of unreachable code is to provide behaviour which is selectable at compile-time. ! .Ip "\fB\-Winline\fR" 4 .IX Item "-Winline" Warn if a function can not be inlined and it was declared as inline. ! .Ip "\fB\-Wlong-long\fR" 4 .IX Item "-Wlong-long" Warn if \fBlong long\fR type is used. This is default. To inhibit the warning messages, use \fB\-Wno-long-long\fR. Flags \&\fB\-Wlong-long\fR and \fB\-Wno-long-long\fR are taken into account only when \fB\-pedantic\fR flag is used. ! .Ip "\fB\-Wdisabled-optimization\fR" 4 .IX Item "-Wdisabled-optimization" Warn if a requested optimization pass is disabled. This warning does not generally indicate that there is anything wrong with your code; it --- 2193,2208 ---- correct functioning of the program and is, hopefully, unreachable because the program does work. Another common use of unreachable code is to provide behaviour which is selectable at compile-time. ! .IP "\fB\-Winline\fR" 4 .IX Item "-Winline" Warn if a function can not be inlined and it was declared as inline. ! .IP "\fB\-Wlong-long\fR" 4 .IX Item "-Wlong-long" Warn if \fBlong long\fR type is used. This is default. To inhibit the warning messages, use \fB\-Wno-long-long\fR. Flags \&\fB\-Wlong-long\fR and \fB\-Wno-long-long\fR are taken into account only when \fB\-pedantic\fR flag is used. ! .IP "\fB\-Wdisabled-optimization\fR" 4 .IX Item "-Wdisabled-optimization" Warn if a requested optimization pass is disabled. This warning does not generally indicate that there is anything wrong with your code; it *************** merely indicates that \s-1GCC\s0's optim *** 2223,2236 **** effectively. Often, the problem is that your code is too big or too complex; \s-1GCC\s0 will refuse to optimize programs when the optimization itself is likely to take inordinate amounts of time. ! .Ip "\fB\-Werror\fR" 4 .IX Item "-Werror" Make all warnings into errors. .Sh "Options for Debugging Your Program or \s-1GCC\s0" .IX Subsection "Options for Debugging Your Program or GCC" \&\s-1GCC\s0 has various special options that are used for debugging either your program or \s-1GCC:\s0 ! .Ip "\fB\-g\fR" 4 .IX Item "-g" Produce debugging information in the operating system's native format (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging --- 2210,2223 ---- effectively. Often, the problem is that your code is too big or too complex; \s-1GCC\s0 will refuse to optimize programs when the optimization itself is likely to take inordinate amounts of time. ! .IP "\fB\-Werror\fR" 4 .IX Item "-Werror" Make all warnings into errors. .Sh "Options for Debugging Your Program or \s-1GCC\s0" .IX Subsection "Options for Debugging Your Program or GCC" \&\s-1GCC\s0 has various special options that are used for debugging either your program or \s-1GCC:\s0 ! .IP "\fB\-g\fR" 4 .IX Item "-g" Produce debugging information in the operating system's native format (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0). \s-1GDB\s0 can work with this debugging *************** it reasonable to use the optimizer for p *** 2258,2327 **** .Sp The following options are useful when \s-1GCC\s0 is generated with the capability for more than one debugging format. ! .Ip "\fB\-ggdb\fR" 4 .IX Item "-ggdb" Produce debugging information for use by \s-1GDB\s0. This means to use the most expressive format available (\s-1DWARF\s0 2, stabs, or the native format if neither of those are supported), including \s-1GDB\s0 extensions if at all possible. ! .Ip "\fB\-gstabs\fR" 4 .IX Item "-gstabs" Produce debugging information in stabs format (if that is supported), without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0 systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0. On System V Release 4 systems this option requires the \s-1GNU\s0 assembler. ! .Ip "\fB\-gstabs+\fR" 4 .IX Item "-gstabs+" Produce debugging information in stabs format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program. ! .Ip "\fB\-gcoff\fR" 4 .IX Item "-gcoff" Produce debugging information in \s-1COFF\s0 format (if that is supported). This is the format used by \s-1SDB\s0 on most System V systems prior to System V Release 4. ! .Ip "\fB\-gxcoff\fR" 4 .IX Item "-gxcoff" Produce debugging information in \s-1XCOFF\s0 format (if that is supported). This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems. ! .Ip "\fB\-gxcoff+\fR" 4 .IX Item "-gxcoff+" Produce debugging information in \s-1XCOFF\s0 format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program, and may cause assemblers other than the \s-1GNU\s0 assembler (\s-1GAS\s0) to fail with an error. ! .Ip "\fB\-gdwarf\fR" 4 .IX Item "-gdwarf" Produce debugging information in \s-1DWARF\s0 version 1 format (if that is supported). This is the format used by \s-1SDB\s0 on most System V Release 4 systems. ! .Ip "\fB\-gdwarf+\fR" 4 .IX Item "-gdwarf+" Produce debugging information in \s-1DWARF\s0 version 1 format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program. ! .Ip "\fB\-gdwarf-2\fR" 4 .IX Item "-gdwarf-2" Produce debugging information in \s-1DWARF\s0 version 2 format (if that is supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. ! .Ip "\fB\-g\fR\fIlevel\fR" 4 .IX Item "-glevel" .PD 0 ! .Ip "\fB\-ggdb\fR\fIlevel\fR" 4 .IX Item "-ggdblevel" ! .Ip "\fB\-gstabs\fR\fIlevel\fR" 4 .IX Item "-gstabslevel" ! .Ip "\fB\-gcoff\fR\fIlevel\fR" 4 .IX Item "-gcofflevel" ! .Ip "\fB\-gxcoff\fR\fIlevel\fR" 4 .IX Item "-gxcofflevel" ! .Ip "\fB\-gdwarf\fR\fIlevel\fR" 4 .IX Item "-gdwarflevel" ! .Ip "\fB\-gdwarf-2\fR\fIlevel\fR" 4 .IX Item "-gdwarf-2level" .PD Request debugging information and also use \fIlevel\fR to specify how --- 2245,2314 ---- .Sp The following options are useful when \s-1GCC\s0 is generated with the capability for more than one debugging format. ! .IP "\fB\-ggdb\fR" 4 .IX Item "-ggdb" Produce debugging information for use by \s-1GDB\s0. This means to use the most expressive format available (\s-1DWARF\s0 2, stabs, or the native format if neither of those are supported), including \s-1GDB\s0 extensions if at all possible. ! .IP "\fB\-gstabs\fR" 4 .IX Item "-gstabs" Produce debugging information in stabs format (if that is supported), without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0 systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0. On System V Release 4 systems this option requires the \s-1GNU\s0 assembler. ! .IP "\fB\-gstabs+\fR" 4 .IX Item "-gstabs+" Produce debugging information in stabs format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program. ! .IP "\fB\-gcoff\fR" 4 .IX Item "-gcoff" Produce debugging information in \s-1COFF\s0 format (if that is supported). This is the format used by \s-1SDB\s0 on most System V systems prior to System V Release 4. ! .IP "\fB\-gxcoff\fR" 4 .IX Item "-gxcoff" Produce debugging information in \s-1XCOFF\s0 format (if that is supported). This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems. ! .IP "\fB\-gxcoff+\fR" 4 .IX Item "-gxcoff+" Produce debugging information in \s-1XCOFF\s0 format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program, and may cause assemblers other than the \s-1GNU\s0 assembler (\s-1GAS\s0) to fail with an error. ! .IP "\fB\-gdwarf\fR" 4 .IX Item "-gdwarf" Produce debugging information in \s-1DWARF\s0 version 1 format (if that is supported). This is the format used by \s-1SDB\s0 on most System V Release 4 systems. ! .IP "\fB\-gdwarf+\fR" 4 .IX Item "-gdwarf+" Produce debugging information in \s-1DWARF\s0 version 1 format (if that is supported), using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The use of these extensions is likely to make other debuggers crash or refuse to read the program. ! .IP "\fB\-gdwarf-2\fR" 4 .IX Item "-gdwarf-2" Produce debugging information in \s-1DWARF\s0 version 2 format (if that is supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. ! .IP "\fB\-g\fR\fIlevel\fR" 4 .IX Item "-glevel" .PD 0 ! .IP "\fB\-ggdb\fR\fIlevel\fR" 4 .IX Item "-ggdblevel" ! .IP "\fB\-gstabs\fR\fIlevel\fR" 4 .IX Item "-gstabslevel" ! .IP "\fB\-gcoff\fR\fIlevel\fR" 4 .IX Item "-gcofflevel" ! .IP "\fB\-gxcoff\fR\fIlevel\fR" 4 .IX Item "-gxcofflevel" ! .IP "\fB\-gdwarf\fR\fIlevel\fR" 4 .IX Item "-gdwarflevel" ! .IP "\fB\-gdwarf-2\fR\fIlevel\fR" 4 .IX Item "-gdwarf-2level" .PD Request debugging information and also use \fIlevel\fR to specify how *************** about local variables and no line number *** 2335,2353 **** Level 3 includes extra information, such as all the macro definitions present in the program. Some debuggers support macro expansion when you use \fB\-g3\fR. ! .Ip "\fB\-p\fR" 4 .IX Item "-p" Generate extra code to write profile information suitable for the analysis program \f(CW\*(C`prof\*(C'\fR. You must use this option when compiling the source files you want data about, and you must also use it when linking. ! .Ip "\fB\-pg\fR" 4 .IX Item "-pg" Generate extra code to write profile information suitable for the analysis program \f(CW\*(C`gprof\*(C'\fR. You must use this option when compiling the source files you want data about, and you must also use it when linking. ! .Ip "\fB\-a\fR" 4 .IX Item "-a" Generate extra code to write profile information for basic blocks, which will record the number of times each basic block is executed, the basic block start --- 2322,2340 ---- Level 3 includes extra information, such as all the macro definitions present in the program. Some debuggers support macro expansion when you use \fB\-g3\fR. ! .IP "\fB\-p\fR" 4 .IX Item "-p" Generate extra code to write profile information suitable for the analysis program \f(CW\*(C`prof\*(C'\fR. You must use this option when compiling the source files you want data about, and you must also use it when linking. ! .IP "\fB\-pg\fR" 4 .IX Item "-pg" Generate extra code to write profile information suitable for the analysis program \f(CW\*(C`gprof\*(C'\fR. You must use this option when compiling the source files you want data about, and you must also use it when linking. ! .IP "\fB\-a\fR" 4 .IX Item "-a" Generate extra code to write profile information for basic blocks, which will record the number of times each basic block is executed, the basic block start *************** to append to the text file \fIbb.out\fR. *** 2359,2377 **** This data could be analyzed by a program like \f(CW\*(C`tcov\*(C'\fR. Note, however, that the format of the data is not what \f(CW\*(C`tcov\*(C'\fR expects. Eventually \s-1GNU\s0 \f(CW\*(C`gprof\*(C'\fR should be extended to process this data. ! .Ip "\fB\-Q\fR" 4 .IX Item "-Q" Makes the compiler print out each function name as it is compiled, and print some statistics about each pass when it finishes. ! .Ip "\fB\-ftime-report\fR" 4 .IX Item "-ftime-report" Makes the compiler print some statistics about the time consumed by each pass when it finishes. ! .Ip "\fB\-fmem-report\fR" 4 .IX Item "-fmem-report" Makes the compiler print some statistics about permanent memory allocation when it finishes. ! .Ip "\fB\-ax\fR" 4 .IX Item "-ax" Generate extra code to profile basic blocks. Your executable will produce output that is a superset of that produced when \fB\-a\fR is --- 2346,2364 ---- This data could be analyzed by a program like \f(CW\*(C`tcov\*(C'\fR. Note, however, that the format of the data is not what \f(CW\*(C`tcov\*(C'\fR expects. Eventually \s-1GNU\s0 \f(CW\*(C`gprof\*(C'\fR should be extended to process this data. ! .IP "\fB\-Q\fR" 4 .IX Item "-Q" Makes the compiler print out each function name as it is compiled, and print some statistics about each pass when it finishes. ! .IP "\fB\-ftime-report\fR" 4 .IX Item "-ftime-report" Makes the compiler print some statistics about the time consumed by each pass when it finishes. ! .IP "\fB\-fmem-report\fR" 4 .IX Item "-fmem-report" Makes the compiler print some statistics about permanent memory allocation when it finishes. ! .IP "\fB\-ax\fR" 4 .IX Item "-ax" Generate extra code to profile basic blocks. Your executable will produce output that is a superset of that produced when \fB\-a\fR is *************** available paths and filenames in file \f *** 2391,2410 **** .Sp Several function names have a special meaning: .RS 4 ! .if n .Ip "\f(CW""""_\|_bb_jumps_\|_""""\fR" 4 ! .el .Ip "\f(CW_\|_bb_jumps_\|_\fR" 4 .IX Item "__bb_jumps__" Write source, target and frequency of jumps to file \fIbb.out\fR. ! .if n .Ip "\f(CW""""_\|_bb_hidecall_\|_""""\fR" 4 ! .el .Ip "\f(CW_\|_bb_hidecall_\|_\fR" 4 .IX Item "__bb_hidecall__" Exclude function calls from frequency count. ! .if n .Ip "\f(CW""""_\|_bb_showret_\|_""""\fR" 4 ! .el .Ip "\f(CW_\|_bb_showret_\|_\fR" 4 .IX Item "__bb_showret__" Include function returns in frequency count. ! .if n .Ip "\f(CW""""_\|_bb_trace_\|_""""\fR" 4 ! .el .Ip "\f(CW_\|_bb_trace_\|_\fR" 4 .IX Item "__bb_trace__" Write the sequence of basic blocks executed to file \fIbbtrace.gz\fR. The file will be compressed using the program \fBgzip\fR, which must --- 2378,2397 ---- .Sp Several function names have a special meaning: .RS 4 ! .if n .IP """_\|_bb_jumps_\|_""" 4 ! .el .IP "\f(CW_\|_bb_jumps_\|_\fR" 4 .IX Item "__bb_jumps__" Write source, target and frequency of jumps to file \fIbb.out\fR. ! .if n .IP """_\|_bb_hidecall_\|_""" 4 ! .el .IP "\f(CW_\|_bb_hidecall_\|_\fR" 4 .IX Item "__bb_hidecall__" Exclude function calls from frequency count. ! .if n .IP """_\|_bb_showret_\|_""" 4 ! .el .IP "\f(CW_\|_bb_showret_\|_\fR" 4 .IX Item "__bb_showret__" Include function returns in frequency count. ! .if n .IP """_\|_bb_trace_\|_""" 4 ! .el .IP "\f(CW_\|_bb_trace_\|_\fR" 4 .IX Item "__bb_trace__" Write the sequence of basic blocks executed to file \fIbbtrace.gz\fR. The file will be compressed using the program \fBgzip\fR, which must *************** to return instructions is added to the t *** 2453,2459 **** written to \fIbbtrace.gz\fR. It is solely used for counting jump frequencies. .RE ! .Ip "\fB\-fprofile-arcs\fR" 4 .IX Item "-fprofile-arcs" Instrument \fIarcs\fR during compilation. For each function of your program, \s-1GCC\s0 creates a program flow graph, then finds a spanning tree --- 2440,2446 ---- written to \fIbbtrace.gz\fR. It is solely used for counting jump frequencies. .RE ! .IP "\fB\-fprofile-arcs\fR" 4 .IX Item "-fprofile-arcs" Instrument \fIarcs\fR during compilation. For each function of your program, \s-1GCC\s0 creates a program flow graph, then finds a spanning tree *************** saves the arc execution counts to a file *** 2481,2496 **** \&\fI\fIsourcename\fI.da\fR. Use the compiler option \&\fB\-fbranch-probabilities\fR when recompiling, to optimize using estimated branch probabilities. ! .Ip "\fB\-ftest-coverage\fR" 4 .IX Item "-ftest-coverage" Create data files for the \f(CW\*(C`gcov\*(C'\fR code-coverage utility. The data file names begin with the name of your source file: .RS 4 ! .Ip "\fIsourcename\fR\fB.bb\fR" 4 .IX Item "sourcename.bb" A mapping from basic blocks to line numbers, which \f(CW\*(C`gcov\*(C'\fR uses to associate basic block execution counts with line numbers. ! .Ip "\fIsourcename\fR\fB.bbg\fR" 4 .IX Item "sourcename.bbg" A list of all arcs in the program flow graph. This allows \f(CW\*(C`gcov\*(C'\fR to reconstruct the program flow graph, so that it can compute all basic --- 2468,2483 ---- \&\fI\fIsourcename\fI.da\fR. Use the compiler option \&\fB\-fbranch-probabilities\fR when recompiling, to optimize using estimated branch probabilities. ! .IP "\fB\-ftest-coverage\fR" 4 .IX Item "-ftest-coverage" Create data files for the \f(CW\*(C`gcov\*(C'\fR code-coverage utility. The data file names begin with the name of your source file: .RS 4 ! .IP "\fIsourcename\fR\fB.bb\fR" 4 .IX Item "sourcename.bb" A mapping from basic blocks to line numbers, which \f(CW\*(C`gcov\*(C'\fR uses to associate basic block execution counts with line numbers. ! .IP "\fIsourcename\fR\fB.bbg\fR" 4 .IX Item "sourcename.bbg" A list of all arcs in the program flow graph. This allows \f(CW\*(C`gcov\*(C'\fR to reconstruct the program flow graph, so that it can compute all basic *************** block and arc execution counts from the *** 2500,2506 **** .RE .RS 4 .RE ! .Ip "\fB\-d\fR\fIletters\fR" 4 .IX Item "-dletters" Says to make debugging dumps during compilation at times specified by \&\fIletters\fR. This is used for debugging the compiler. The file names --- 2487,2493 ---- .RE .RS 4 .RE ! .IP "\fB\-d\fR\fIletters\fR" 4 .IX Item "-dletters" Says to make debugging dumps during compilation at times specified by \&\fIletters\fR. This is used for debugging the compiler. The file names *************** for most of the dumps are made by append *** 2508,2664 **** the source file name (e.g. \fIfoo.c.00.rtl\fR or \fIfoo.c.01.sibling\fR). Here are the possible letters for use in \fIletters\fR, and their meanings: .RS 4 ! .Ip "\fBA\fR" 4 .IX Item "A" Annotate the assembler output with miscellaneous debugging information. ! .Ip "\fBb\fR" 4 .IX Item "b" Dump after computing branch probabilities, to \fI\fIfile\fI.11.bp\fR. ! .Ip "\fBB\fR" 4 .IX Item "B" Dump after block reordering, to \fI\fIfile\fI.26.bbro\fR. ! .Ip "\fBc\fR" 4 .IX Item "c" Dump after instruction combination, to the file \fI\fIfile\fI.14.combine\fR. ! .Ip "\fBC\fR" 4 .IX Item "C" Dump after the first if conversion, to the file \fI\fIfile\fI.15.ce\fR. ! .Ip "\fBd\fR" 4 .IX Item "d" Dump after delayed branch scheduling, to \fI\fIfile\fI.29.dbr\fR. ! .Ip "\fBD\fR" 4 .IX Item "D" Dump all macro definitions, at the end of preprocessing, in addition to normal output. ! .Ip "\fBe\fR" 4 .IX Item "e" Dump after \s-1SSA\s0 optimizations, to \fI\fIfile\fI.05.ssa\fR and \&\fI\fIfile\fI.06.ussa\fR. ! .Ip "\fBE\fR" 4 .IX Item "E" Dump after the second if conversion, to \fI\fIfile\fI.24.ce2\fR. ! .Ip "\fBf\fR" 4 .IX Item "f" Dump after life analysis, to \fI\fIfile\fI.13.life\fR. ! .Ip "\fBF\fR" 4 .IX Item "F" Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.04.addressof\fR. ! .Ip "\fBg\fR" 4 .IX Item "g" Dump after global register allocation, to \fI\fIfile\fI.19.greg\fR. ! .Ip "\fBo\fR" 4 .IX Item "o" Dump after post-reload \s-1CSE\s0 and other optimizations, to \fI\fIfile\fI.20.postreload\fR. ! .Ip "\fBG\fR" 4 .IX Item "G" Dump after \s-1GCSE\s0, to \fI\fIfile\fI.08.gcse\fR. ! .Ip "\fBi\fR" 4 .IX Item "i" Dump after sibling call optimizations, to \fI\fIfile\fI.01.sibling\fR. ! .Ip "\fBj\fR" 4 .IX Item "j" Dump after the first jump optimization, to \fI\fIfile\fI.02.jump\fR. ! .Ip "\fBJ\fR" 4 .IX Item "J" Dump after the last jump optimization, to \fI\fIfile\fI.27.jump2\fR. ! .Ip "\fBk\fR" 4 .IX Item "k" Dump after conversion from registers to stack, to \fI\fIfile\fI.29.stack\fR. ! .Ip "\fBl\fR" 4 .IX Item "l" Dump after local register allocation, to \fI\fIfile\fI.18.lreg\fR. ! .Ip "\fBL\fR" 4 .IX Item "L" Dump after loop optimization, to \fI\fIfile\fI.09.loop\fR. ! .Ip "\fBM\fR" 4 .IX Item "M" Dump after performing the machine dependent reorganisation pass, to \&\fI\fIfile\fI.28.mach\fR. ! .Ip "\fBn\fR" 4 .IX Item "n" Dump after register renumbering, to \fI\fIfile\fI.23.rnreg\fR. ! .Ip "\fBN\fR" 4 .IX Item "N" Dump after the register move pass, to \fI\fIfile\fI.16.regmove\fR. ! .Ip "\fBr\fR" 4 .IX Item "r" Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.00.rtl\fR. ! .Ip "\fBR\fR" 4 .IX Item "R" Dump after the second instruction scheduling pass, to \&\fI\fIfile\fI.25.sched2\fR. ! .Ip "\fBs\fR" 4 .IX Item "s" Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows \&\s-1CSE\s0), to \fI\fIfile\fI.03.cse\fR. ! .Ip "\fBS\fR" 4 .IX Item "S" Dump after the first instruction scheduling pass, to \&\fI\fIfile\fI.17.sched\fR. ! .Ip "\fBt\fR" 4 .IX Item "t" Dump after the second \s-1CSE\s0 pass (including the jump optimization that sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.10.cse2\fR. ! .Ip "\fBw\fR" 4 .IX Item "w" Dump after the second flow pass, to \fI\fIfile\fI.21.flow2\fR. ! .Ip "\fBX\fR" 4 .IX Item "X" Dump after dead code elimination, to \fI\fIfile\fI.06.dce\fR. ! .Ip "\fBz\fR" 4 .IX Item "z" Dump after the peephole pass, to \fI\fIfile\fI.22.peephole2\fR. ! .Ip "\fBa\fR" 4 .IX Item "a" Produce all the dumps listed above. ! .Ip "\fBm\fR" 4 .IX Item "m" Print statistics on memory usage, at the end of the run, to standard error. ! .Ip "\fBp\fR" 4 .IX Item "p" Annotate the assembler output with a comment indicating which pattern and alternative was used. The length of each instruction is also printed. ! .Ip "\fBP\fR" 4 .IX Item "P" Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction. Also turns on \fB\-dp\fR annotation. ! .Ip "\fBv\fR" 4 .IX Item "v" For each of the other indicated dump files (except for \&\fI\fIfile\fI.00.rtl\fR), dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR. ! .Ip "\fBx\fR" 4 .IX Item "x" Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used with \fBr\fR. ! .Ip "\fBy\fR" 4 .IX Item "y" Dump debugging information during parsing, to standard error. .RE .RS 4 .RE ! .Ip "\fB\-fdump-unnumbered\fR" 4 .IX Item "-fdump-unnumbered" When doing debugging dumps (see \fB\-d\fR option above), suppress instruction numbers and line number note output. This makes it more feasible to use diff on debugging dumps for compiler invocations with different options, in particular with and without \fB\-g\fR. ! .Ip "\fB\-fdump-translation-unit\fR (C and \*(C+ only)" 4 .IX Item "-fdump-translation-unit (C and only)" .PD 0 ! .Ip "\fB\-fdump-translation-unit-\fR\fInumber\fR\fB \fR(C and \*(C+ only)" 4 .IX Item "-fdump-translation-unit-number (C and only)" .PD Dump a representation of the tree structure for the entire translation unit to a file. The file name is made by appending \fI.tu\fR to the source file name. If the \fB-\fR\fInumber\fR form is used, \fInumber\fR controls the details of the dump as described for the \fB\-fdump-tree\fR options. ! .Ip "\fB\-fdump-class-hierarchy\fR (\*(C+ only)" 4 .IX Item "-fdump-class-hierarchy ( only)" .PD 0 ! .Ip "\fB\-fdump-class-hierarchy-\fR\fInumber\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-class-hierarchy-number ( only)" .PD Dump a representation of each class's hierarchy and virtual function --- 2495,2651 ---- the source file name (e.g. \fIfoo.c.00.rtl\fR or \fIfoo.c.01.sibling\fR). Here are the possible letters for use in \fIletters\fR, and their meanings: .RS 4 ! .IP "\fBA\fR" 4 .IX Item "A" Annotate the assembler output with miscellaneous debugging information. ! .IP "\fBb\fR" 4 .IX Item "b" Dump after computing branch probabilities, to \fI\fIfile\fI.11.bp\fR. ! .IP "\fBB\fR" 4 .IX Item "B" Dump after block reordering, to \fI\fIfile\fI.26.bbro\fR. ! .IP "\fBc\fR" 4 .IX Item "c" Dump after instruction combination, to the file \fI\fIfile\fI.14.combine\fR. ! .IP "\fBC\fR" 4 .IX Item "C" Dump after the first if conversion, to the file \fI\fIfile\fI.15.ce\fR. ! .IP "\fBd\fR" 4 .IX Item "d" Dump after delayed branch scheduling, to \fI\fIfile\fI.29.dbr\fR. ! .IP "\fBD\fR" 4 .IX Item "D" Dump all macro definitions, at the end of preprocessing, in addition to normal output. ! .IP "\fBe\fR" 4 .IX Item "e" Dump after \s-1SSA\s0 optimizations, to \fI\fIfile\fI.05.ssa\fR and \&\fI\fIfile\fI.06.ussa\fR. ! .IP "\fBE\fR" 4 .IX Item "E" Dump after the second if conversion, to \fI\fIfile\fI.24.ce2\fR. ! .IP "\fBf\fR" 4 .IX Item "f" Dump after life analysis, to \fI\fIfile\fI.13.life\fR. ! .IP "\fBF\fR" 4 .IX Item "F" Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.04.addressof\fR. ! .IP "\fBg\fR" 4 .IX Item "g" Dump after global register allocation, to \fI\fIfile\fI.19.greg\fR. ! .IP "\fBo\fR" 4 .IX Item "o" Dump after post-reload \s-1CSE\s0 and other optimizations, to \fI\fIfile\fI.20.postreload\fR. ! .IP "\fBG\fR" 4 .IX Item "G" Dump after \s-1GCSE\s0, to \fI\fIfile\fI.08.gcse\fR. ! .IP "\fBi\fR" 4 .IX Item "i" Dump after sibling call optimizations, to \fI\fIfile\fI.01.sibling\fR. ! .IP "\fBj\fR" 4 .IX Item "j" Dump after the first jump optimization, to \fI\fIfile\fI.02.jump\fR. ! .IP "\fBJ\fR" 4 .IX Item "J" Dump after the last jump optimization, to \fI\fIfile\fI.27.jump2\fR. ! .IP "\fBk\fR" 4 .IX Item "k" Dump after conversion from registers to stack, to \fI\fIfile\fI.29.stack\fR. ! .IP "\fBl\fR" 4 .IX Item "l" Dump after local register allocation, to \fI\fIfile\fI.18.lreg\fR. ! .IP "\fBL\fR" 4 .IX Item "L" Dump after loop optimization, to \fI\fIfile\fI.09.loop\fR. ! .IP "\fBM\fR" 4 .IX Item "M" Dump after performing the machine dependent reorganisation pass, to \&\fI\fIfile\fI.28.mach\fR. ! .IP "\fBn\fR" 4 .IX Item "n" Dump after register renumbering, to \fI\fIfile\fI.23.rnreg\fR. ! .IP "\fBN\fR" 4 .IX Item "N" Dump after the register move pass, to \fI\fIfile\fI.16.regmove\fR. ! .IP "\fBr\fR" 4 .IX Item "r" Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.00.rtl\fR. ! .IP "\fBR\fR" 4 .IX Item "R" Dump after the second instruction scheduling pass, to \&\fI\fIfile\fI.25.sched2\fR. ! .IP "\fBs\fR" 4 .IX Item "s" Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows \&\s-1CSE\s0), to \fI\fIfile\fI.03.cse\fR. ! .IP "\fBS\fR" 4 .IX Item "S" Dump after the first instruction scheduling pass, to \&\fI\fIfile\fI.17.sched\fR. ! .IP "\fBt\fR" 4 .IX Item "t" Dump after the second \s-1CSE\s0 pass (including the jump optimization that sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.10.cse2\fR. ! .IP "\fBw\fR" 4 .IX Item "w" Dump after the second flow pass, to \fI\fIfile\fI.21.flow2\fR. ! .IP "\fBX\fR" 4 .IX Item "X" Dump after dead code elimination, to \fI\fIfile\fI.06.dce\fR. ! .IP "\fBz\fR" 4 .IX Item "z" Dump after the peephole pass, to \fI\fIfile\fI.22.peephole2\fR. ! .IP "\fBa\fR" 4 .IX Item "a" Produce all the dumps listed above. ! .IP "\fBm\fR" 4 .IX Item "m" Print statistics on memory usage, at the end of the run, to standard error. ! .IP "\fBp\fR" 4 .IX Item "p" Annotate the assembler output with a comment indicating which pattern and alternative was used. The length of each instruction is also printed. ! .IP "\fBP\fR" 4 .IX Item "P" Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction. Also turns on \fB\-dp\fR annotation. ! .IP "\fBv\fR" 4 .IX Item "v" For each of the other indicated dump files (except for \&\fI\fIfile\fI.00.rtl\fR), dump a representation of the control flow graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR. ! .IP "\fBx\fR" 4 .IX Item "x" Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used with \fBr\fR. ! .IP "\fBy\fR" 4 .IX Item "y" Dump debugging information during parsing, to standard error. .RE .RS 4 .RE ! .IP "\fB\-fdump-unnumbered\fR" 4 .IX Item "-fdump-unnumbered" When doing debugging dumps (see \fB\-d\fR option above), suppress instruction numbers and line number note output. This makes it more feasible to use diff on debugging dumps for compiler invocations with different options, in particular with and without \fB\-g\fR. ! .IP "\fB\-fdump-translation-unit\fR (C and \*(C+ only)" 4 .IX Item "-fdump-translation-unit (C and only)" .PD 0 ! .IP "\fB\-fdump-translation-unit-\fR\fInumber\fR\fB \fR(C and \*(C+ only)" 4 .IX Item "-fdump-translation-unit-number (C and only)" .PD Dump a representation of the tree structure for the entire translation unit to a file. The file name is made by appending \fI.tu\fR to the source file name. If the \fB-\fR\fInumber\fR form is used, \fInumber\fR controls the details of the dump as described for the \fB\-fdump-tree\fR options. ! .IP "\fB\-fdump-class-hierarchy\fR (\*(C+ only)" 4 .IX Item "-fdump-class-hierarchy ( only)" .PD 0 ! .IP "\fB\-fdump-class-hierarchy-\fR\fInumber\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-class-hierarchy-number ( only)" .PD Dump a representation of each class's hierarchy and virtual function *************** table layout to a file. The file name i *** 2666,2675 **** to the source file name. If the \fB-\fR\fInumber\fR form is used, \fInumber\fR controls the details of the dump as described for the \fB\-fdump-tree\fR options. ! .Ip "\fB\-fdump-ast-\fR\fIswitch\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-ast-switch ( only)" .PD 0 ! .Ip "\fB\-fdump-ast-\fR\fIswitch\fR\fB-\fR\fInumber\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-ast-switch-number ( only)" .PD Control the dumping at various stages of processing the abstract syntax --- 2653,2662 ---- to the source file name. If the \fB-\fR\fInumber\fR form is used, \fInumber\fR controls the details of the dump as described for the \fB\-fdump-tree\fR options. ! .IP "\fB\-fdump-ast-\fR\fIswitch\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-ast-switch ( only)" .PD 0 ! .IP "\fB\-fdump-ast-\fR\fIswitch\fR\fB-\fR\fInumber\fR\fB \fR(\*(C+ only)" 4 .IX Item "-fdump-ast-switch-number ( only)" .PD Control the dumping at various stages of processing the abstract syntax *************** used, \fInumber\fR is a bit mask which c *** 2679,2689 **** dump. The following bits are meaningful (these are not set symbolically, as the primary function of these dumps is for debugging gcc itself): .RS 4 ! .Ip "\fBbit0 (1)\fR" 4 .IX Item "bit0 (1)" Print the address of each node. Usually this is not meaningful as it changes according to the environment and source file. ! .Ip "\fBbit1 (2)\fR" 4 .IX Item "bit1 (2)" Inhibit dumping of members of a scope or body of a function, unless they are reachable by some other path. --- 2666,2676 ---- dump. The following bits are meaningful (these are not set symbolically, as the primary function of these dumps is for debugging gcc itself): .RS 4 ! .IP "\fBbit0 (1)\fR" 4 .IX Item "bit0 (1)" Print the address of each node. Usually this is not meaningful as it changes according to the environment and source file. ! .IP "\fBbit1 (2)\fR" 4 .IX Item "bit1 (2)" Inhibit dumping of members of a scope or body of a function, unless they are reachable by some other path. *************** are reachable by some other path. *** 2693,2715 **** The following tree dumps are possible: .RS 4 .RE ! .Ip "\fBoriginal\fR" 4 .IX Item "original" Dump before any tree based optimization, to \fI\fIfile\fI.original\fR. ! .Ip "\fBoptimized\fR" 4 .IX Item "optimized" Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR. .RE .RS 4 .RE ! .Ip "\fB\-fpretend-float\fR" 4 .IX Item "-fpretend-float" When running a cross-compiler, pretend that the target machine uses the same floating point format as the host machine. This causes incorrect output of the actual floating constants, but the actual instruction sequence will probably be the same as \s-1GCC\s0 would make when running on the target machine. ! .Ip "\fB\-save-temps\fR" 4 .IX Item "-save-temps" Store the usual ``temporary'' intermediate files permanently; place them in the current directory and name them based on the source file. Thus, --- 2680,2702 ---- The following tree dumps are possible: .RS 4 .RE ! .IP "\fBoriginal\fR" 4 .IX Item "original" Dump before any tree based optimization, to \fI\fIfile\fI.original\fR. ! .IP "\fBoptimized\fR" 4 .IX Item "optimized" Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR. .RE .RS 4 .RE ! .IP "\fB\-fpretend-float\fR" 4 .IX Item "-fpretend-float" When running a cross-compiler, pretend that the target machine uses the same floating point format as the host machine. This causes incorrect output of the actual floating constants, but the actual instruction sequence will probably be the same as \s-1GCC\s0 would make when running on the target machine. ! .IP "\fB\-save-temps\fR" 4 .IX Item "-save-temps" Store the usual ``temporary'' intermediate files permanently; place them in the current directory and name them based on the source file. Thus, *************** compiling \fIfoo.c\fR with \fB\-c \-save *** 2717,2723 **** \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a preprocessed \fIfoo.i\fR output file even though the compiler now normally uses an integrated preprocessor. ! .Ip "\fB\-time\fR" 4 .IX Item "-time" Report the \s-1CPU\s0 time taken by each subprocess in the compilation sequence. For C source files, this is the compiler proper and assembler --- 2704,2710 ---- \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a preprocessed \fIfoo.i\fR output file even though the compiler now normally uses an integrated preprocessor. ! .IP "\fB\-time\fR" 4 .IX Item "-time" Report the \s-1CPU\s0 time taken by each subprocess in the compilation sequence. For C source files, this is the compiler proper and assembler *************** The first number on each line is the ``u *** 2731,2758 **** executing the program itself. The second number is ``system time,'' time spent executing operating system routines on behalf of the program. Both numbers are in seconds. ! .Ip "\fB\-print-file-name=\fR\fIlibrary\fR" 4 .IX Item "-print-file-name=library" Print the full absolute name of the library file \fIlibrary\fR that would be used when linking\-\-\-and don't do anything else. With this option, \s-1GCC\s0 does not compile or link anything; it just prints the file name. ! .Ip "\fB\-print-multi-directory\fR" 4 .IX Item "-print-multi-directory" Print the directory name corresponding to the multilib selected by any other switches present in the command line. This directory is supposed to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR. ! .Ip "\fB\-print-multi-lib\fR" 4 .IX Item "-print-multi-lib" Print the mapping from multilib directory names to compiler switches that enable them. The directory name is separated from the switches by \&\fB;\fR, and each switch starts with an \fB@} instead of the \&\f(CB@samp\fB{-\fR, without spaces between multiple switches. This is supposed to ease shell-processing. ! .Ip "\fB\-print-prog-name=\fR\fIprogram\fR" 4 .IX Item "-print-prog-name=program" Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR. ! .Ip "\fB\-print-libgcc-file-name\fR" 4 .IX Item "-print-libgcc-file-name" Same as \fB\-print-file-name=libgcc.a\fR. .Sp --- 2718,2745 ---- executing the program itself. The second number is ``system time,'' time spent executing operating system routines on behalf of the program. Both numbers are in seconds. ! .IP "\fB\-print-file-name=\fR\fIlibrary\fR" 4 .IX Item "-print-file-name=library" Print the full absolute name of the library file \fIlibrary\fR that would be used when linking\-\-\-and don't do anything else. With this option, \s-1GCC\s0 does not compile or link anything; it just prints the file name. ! .IP "\fB\-print-multi-directory\fR" 4 .IX Item "-print-multi-directory" Print the directory name corresponding to the multilib selected by any other switches present in the command line. This directory is supposed to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR. ! .IP "\fB\-print-multi-lib\fR" 4 .IX Item "-print-multi-lib" Print the mapping from multilib directory names to compiler switches that enable them. The directory name is separated from the switches by \&\fB;\fR, and each switch starts with an \fB@} instead of the \&\f(CB@samp\fB{-\fR, without spaces between multiple switches. This is supposed to ease shell-processing. ! .IP "\fB\-print-prog-name=\fR\fIprogram\fR" 4 .IX Item "-print-prog-name=program" Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR. ! .IP "\fB\-print-libgcc-file-name\fR" 4 .IX Item "-print-libgcc-file-name" Same as \fB\-print-file-name=libgcc.a\fR. .Sp *************** but you do want to link with \fIlibgcc.a *** 2762,2768 **** .Vb 1 \& gcc -nostdlib I... `gcc -print-libgcc-file-name` .Ve ! .Ip "\fB\-print-search-dirs\fR" 4 .IX Item "-print-search-dirs" Print the name of the configured installation directory and a list of program and library directories gcc will search\-\-\-and don't do anything else. --- 2749,2755 ---- .Vb 1 \& gcc -nostdlib I... `gcc -print-libgcc-file-name` .Ve ! .IP "\fB\-print-search-dirs\fR" 4 .IX Item "-print-search-dirs" Print the name of the configured installation directory and a list of program and library directories gcc will search\-\-\-and don't do anything else. *************** To resolve this you either need to put \ *** 2773,2797 **** components where gcc expects to find them, or you can set the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them. Don't forget the trailing '/'. ! .Ip "\fB\-dumpmachine\fR" 4 .IX Item "-dumpmachine" Print the compiler's target machine (for example, \&\fBi686\-pc-linux-gnu\fR)\-\-\-and don't do anything else. ! .Ip "\fB\-dumpversion\fR" 4 .IX Item "-dumpversion" Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do anything else. ! .Ip "\fB\-dumpspecs\fR" 4 .IX Item "-dumpspecs" Print the compiler's built-in specs\-\-\-and don't do anything else. (This is used when \s-1GCC\s0 itself is being built.) .Sh "Options That Control Optimization" .IX Subsection "Options That Control Optimization" These options control various sorts of optimizations: ! .Ip "\fB\-O\fR" 4 .IX Item "-O" .PD 0 ! .Ip "\fB\-O1\fR" 4 .IX Item "-O1" .PD Optimize. Optimizing compilation takes somewhat more time, and a lot --- 2760,2784 ---- components where gcc expects to find them, or you can set the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them. Don't forget the trailing '/'. ! .IP "\fB\-dumpmachine\fR" 4 .IX Item "-dumpmachine" Print the compiler's target machine (for example, \&\fBi686\-pc-linux-gnu\fR)\-\-\-and don't do anything else. ! .IP "\fB\-dumpversion\fR" 4 .IX Item "-dumpversion" Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do anything else. ! .IP "\fB\-dumpspecs\fR" 4 .IX Item "-dumpspecs" Print the compiler's built-in specs\-\-\-and don't do anything else. (This is used when \s-1GCC\s0 itself is being built.) .Sh "Options That Control Optimization" .IX Subsection "Options That Control Optimization" These options control various sorts of optimizations: ! .IP "\fB\-O\fR" 4 .IX Item "-O" .PD 0 ! .IP "\fB\-O1\fR" 4 .IX Item "-O1" .PD Optimize. Optimizing compilation takes somewhat more time, and a lot *************** and \fB\-fdefer-pop\fR on all machines. *** 2817,2823 **** \&\fB\-fomit-frame-pointer\fR on machines that can support debugging even without a frame pointer. On some machines the compiler also turns on other flags. ! .Ip "\fB\-O2\fR" 4 .IX Item "-O2" Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations that do not involve a space-speed tradeoff. The compiler does not --- 2804,2810 ---- \&\fB\-fomit-frame-pointer\fR on machines that can support debugging even without a frame pointer. On some machines the compiler also turns on other flags. ! .IP "\fB\-O2\fR" 4 .IX Item "-O2" Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations that do not involve a space-speed tradeoff. The compiler does not *************** and the performance of the generated cod *** 2829,2843 **** function inlining, and register renaming. It also turns on the \&\fB\-fforce-mem\fR option on all machines and frame pointer elimination on machines where doing so does not interfere with debugging. ! .Ip "\fB\-O3\fR" 4 .IX Item "-O3" Optimize yet more. \fB\-O3\fR turns on all optimizations specified by \&\fB\-O2\fR and also turns on the \fB\-finline-functions\fR and \&\fB\-frename-registers\fR options. ! .Ip "\fB\-O0\fR" 4 .IX Item "-O0" Do not optimize. ! .Ip "\fB\-Os\fR" 4 .IX Item "-Os" Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that do not typically increase code size. It also performs further --- 2816,2833 ---- function inlining, and register renaming. It also turns on the \&\fB\-fforce-mem\fR option on all machines and frame pointer elimination on machines where doing so does not interfere with debugging. ! .Sp ! Please note the warning under \fB\-fgcse\fR about ! invoking \fB\-O2\fR on programs that use computed gotos. ! .IP "\fB\-O3\fR" 4 .IX Item "-O3" Optimize yet more. \fB\-O3\fR turns on all optimizations specified by \&\fB\-O2\fR and also turns on the \fB\-finline-functions\fR and \&\fB\-frename-registers\fR options. ! .IP "\fB\-O0\fR" 4 .IX Item "-O0" Do not optimize. ! .IP "\fB\-Os\fR" 4 .IX Item "-Os" Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that do not typically increase code size. It also performs further *************** form of \fB\-ffoo\fR would be \fB\-fno-f *** 2852,2858 **** only one of the forms is listed\-\-\-the one which is not the default. You can figure out the other form by either removing \fBno-\fR or adding it. ! .Ip "\fB\-ffloat-store\fR" 4 .IX Item "-ffloat-store" Do not store floating point variables in registers, and inhibit other options that might change whether a floating point value is taken from a --- 2842,2848 ---- only one of the forms is listed\-\-\-the one which is not the default. You can figure out the other form by either removing \fBno-\fR or adding it. ! .IP "\fB\-ffloat-store\fR" 4 .IX Item "-ffloat-store" Do not store floating point variables in registers, and inhibit other options that might change whether a floating point value is taken from a *************** x86 architecture. For most programs, th *** 2865,2896 **** good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating point. Use \fB\-ffloat-store\fR for such programs, after modifying them to store all pertinent intermediate computations into variables. ! .Ip "\fB\-fno-default-inline\fR" 4 .IX Item "-fno-default-inline" Do not make member functions inline by default merely because they are defined inside the class scope (\*(C+ only). Otherwise, when you specify \&\fB\-O\fR, member functions defined inside class scope are compiled inline by default; i.e., you don't need to add \fBinline\fR in front of the member function name. ! .Ip "\fB\-fno-defer-pop\fR" 4 .IX Item "-fno-defer-pop" Always pop the arguments to each function call as soon as that function returns. For machines which must pop arguments after a function call, the compiler normally lets arguments accumulate on the stack for several function calls and pops them all at once. ! .Ip "\fB\-fforce-mem\fR" 4 .IX Item "-fforce-mem" Force memory operands to be copied into registers before doing arithmetic on them. This produces better code by making all memory references potential common subexpressions. When they are not common subexpressions, instruction combination should eliminate the separate register-load. The \fB\-O2\fR option turns on this option. ! .Ip "\fB\-fforce-addr\fR" 4 .IX Item "-fforce-addr" Force memory address constants to be copied into registers before doing arithmetic on them. This may produce better code just as \&\fB\-fforce-mem\fR may. ! .Ip "\fB\-fomit-frame-pointer\fR" 4 .IX Item "-fomit-frame-pointer" Don't keep the frame pointer in a register for functions that don't need one. This avoids the instructions to save, set up and --- 2855,2886 ---- good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating point. Use \fB\-ffloat-store\fR for such programs, after modifying them to store all pertinent intermediate computations into variables. ! .IP "\fB\-fno-default-inline\fR" 4 .IX Item "-fno-default-inline" Do not make member functions inline by default merely because they are defined inside the class scope (\*(C+ only). Otherwise, when you specify \&\fB\-O\fR, member functions defined inside class scope are compiled inline by default; i.e., you don't need to add \fBinline\fR in front of the member function name. ! .IP "\fB\-fno-defer-pop\fR" 4 .IX Item "-fno-defer-pop" Always pop the arguments to each function call as soon as that function returns. For machines which must pop arguments after a function call, the compiler normally lets arguments accumulate on the stack for several function calls and pops them all at once. ! .IP "\fB\-fforce-mem\fR" 4 .IX Item "-fforce-mem" Force memory operands to be copied into registers before doing arithmetic on them. This produces better code by making all memory references potential common subexpressions. When they are not common subexpressions, instruction combination should eliminate the separate register-load. The \fB\-O2\fR option turns on this option. ! .IP "\fB\-fforce-addr\fR" 4 .IX Item "-fforce-addr" Force memory address constants to be copied into registers before doing arithmetic on them. This may produce better code just as \&\fB\-fforce-mem\fR may. ! .IP "\fB\-fomit-frame-pointer\fR" 4 .IX Item "-fomit-frame-pointer" Don't keep the frame pointer in a register for functions that don't need one. This avoids the instructions to save, set up and *************** the standard calling sequence automatica *** 2903,2921 **** and nothing is saved by pretending it doesn't exist. The machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls whether a target machine supports this flag. ! .Ip "\fB\-foptimize-sibling-calls\fR" 4 .IX Item "-foptimize-sibling-calls" Optimize sibling and tail recursive calls. ! .Ip "\fB\-ftrapv\fR" 4 .IX Item "-ftrapv" This option generates traps for signed overflow on addition, subtraction, multiplication operations. ! .Ip "\fB\-fno-inline\fR" 4 .IX Item "-fno-inline" Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. ! .Ip "\fB\-finline-functions\fR" 4 .IX Item "-finline-functions" Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth --- 2893,2911 ---- and nothing is saved by pretending it doesn't exist. The machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls whether a target machine supports this flag. ! .IP "\fB\-foptimize-sibling-calls\fR" 4 .IX Item "-foptimize-sibling-calls" Optimize sibling and tail recursive calls. ! .IP "\fB\-ftrapv\fR" 4 .IX Item "-ftrapv" This option generates traps for signed overflow on addition, subtraction, multiplication operations. ! .IP "\fB\-fno-inline\fR" 4 .IX Item "-fno-inline" Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. ! .IP "\fB\-finline-functions\fR" 4 .IX Item "-finline-functions" Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth *************** integrating in this way. *** 2924,2937 **** If all calls to a given function are integrated, and the function is declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as assembler code in its own right. ! .Ip "\fB\-finline-limit=\fR\fIn\fR" 4 .IX Item "-finline-limit=n" By default, gcc limits the size of functions that can be inlined. This flag allows the control of this limit for functions that are explicitly marked as inline (ie marked with the inline keyword or defined within the class definition in c++). \fIn\fR is the size of functions that can be inlined in number of pseudo instructions (not counting parameter handling). The default ! value of \fIn\fR is 10000. Increasing this value can result in more inlined code at the cost of compilation time and memory consumption. Decreasing usually makes the compilation faster and less code will be inlined (which presumably means slower programs). This option is particularly useful for programs that --- 2914,2928 ---- If all calls to a given function are integrated, and the function is declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as assembler code in its own right. ! .IP "\fB\-finline-limit=\fR\fIn\fR" 4 .IX Item "-finline-limit=n" By default, gcc limits the size of functions that can be inlined. This flag allows the control of this limit for functions that are explicitly marked as inline (ie marked with the inline keyword or defined within the class definition in c++). \fIn\fR is the size of functions that can be inlined in number of pseudo instructions (not counting parameter handling). The default ! value of \fIn\fR is 600. ! Increasing this value can result in more inlined code at the cost of compilation time and memory consumption. Decreasing usually makes the compilation faster and less code will be inlined (which presumably means slower programs). This option is particularly useful for programs that *************** use inlining heavily such as those based *** 2941,2953 **** abstract measurement of function's size. In no way, it represents a count of assembly instructions and as such its exact meaning might change from one release to an another. ! .Ip "\fB\-fkeep-inline-functions\fR" 4 .IX Item "-fkeep-inline-functions" Even if all calls to a given function are integrated, and the function is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time callable version of the function. This switch does not affect \&\f(CW\*(C`extern inline\*(C'\fR functions. ! .Ip "\fB\-fkeep-static-consts\fR" 4 .IX Item "-fkeep-static-consts" Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned on, even if the variables aren't referenced. --- 2932,2944 ---- abstract measurement of function's size. In no way, it represents a count of assembly instructions and as such its exact meaning might change from one release to an another. ! .IP "\fB\-fkeep-inline-functions\fR" 4 .IX Item "-fkeep-inline-functions" Even if all calls to a given function are integrated, and the function is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time callable version of the function. This switch does not affect \&\f(CW\*(C`extern inline\*(C'\fR functions. ! .IP "\fB\-fkeep-static-consts\fR" 4 .IX Item "-fkeep-static-consts" Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned on, even if the variables aren't referenced. *************** on, even if the variables aren't referen *** 2955,2961 **** \&\s-1GCC\s0 enables this option by default. If you want to force the compiler to check if the variable was referenced, regardless of whether or not optimization is turned on, use the \fB\-fno-keep-static-consts\fR option. ! .Ip "\fB\-fno-function-cse\fR" 4 .IX Item "-fno-function-cse" Do not put function addresses in registers; make each instruction that calls a constant function contain the function's address explicitly. --- 2946,2952 ---- \&\s-1GCC\s0 enables this option by default. If you want to force the compiler to check if the variable was referenced, regardless of whether or not optimization is turned on, use the \fB\-fno-keep-static-consts\fR option. ! .IP "\fB\-fno-function-cse\fR" 4 .IX Item "-fno-function-cse" Do not put function addresses in registers; make each instruction that calls a constant function contain the function's address explicitly. *************** calls a constant function contain the fu *** 2963,2969 **** This option results in less efficient code, but some strange hacks that alter the assembler output may be confused by the optimizations performed when this option is not used. ! .Ip "\fB\-ffast-math\fR" 4 .IX Item "-ffast-math" This option allows \s-1GCC\s0 to violate some \s-1ISO\s0 or \s-1IEEE\s0 rules and/or specifications in the interest of optimizing code for speed. For --- 2954,2960 ---- This option results in less efficient code, but some strange hacks that alter the assembler output may be confused by the optimizations performed when this option is not used. ! .IP "\fB\-ffast-math\fR" 4 .IX Item "-ffast-math" This option allows \s-1GCC\s0 to violate some \s-1ISO\s0 or \s-1IEEE\s0 rules and/or specifications in the interest of optimizing code for speed. For *************** This option should never be turned on by *** 2977,2983 **** it can result in incorrect output for programs which depend on an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for math functions. ! .Ip "\fB\-fno-math-errno\fR" 4 .IX Item "-fno-math-errno" Do not set \s-1ERRNO\s0 after calling math functions that are executed with a single instruction, e.g., sqrt. A program that relies on --- 2968,2974 ---- it can result in incorrect output for programs which depend on an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for math functions. ! .IP "\fB\-fno-math-errno\fR" 4 .IX Item "-fno-math-errno" Do not set \s-1ERRNO\s0 after calling math functions that are executed with a single instruction, e.g., sqrt. A program that relies on *************** but specific machines may handle it diff *** 2995,3050 **** .PP You can use the following flags in the rare cases when ``fine-tuning'' of optimizations to be performed is desired. ! .Ip "\fB\-fstrength-reduce\fR" 4 .IX Item "-fstrength-reduce" Perform the optimizations of loop strength reduction and elimination of iteration variables. ! .Ip "\fB\-fthread-jumps\fR" 4 .IX Item "-fthread-jumps" Perform optimizations where we check to see if a jump branches to a location where another comparison subsumed by the first is found. If so, the first branch is redirected to either the destination of the second branch or a point immediately following it, depending on whether the condition is known to be true or false. ! .Ip "\fB\-fcse-follow-jumps\fR" 4 .IX Item "-fcse-follow-jumps" In common subexpression elimination, scan through jump instructions when the target of the jump is not reached by any other path. For example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition tested is false. ! .Ip "\fB\-fcse-skip-blocks\fR" 4 .IX Item "-fcse-skip-blocks" This is similar to \fB\-fcse-follow-jumps\fR, but causes \s-1CSE\s0 to follow jumps which conditionally skip over blocks. When \s-1CSE\s0 encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause, \&\fB\-fcse-skip-blocks\fR causes \s-1CSE\s0 to follow the jump around the body of the \f(CW\*(C`if\*(C'\fR. ! .Ip "\fB\-frerun-cse-after-loop\fR" 4 .IX Item "-frerun-cse-after-loop" Re-run common subexpression elimination after loop optimizations has been performed. ! .Ip "\fB\-frerun-loop-opt\fR" 4 .IX Item "-frerun-loop-opt" Run the loop optimizer twice. ! .Ip "\fB\-fgcse\fR" 4 .IX Item "-fgcse" Perform a global common subexpression elimination pass. This pass also performs global constant and copy propagation. ! .Ip "\fB\-fdelete-null-pointer-checks\fR" 4 .IX Item "-fdelete-null-pointer-checks" Use global dataflow analysis to identify and eliminate useless null pointer checks. Programs which rely on \s-1NULL\s0 pointer dereferences \fInot\fR halting the program may not work properly with this option. Use \&\fB\-fno-delete-null-pointer-checks\fR to disable this optimizing for programs which depend on that behavior. ! .Ip "\fB\-fexpensive-optimizations\fR" 4 .IX Item "-fexpensive-optimizations" Perform a number of minor optimizations that are relatively expensive. ! .Ip "\fB\-foptimize-register-move\fR" 4 .IX Item "-foptimize-register-move" .PD 0 ! .Ip "\fB\-fregmove\fR" 4 .IX Item "-fregmove" .PD Attempt to reassign register numbers in move instructions and as --- 2986,3046 ---- .PP You can use the following flags in the rare cases when ``fine-tuning'' of optimizations to be performed is desired. ! .IP "\fB\-fstrength-reduce\fR" 4 .IX Item "-fstrength-reduce" Perform the optimizations of loop strength reduction and elimination of iteration variables. ! .IP "\fB\-fthread-jumps\fR" 4 .IX Item "-fthread-jumps" Perform optimizations where we check to see if a jump branches to a location where another comparison subsumed by the first is found. If so, the first branch is redirected to either the destination of the second branch or a point immediately following it, depending on whether the condition is known to be true or false. ! .IP "\fB\-fcse-follow-jumps\fR" 4 .IX Item "-fcse-follow-jumps" In common subexpression elimination, scan through jump instructions when the target of the jump is not reached by any other path. For example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition tested is false. ! .IP "\fB\-fcse-skip-blocks\fR" 4 .IX Item "-fcse-skip-blocks" This is similar to \fB\-fcse-follow-jumps\fR, but causes \s-1CSE\s0 to follow jumps which conditionally skip over blocks. When \s-1CSE\s0 encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause, \&\fB\-fcse-skip-blocks\fR causes \s-1CSE\s0 to follow the jump around the body of the \f(CW\*(C`if\*(C'\fR. ! .IP "\fB\-frerun-cse-after-loop\fR" 4 .IX Item "-frerun-cse-after-loop" Re-run common subexpression elimination after loop optimizations has been performed. ! .IP "\fB\-frerun-loop-opt\fR" 4 .IX Item "-frerun-loop-opt" Run the loop optimizer twice. ! .IP "\fB\-fgcse\fR" 4 .IX Item "-fgcse" Perform a global common subexpression elimination pass. This pass also performs global constant and copy propagation. ! .Sp ! \&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0 ! extension, you may get better runtime performance if you disable ! the global common subexpression elmination pass by adding ! \&\fB\-fno-gcse\fR to the command line. ! .IP "\fB\-fdelete-null-pointer-checks\fR" 4 .IX Item "-fdelete-null-pointer-checks" Use global dataflow analysis to identify and eliminate useless null pointer checks. Programs which rely on \s-1NULL\s0 pointer dereferences \fInot\fR halting the program may not work properly with this option. Use \&\fB\-fno-delete-null-pointer-checks\fR to disable this optimizing for programs which depend on that behavior. ! .IP "\fB\-fexpensive-optimizations\fR" 4 .IX Item "-fexpensive-optimizations" Perform a number of minor optimizations that are relatively expensive. ! .IP "\fB\-foptimize-register-move\fR" 4 .IX Item "-foptimize-register-move" .PD 0 ! .IP "\fB\-fregmove\fR" 4 .IX Item "-fregmove" .PD Attempt to reassign register numbers in move instructions and as *************** or higher. *** 3055,3082 **** .Sp Note \fB\-fregmove\fR and \fB\-foptimize-register-move\fR are the same optimization. ! .Ip "\fB\-fdelayed-branch\fR" 4 .IX Item "-fdelayed-branch" If supported for the target machine, attempt to reorder instructions to exploit instruction slots available after delayed branch instructions. ! .Ip "\fB\-fschedule-insns\fR" 4 .IX Item "-fschedule-insns" If supported for the target machine, attempt to reorder instructions to eliminate execution stalls due to required data being unavailable. This helps machines that have slow floating point or memory load instructions by allowing other instructions to be issued until the result of the load or floating point instruction is required. ! .Ip "\fB\-fschedule-insns2\fR" 4 .IX Item "-fschedule-insns2" Similar to \fB\-fschedule-insns\fR, but requests an additional pass of instruction scheduling after register allocation has been done. This is especially useful on machines with a relatively small number of registers and where memory load instructions take more than one cycle. ! .Ip "\fB\-ffunction-sections\fR" 4 .IX Item "-ffunction-sections" .PD 0 ! .Ip "\fB\-fdata-sections\fR" 4 .IX Item "-fdata-sections" .PD Place each function or data item into its own section in the output --- 3051,3078 ---- .Sp Note \fB\-fregmove\fR and \fB\-foptimize-register-move\fR are the same optimization. ! .IP "\fB\-fdelayed-branch\fR" 4 .IX Item "-fdelayed-branch" If supported for the target machine, attempt to reorder instructions to exploit instruction slots available after delayed branch instructions. ! .IP "\fB\-fschedule-insns\fR" 4 .IX Item "-fschedule-insns" If supported for the target machine, attempt to reorder instructions to eliminate execution stalls due to required data being unavailable. This helps machines that have slow floating point or memory load instructions by allowing other instructions to be issued until the result of the load or floating point instruction is required. ! .IP "\fB\-fschedule-insns2\fR" 4 .IX Item "-fschedule-insns2" Similar to \fB\-fschedule-insns\fR, but requests an additional pass of instruction scheduling after register allocation has been done. This is especially useful on machines with a relatively small number of registers and where memory load instructions take more than one cycle. ! .IP "\fB\-ffunction-sections\fR" 4 .IX Item "-ffunction-sections" .PD 0 ! .IP "\fB\-fdata-sections\fR" 4 .IX Item "-fdata-sections" .PD Place each function or data item into its own section in the output *************** create larger object and executable file *** 3096,3102 **** You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you specify this option and you may have problems with debugging if you specify both this option and \fB\-g\fR. ! .Ip "\fB\-fcaller-saves\fR" 4 .IX Item "-fcaller-saves" Enable values to be allocated in registers that will be clobbered by function calls, by emitting extra instructions to save and restore the --- 3092,3098 ---- You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you specify this option and you may have problems with debugging if you specify both this option and \fB\-g\fR. ! .IP "\fB\-fcaller-saves\fR" 4 .IX Item "-fcaller-saves" Enable values to be allocated in registers that will be clobbered by function calls, by emitting extra instructions to save and restore the *************** those which have no call-preserved regis *** 3108,3129 **** .Sp For all machines, optimization level 2 and higher enables this flag by default. ! .Ip "\fB\-funroll-loops\fR" 4 .IX Item "-funroll-loops" Perform the optimization of loop unrolling. This is only done for loops whose number of iterations can be determined at compile time or run time. \&\fB\-funroll-loops\fR implies both \fB\-fstrength-reduce\fR and \&\fB\-frerun-cse-after-loop\fR. ! .Ip "\fB\-funroll-all-loops\fR" 4 .IX Item "-funroll-all-loops" Perform the optimization of loop unrolling. This is done for all loops and usually makes programs run more slowly. \fB\-funroll-all-loops\fR implies \fB\-fstrength-reduce\fR as well as \fB\-frerun-cse-after-loop\fR. ! .Ip "\fB\-fmove-all-movables\fR" 4 .IX Item "-fmove-all-movables" Forces all invariant computations in loops to be moved outside the loop. ! .Ip "\fB\-freduce-all-givs\fR" 4 .IX Item "-freduce-all-givs" Forces all general-induction variables in loops to be strength-reduced. --- 3104,3125 ---- .Sp For all machines, optimization level 2 and higher enables this flag by default. ! .IP "\fB\-funroll-loops\fR" 4 .IX Item "-funroll-loops" Perform the optimization of loop unrolling. This is only done for loops whose number of iterations can be determined at compile time or run time. \&\fB\-funroll-loops\fR implies both \fB\-fstrength-reduce\fR and \&\fB\-frerun-cse-after-loop\fR. ! .IP "\fB\-funroll-all-loops\fR" 4 .IX Item "-funroll-all-loops" Perform the optimization of loop unrolling. This is done for all loops and usually makes programs run more slowly. \fB\-funroll-all-loops\fR implies \fB\-fstrength-reduce\fR as well as \fB\-frerun-cse-after-loop\fR. ! .IP "\fB\-fmove-all-movables\fR" 4 .IX Item "-fmove-all-movables" Forces all invariant computations in loops to be moved outside the loop. ! .IP "\fB\-freduce-all-givs\fR" 4 .IX Item "-freduce-all-givs" Forces all general-induction variables in loops to be strength-reduced. *************** know how use of these options affects *** 3144,3165 **** the performance of your production code. We're very interested in code that runs \fIslower\fR when these options are \fIenabled\fR. ! .Ip "\fB\-fno-peephole\fR" 4 .IX Item "-fno-peephole" .PD 0 ! .Ip "\fB\-fno-peephole2\fR" 4 .IX Item "-fno-peephole2" .PD Disable any machine-specific peephole optimizations. The difference between \fB\-fno-peephole\fR and \fB\-fno-peephole2\fR is in how they are implemented in the compiler; some targets use one, some use the other, a few use both. ! .Ip "\fB\-fbranch-probabilities\fR" 4 .IX Item "-fbranch-probabilities" After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using \&\fB\-fbranch-probabilities\fR, to improve optimizations based on guessing the path a branch might take. ! .Ip "\fB\-fno-guess-branch-probability\fR" 4 .IX Item "-fno-guess-branch-probability" Sometimes gcc will opt to guess branch probabilities when none are available from either profile directed feedback (\fB\-fprofile-arcs\fR) --- 3140,3161 ---- the performance of your production code. We're very interested in code that runs \fIslower\fR when these options are \fIenabled\fR. ! .IP "\fB\-fno-peephole\fR" 4 .IX Item "-fno-peephole" .PD 0 ! .IP "\fB\-fno-peephole2\fR" 4 .IX Item "-fno-peephole2" .PD Disable any machine-specific peephole optimizations. The difference between \fB\-fno-peephole\fR and \fB\-fno-peephole2\fR is in how they are implemented in the compiler; some targets use one, some use the other, a few use both. ! .IP "\fB\-fbranch-probabilities\fR" 4 .IX Item "-fbranch-probabilities" After running a program compiled with \fB\-fprofile-arcs\fR, you can compile it a second time using \&\fB\-fbranch-probabilities\fR, to improve optimizations based on guessing the path a branch might take. ! .IP "\fB\-fno-guess-branch-probability\fR" 4 .IX Item "-fno-guess-branch-probability" Sometimes gcc will opt to guess branch probabilities when none are available from either profile directed feedback (\fB\-fprofile-arcs\fR) *************** want different runs of the compiler to p *** 3168,3174 **** behavior; minimizing non-determinism is of paramount import. This switch allows users to reduce non-determinism, possibly at the expense of inferior optimization. ! .Ip "\fB\-fstrict-aliasing\fR" 4 .IX Item "-fstrict-aliasing" Allows the compiler to assume the strictest aliasing rules applicable to the language being compiled. For C (and \*(C+), this activates --- 3164,3170 ---- behavior; minimizing non-determinism is of paramount import. This switch allows users to reduce non-determinism, possibly at the expense of inferior optimization. ! .IP "\fB\-fstrict-aliasing\fR" 4 .IX Item "-fstrict-aliasing" Allows the compiler to assume the strictest aliasing rules applicable to the language being compiled. For C (and \*(C+), this activates *************** expected. However, this code might not: *** 3209,3218 **** \& return *ip; \& } .Ve ! .Ip "\fB\-falign-functions\fR" 4 .IX Item "-falign-functions" .PD 0 ! .Ip "\fB\-falign-functions=\fR\fIn\fR" 4 .IX Item "-falign-functions=n" .PD Align the start of functions to the next power-of-two greater than --- 3205,3214 ---- \& return *ip; \& } .Ve ! .IP "\fB\-falign-functions\fR" 4 .IX Item "-falign-functions" .PD 0 ! .IP "\fB\-falign-functions=\fR\fIn\fR" 4 .IX Item "-falign-functions=n" .PD Align the start of functions to the next power-of-two greater than *************** Some assemblers only support this flag w *** 3228,3237 **** in that case, it is rounded up. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .Ip "\fB\-falign-labels\fR" 4 .IX Item "-falign-labels" .PD 0 ! .Ip "\fB\-falign-labels=\fR\fIn\fR" 4 .IX Item "-falign-labels=n" .PD Align all branch targets to a power-of-two boundary, skipping up to --- 3224,3233 ---- in that case, it is rounded up. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .IP "\fB\-falign-labels\fR" 4 .IX Item "-falign-labels" .PD 0 ! .IP "\fB\-falign-labels=\fR\fIn\fR" 4 .IX Item "-falign-labels=n" .PD Align all branch targets to a power-of-two boundary, skipping up to *************** are greater than this value, then their *** 3244,3253 **** .Sp If \fIn\fR is not specified, use a machine-dependent default which is very likely to be \fB1\fR, meaning no alignment. ! .Ip "\fB\-falign-loops\fR" 4 .IX Item "-falign-loops" .PD 0 ! .Ip "\fB\-falign-loops=\fR\fIn\fR" 4 .IX Item "-falign-loops=n" .PD Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes --- 3240,3249 ---- .Sp If \fIn\fR is not specified, use a machine-dependent default which is very likely to be \fB1\fR, meaning no alignment. ! .IP "\fB\-falign-loops\fR" 4 .IX Item "-falign-loops" .PD 0 ! .IP "\fB\-falign-loops=\fR\fIn\fR" 4 .IX Item "-falign-loops=n" .PD Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes *************** executed many times, which will make up *** 3256,3265 **** operations. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .Ip "\fB\-falign-jumps\fR" 4 .IX Item "-falign-jumps" .PD 0 ! .Ip "\fB\-falign-jumps=\fR\fIn\fR" 4 .IX Item "-falign-jumps=n" .PD Align branch targets to a power-of-two boundary, for branch targets --- 3252,3261 ---- operations. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .IP "\fB\-falign-jumps\fR" 4 .IX Item "-falign-jumps" .PD 0 ! .IP "\fB\-falign-jumps=\fR\fIn\fR" 4 .IX Item "-falign-jumps=n" .PD Align branch targets to a power-of-two boundary, for branch targets *************** bytes like \fB\-falign-functions\fR. In *** 3268,3295 **** need be executed. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .Ip "\fB\-fssa\fR" 4 .IX Item "-fssa" Perform optimizations in static single assignment form. Each function's flow graph is translated into \s-1SSA\s0 form, optimizations are performed, and the flow graph is translated back from \s-1SSA\s0 form. Users should not specify this option, since it is not yet ready for production use. ! .Ip "\fB\-fdce\fR" 4 .IX Item "-fdce" Perform dead-code elimination in \s-1SSA\s0 form. Requires \fB\-fssa\fR. Like \&\fB\-fssa\fR, this is an experimental feature. ! .Ip "\fB\-fsingle-precision-constant\fR" 4 .IX Item "-fsingle-precision-constant" Treat floating point constant as single precision constant instead of implicitly converting it to double precision constant. ! .Ip "\fB\-frename-registers\fR" 4 .IX Item "-frename-registers" Attempt to avoid false dependencies in scheduled code by making use of registers left over after register allocation. This optimization will most benefit processors with lots of registers. It can, however, make debugging impossible, since variables will no longer stay in a ``home register''. ! .Ip "\fB\*(--param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4 .IX Item "param name=value" In some places, \s-1GCC\s0 uses various constants to control the amount of optimization that is done. For example, \s-1GCC\s0 will not inline functions --- 3264,3291 ---- need be executed. .Sp If \fIn\fR is not specified, use a machine-dependent default. ! .IP "\fB\-fssa\fR" 4 .IX Item "-fssa" Perform optimizations in static single assignment form. Each function's flow graph is translated into \s-1SSA\s0 form, optimizations are performed, and the flow graph is translated back from \s-1SSA\s0 form. Users should not specify this option, since it is not yet ready for production use. ! .IP "\fB\-fdce\fR" 4 .IX Item "-fdce" Perform dead-code elimination in \s-1SSA\s0 form. Requires \fB\-fssa\fR. Like \&\fB\-fssa\fR, this is an experimental feature. ! .IP "\fB\-fsingle-precision-constant\fR" 4 .IX Item "-fsingle-precision-constant" Treat floating point constant as single precision constant instead of implicitly converting it to double precision constant. ! .IP "\fB\-frename-registers\fR" 4 .IX Item "-frename-registers" Attempt to avoid false dependencies in scheduled code by making use of registers left over after register allocation. This optimization will most benefit processors with lots of registers. It can, however, make debugging impossible, since variables will no longer stay in a ``home register''. ! .IP "\fB\*(--param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4 .IX Item "param name=value" In some places, \s-1GCC\s0 uses various constants to control the amount of optimization that is done. For example, \s-1GCC\s0 will not inline functions *************** that contain more that a certain number *** 3297,3306 **** control some of these constants on the command-line using the \&\fB\*(--param\fR option. .Sp ! In each case, the \fIvalue\fR is a integer. The allowable choices for \&\fIname\fR are given in the following table: .RS 4 ! .Ip "\fBmax-delay-slot-insn-search\fR" 4 .IX Item "max-delay-slot-insn-search" The maximum number of instructions to consider when looking for an instruction to fill a delay slot. If more than this arbitrary number of --- 3293,3302 ---- control some of these constants on the command-line using the \&\fB\*(--param\fR option. .Sp ! In each case, the \fIvalue\fR is an integer. The allowable choices for \&\fIname\fR are given in the following table: .RS 4 ! .IP "\fBmax-delay-slot-insn-search\fR" 4 .IX Item "max-delay-slot-insn-search" The maximum number of instructions to consider when looking for an instruction to fill a delay slot. If more than this arbitrary number of *************** instructions is searched, the time savin *** 3308,3314 **** will be minimal so stop searching. Increasing values mean more aggressive optimization, making the compile time increase with probably small improvement in executable run time. ! .Ip "\fBmax-delay-slot-live-search\fR" 4 .IX Item "max-delay-slot-live-search" When trying to fill delay slots, the maximum number of instructions to consider when searching for a block with valid live register --- 3304,3310 ---- will be minimal so stop searching. Increasing values mean more aggressive optimization, making the compile time increase with probably small improvement in executable run time. ! .IP "\fBmax-delay-slot-live-search\fR" 4 .IX Item "max-delay-slot-live-search" When trying to fill delay slots, the maximum number of instructions to consider when searching for a block with valid live register *************** information. Increasing this arbitraril *** 3316,3328 **** aggressive optimization, increasing the compile time. This parameter should be removed when the delay slot code is rewritten to maintain the control-flow graph. ! .Ip "\fBmax-gcse-memory\fR" 4 .IX Item "max-gcse-memory" The approximate maximum amount of memory that will be allocated in order to perform the global common subexpression elimination optimization. If more memory than specified is required, the optimization will not be done. ! .Ip "\fBmax-inline-insns\fR" 4 .IX Item "max-inline-insns" If an function contains more than this many instructions, it will not be inlined. This option is precisely equivalent to --- 3312,3330 ---- aggressive optimization, increasing the compile time. This parameter should be removed when the delay slot code is rewritten to maintain the control-flow graph. ! .IP "\fBmax-gcse-memory\fR" 4 .IX Item "max-gcse-memory" The approximate maximum amount of memory that will be allocated in order to perform the global common subexpression elimination optimization. If more memory than specified is required, the optimization will not be done. ! .IP "\fBmax-pending-list-length\fR" 4 ! .IX Item "max-pending-list-length" ! The maximum number of pending dependancies scheduling will allow ! before flushing the current state and starting over. Large functions ! with few branches or calls can create excessively large lists which ! needlessly consume memory and resources. ! .IP "\fBmax-inline-insns\fR" 4 .IX Item "max-inline-insns" If an function contains more than this many instructions, it will not be inlined. This option is precisely equivalent to *************** If you use the \fB\-E\fR option, nothing *** 3339,3345 **** Some of these options make sense only together with \fB\-E\fR because they cause the preprocessor output to be unsuitable for actual compilation. ! .Ip "\fB\-include\fR \fIfile\fR" 4 .IX Item "-include file" Process \fIfile\fR as input before processing the regular input file. In effect, the contents of \fIfile\fR are compiled first. Any \fB\-D\fR --- 3341,3347 ---- Some of these options make sense only together with \fB\-E\fR because they cause the preprocessor output to be unsuitable for actual compilation. ! .IP "\fB\-include\fR \fIfile\fR" 4 .IX Item "-include file" Process \fIfile\fR as input before processing the regular input file. In effect, the contents of \fIfile\fR are compiled first. Any \fB\-D\fR *************** and \fB\-U\fR options on the command lin *** 3347,3353 **** \&\fB\-include\fR \fIfile\fR, regardless of the order in which they are written. All the \fB\-include\fR and \fB\-imacros\fR options are processed in the order in which they are written. ! .Ip "\fB\-imacros\fR \fIfile\fR" 4 .IX Item "-imacros file" Process \fIfile\fR as input, discarding the resulting output, before processing the regular input file. Because the output generated from --- 3349,3355 ---- \&\fB\-include\fR \fIfile\fR, regardless of the order in which they are written. All the \fB\-include\fR and \fB\-imacros\fR options are processed in the order in which they are written. ! .IP "\fB\-imacros\fR \fIfile\fR" 4 .IX Item "-imacros file" Process \fIfile\fR as input, discarding the resulting output, before processing the regular input file. Because the output generated from *************** processing the regular input file. Beca *** 3355,3388 **** is to make the macros defined in \fIfile\fR available for use in the main input. All the \fB\-include\fR and \fB\-imacros\fR options are processed in the order in which they are written. ! .Ip "\fB\-idirafter\fR \fIdir\fR" 4 .IX Item "-idirafter dir" Add the directory \fIdir\fR to the second include path. The directories on the second include path are searched when a header file is not found in any of the directories in the main include path (the one that \&\fB\-I\fR adds to). ! .Ip "\fB\-iprefix\fR \fIprefix\fR" 4 .IX Item "-iprefix prefix" Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR options. ! .Ip "\fB\-iwithprefix\fR \fIdir\fR" 4 .IX Item "-iwithprefix dir" Add a directory to the second include path. The directory's name is made by concatenating \fIprefix\fR and \fIdir\fR, where \fIprefix\fR was specified previously with \fB\-iprefix\fR. If you have not specified a prefix yet, the directory containing the installed passes of the compiler is used as the default. ! .Ip "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 .IX Item "-iwithprefixbefore dir" Add a directory to the main include path. The directory's name is made by concatenating \fIprefix\fR and \fIdir\fR, as in the case of \&\fB\-iwithprefix\fR. ! .Ip "\fB\-isystem\fR \fIdir\fR" 4 .IX Item "-isystem dir" Add a directory to the beginning of the second include path, marking it as a system directory, so that it gets the same special treatment as is applied to the standard system directories. ! .Ip "\fB\-nostdinc\fR" 4 .IX Item "-nostdinc" Do not search the standard system directories for header files. Only the directories you have specified with \fB\-I\fR options (and the --- 3357,3390 ---- is to make the macros defined in \fIfile\fR available for use in the main input. All the \fB\-include\fR and \fB\-imacros\fR options are processed in the order in which they are written. ! .IP "\fB\-idirafter\fR \fIdir\fR" 4 .IX Item "-idirafter dir" Add the directory \fIdir\fR to the second include path. The directories on the second include path are searched when a header file is not found in any of the directories in the main include path (the one that \&\fB\-I\fR adds to). ! .IP "\fB\-iprefix\fR \fIprefix\fR" 4 .IX Item "-iprefix prefix" Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR options. ! .IP "\fB\-iwithprefix\fR \fIdir\fR" 4 .IX Item "-iwithprefix dir" Add a directory to the second include path. The directory's name is made by concatenating \fIprefix\fR and \fIdir\fR, where \fIprefix\fR was specified previously with \fB\-iprefix\fR. If you have not specified a prefix yet, the directory containing the installed passes of the compiler is used as the default. ! .IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4 .IX Item "-iwithprefixbefore dir" Add a directory to the main include path. The directory's name is made by concatenating \fIprefix\fR and \fIdir\fR, as in the case of \&\fB\-iwithprefix\fR. ! .IP "\fB\-isystem\fR \fIdir\fR" 4 .IX Item "-isystem dir" Add a directory to the beginning of the second include path, marking it as a system directory, so that it gets the same special treatment as is applied to the standard system directories. ! .IP "\fB\-nostdinc\fR" 4 .IX Item "-nostdinc" Do not search the standard system directories for header files. Only the directories you have specified with \fB\-I\fR options (and the *************** current directory, if appropriate) are s *** 3390,3396 **** .Sp By using both \fB\-nostdinc\fR and \fB\-I-\fR, you can limit the include-file search path to only those directories you specify explicitly. ! .Ip "\fB\-remap\fR" 4 .IX Item "-remap" When searching for a header file in a directory, remap file names if a file named \fIheader.gcc\fR exists in that directory. This can be used --- 3392,3398 ---- .Sp By using both \fB\-nostdinc\fR and \fB\-I-\fR, you can limit the include-file search path to only those directories you specify explicitly. ! .IP "\fB\-remap\fR" 4 .IX Item "-remap" When searching for a header file in a directory, remap file names if a file named \fIheader.gcc\fR exists in that directory. This can be used *************** to work around limitations of file syste *** 3398,3420 **** The \fIheader.gcc\fR file should contain a series of lines with two tokens on each line: the first token is the name to map, and the second token is the actual name to use. ! .Ip "\fB\-undef\fR" 4 .IX Item "-undef" Do not predefine any nonstandard macros. (Including architecture flags). ! .Ip "\fB\-E\fR" 4 .IX Item "-E" Run only the C preprocessor. Preprocess all the C source files specified and output the results to standard output or to the specified output file. ! .Ip "\fB\-C\fR" 4 .IX Item "-C" Tell the preprocessor not to discard comments. Used with the \&\fB\-E\fR option. ! .Ip "\fB\-P\fR" 4 .IX Item "-P" Tell the preprocessor not to generate \fB#line\fR directives. Used with the \fB\-E\fR option. ! .Ip "\fB\-M\fR" 4 .IX Item "-M" Instead of outputting the result of preprocessing, output a rule suitable for \f(CW\*(C`make\*(C'\fR describing the dependencies of the main source --- 3400,3422 ---- The \fIheader.gcc\fR file should contain a series of lines with two tokens on each line: the first token is the name to map, and the second token is the actual name to use. ! .IP "\fB\-undef\fR" 4 .IX Item "-undef" Do not predefine any nonstandard macros. (Including architecture flags). ! .IP "\fB\-E\fR" 4 .IX Item "-E" Run only the C preprocessor. Preprocess all the C source files specified and output the results to standard output or to the specified output file. ! .IP "\fB\-C\fR" 4 .IX Item "-C" Tell the preprocessor not to discard comments. Used with the \&\fB\-E\fR option. ! .IP "\fB\-P\fR" 4 .IX Item "-P" Tell the preprocessor not to generate \fB#line\fR directives. Used with the \fB\-E\fR option. ! .IP "\fB\-M\fR" 4 .IX Item "-M" Instead of outputting the result of preprocessing, output a rule suitable for \f(CW\*(C`make\*(C'\fR describing the dependencies of the main source *************** object file suffix. If there are many i *** 3426,3437 **** rule is split into several lines using \fB\e\fR\-newline. .Sp \&\fB\-M\fR implies \fB\-E\fR. ! .Ip "\fB\-MM\fR" 4 .IX Item "-MM" Like \fB\-M\fR, but mention only the files included with \fB#include "\fR\fIfile\fR\fB"\fR. System header files included with \fB#include <\fR\fIfile\fR\fB>\fR are omitted. ! .Ip "\fB\-MD\fR" 4 .IX Item "-MD" Like \fB\-M\fR but the dependency information is written to a file rather than stdout. \f(CW\*(C`gcc\*(C'\fR will use the same file name and --- 3428,3439 ---- rule is split into several lines using \fB\e\fR\-newline. .Sp \&\fB\-M\fR implies \fB\-E\fR. ! .IP "\fB\-MM\fR" 4 .IX Item "-MM" Like \fB\-M\fR, but mention only the files included with \fB#include "\fR\fIfile\fR\fB"\fR. System header files included with \fB#include <\fR\fIfile\fR\fB>\fR are omitted. ! .IP "\fB\-MD\fR" 4 .IX Item "-MD" Like \fB\-M\fR but the dependency information is written to a file rather than stdout. \f(CW\*(C`gcc\*(C'\fR will use the same file name and *************** unless you also specify \fB\-MG\fR. *** 3444,3454 **** With Mach, you can use the utility \f(CW\*(C`md\*(C'\fR to merge multiple dependency files into a single dependency file suitable for using with the \fBmake\fR command. ! .Ip "\fB\-MMD\fR" 4 .IX Item "-MMD" Like \fB\-MD\fR except mention only user header files, not system \&\-header files. ! .Ip "\fB\-MF\fR \fIfile\fR" 4 .IX Item "-MF file" When used with \fB\-M\fR or \fB\-MM\fR, specifies a file to write the dependencies to. This allows the preprocessor to write the preprocessed --- 3446,3456 ---- With Mach, you can use the utility \f(CW\*(C`md\*(C'\fR to merge multiple dependency files into a single dependency file suitable for using with the \fBmake\fR command. ! .IP "\fB\-MMD\fR" 4 .IX Item "-MMD" Like \fB\-MD\fR except mention only user header files, not system \&\-header files. ! .IP "\fB\-MF\fR \fIfile\fR" 4 .IX Item "-MF file" When used with \fB\-M\fR or \fB\-MM\fR, specifies a file to write the dependencies to. This allows the preprocessor to write the preprocessed *************** the rules to stdout and suppresses norma *** 3457,3463 **** .Sp Another way to specify output of a \f(CW\*(C`make\*(C'\fR rule is by setting the environment variable \fB\s-1DEPENDENCIES_OUTPUT\s0\fR. ! .Ip "\fB\-MG\fR" 4 .IX Item "-MG" When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing header files as generated files and assume they live in the same --- 3459,3465 ---- .Sp Another way to specify output of a \f(CW\*(C`make\*(C'\fR rule is by setting the environment variable \fB\s-1DEPENDENCIES_OUTPUT\s0\fR. ! .IP "\fB\-MG\fR" 4 .IX Item "-MG" When used with \fB\-M\fR or \fB\-MM\fR, \fB\-MG\fR says to treat missing header files as generated files and assume they live in the same *************** directory as the source file. It suppre *** 3465,3471 **** missing header file is ordinarily an error. .Sp This feature is used in automatic updating of makefiles. ! .Ip "\fB\-MP\fR" 4 .IX Item "-MP" This option instructs \s-1CPP\s0 to add a phony target for each dependency other than the main file, causing each to depend on nothing. These --- 3467,3473 ---- missing header file is ordinarily an error. .Sp This feature is used in automatic updating of makefiles. ! .IP "\fB\-MP\fR" 4 .IX Item "-MP" This option instructs \s-1CPP\s0 to add a phony target for each dependency other than the main file, causing each to depend on nothing. These *************** This is typical output:\- *** 3480,3489 **** .Vb 1 \& /tmp/test.h: .Ve ! .Ip "\fB\-MQ\fR \fItarget\fR" 4 .IX Item "-MQ target" .PD 0 ! .Ip "\fB\-MT\fR \fItarget\fR" 4 .IX Item "-MT target" .PD By default \s-1CPP\s0 uses the main file name, including any path, and appends --- 3482,3491 ---- .Vb 1 \& /tmp/test.h: .Ve ! .IP "\fB\-MQ\fR \fItarget\fR" 4 .IX Item "-MQ target" .PD 0 ! .IP "\fB\-MT\fR \fItarget\fR" 4 .IX Item "-MT target" .PD By default \s-1CPP\s0 uses the main file name, including any path, and appends *************** but \fB\-MQ '$(objpfx)foo.o'\fR gives *** 3509,3528 **** .Ve The default target is automatically quoted, as if it were given with \&\fB\-MQ\fR. ! .Ip "\fB\-H\fR" 4 .IX Item "-H" Print the name of each header file used, in addition to other normal activities. ! .Ip "\fB\-A\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR" 4 .IX Item "-Aquestion(answer)" Assert the answer \fIanswer\fR for \fIquestion\fR, in case it is tested with a preprocessing conditional such as \fB#if #\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR. \fB\-A-\fR disables the standard assertions that normally describe the target machine. ! .Ip "\fB\-D\fR\fImacro\fR" 4 .IX Item "-Dmacro" Define macro \fImacro\fR with the string \fB1\fR as its definition. ! .Ip "\fB\-D\fR\fImacro\fR\fB=\fR\fIdefn\fR" 4 .IX Item "-Dmacro=defn" Define macro \fImacro\fR as \fIdefn\fR. All instances of \fB\-D\fR on the command line are processed before any \fB\-U\fR options. --- 3511,3530 ---- .Ve The default target is automatically quoted, as if it were given with \&\fB\-MQ\fR. ! .IP "\fB\-H\fR" 4 .IX Item "-H" Print the name of each header file used, in addition to other normal activities. ! .IP "\fB\-A\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR" 4 .IX Item "-Aquestion(answer)" Assert the answer \fIanswer\fR for \fIquestion\fR, in case it is tested with a preprocessing conditional such as \fB#if #\fR\fIquestion\fR\fB(\fR\fIanswer\fR\fB)\fR. \fB\-A-\fR disables the standard assertions that normally describe the target machine. ! .IP "\fB\-D\fR\fImacro\fR" 4 .IX Item "-Dmacro" Define macro \fImacro\fR with the string \fB1\fR as its definition. ! .IP "\fB\-D\fR\fImacro\fR\fB=\fR\fIdefn\fR" 4 .IX Item "-Dmacro=defn" Define macro \fImacro\fR as \fIdefn\fR. All instances of \fB\-D\fR on the command line are processed before any \fB\-U\fR options. *************** the command line are processed before an *** 3530,3536 **** Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the order in which they are written. ! .Ip "\fB\-U\fR\fImacro\fR" 4 .IX Item "-Umacro" Undefine macro \fImacro\fR. \fB\-U\fR options are evaluated after all \&\fB\-D\fR options, but before any \fB\-include\fR and \fB\-imacros\fR --- 3532,3538 ---- Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the order in which they are written. ! .IP "\fB\-U\fR\fImacro\fR" 4 .IX Item "-Umacro" Undefine macro \fImacro\fR. \fB\-U\fR options are evaluated after all \&\fB\-D\fR options, but before any \fB\-include\fR and \fB\-imacros\fR *************** options. *** 3539,3562 **** Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the order in which they are written. ! .Ip "\fB\-dM\fR" 4 .IX Item "-dM" Tell the preprocessor to output only a list of the macro definitions that are in effect at the end of preprocessing. Used with the \fB\-E\fR option. ! .Ip "\fB\-dD\fR" 4 .IX Item "-dD" Tell the preprocessing to pass all macro definitions into the output, in their proper sequence in the rest of the output. ! .Ip "\fB\-dN\fR" 4 .IX Item "-dN" Like \fB\-dD\fR except that the macro arguments and contents are omitted. Only \fB#define\fR \fIname\fR is included in the output. ! .Ip "\fB\-dI\fR" 4 .IX Item "-dI" Output \fB#include\fR directives in addition to the result of preprocessing. ! .Ip "\fB\-fpreprocessed\fR" 4 .IX Item "-fpreprocessed" Indicate to the preprocessor that the input file has already been preprocessed. This suppresses things like macro expansion, trigraph --- 3541,3564 ---- Any \fB\-D\fR and \fB\-U\fR options on the command line are processed in order, and always before \fB\-imacros\fR \fIfile\fR, regardless of the order in which they are written. ! .IP "\fB\-dM\fR" 4 .IX Item "-dM" Tell the preprocessor to output only a list of the macro definitions that are in effect at the end of preprocessing. Used with the \fB\-E\fR option. ! .IP "\fB\-dD\fR" 4 .IX Item "-dD" Tell the preprocessing to pass all macro definitions into the output, in their proper sequence in the rest of the output. ! .IP "\fB\-dN\fR" 4 .IX Item "-dN" Like \fB\-dD\fR except that the macro arguments and contents are omitted. Only \fB#define\fR \fIname\fR is included in the output. ! .IP "\fB\-dI\fR" 4 .IX Item "-dI" Output \fB#include\fR directives in addition to the result of preprocessing. ! .IP "\fB\-fpreprocessed\fR" 4 .IX Item "-fpreprocessed" Indicate to the preprocessor that the input file has already been preprocessed. This suppresses things like macro expansion, trigraph *************** for the front ends. *** 3567,3573 **** \&\fB\-fpreprocessed\fR is implicit if the input file has one of the extensions \fBi\fR, \fBii\fR or \fBmi\fR indicating it has already been preprocessed. ! .Ip "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Process \s-1ISO\s0 standard trigraph sequences. These are three-character sequences, all starting with \fB??\fR, that are defined by \s-1ISO\s0 C to --- 3569,3575 ---- \&\fB\-fpreprocessed\fR is implicit if the input file has one of the extensions \fBi\fR, \fBii\fR or \fBmi\fR indicating it has already been preprocessed. ! .IP "\fB\-trigraphs\fR" 4 .IX Item "-trigraphs" Process \s-1ISO\s0 standard trigraph sequences. These are three-character sequences, all starting with \fB??\fR, that are defined by \s-1ISO\s0 C to *************** converts them. See the \fB\-std\fR and *** 3578,3608 **** .Sp The nine trigraph sequences are .RS 4 ! .Ip "\fB??(\fR" 4 .IX Item "??(" @expansion{} \fB[\fR ! .Ip "\fB??)\fR" 4 .IX Item "??)" @expansion{} \fB]\fR ! .Ip "\fB??<\fR" 4 .IX Item "??<" @expansion{} \fB{\fR ! .Ip "\fB??>\fR" 4 .IX Item "??>" @expansion{} \fB}\fR ! .Ip "\fB??=\fR" 4 .IX Item "??=" @expansion{} \fB#\fR ! .Ip "\fB??/\fR" 4 .IX Item "??/" @expansion{} \fB\e\fR ! .Ip "\fB??'\fR" 4 .IX Item "??'" @expansion{} \fB^\fR ! .Ip "\fB??!\fR" 4 .IX Item "??!" @expansion{} \fB|\fR ! .Ip "\fB??-\fR" 4 .IX Item "??-" @expansion{} \fB~\fR .RE --- 3580,3610 ---- .Sp The nine trigraph sequences are .RS 4 ! .IP "\fB??(\fR" 4 .IX Item "??(" @expansion{} \fB[\fR ! .IP "\fB??)\fR" 4 .IX Item "??)" @expansion{} \fB]\fR ! .IP "\fB??<\fR" 4 .IX Item "??<" @expansion{} \fB{\fR ! .IP "\fB??>\fR" 4 .IX Item "??>" @expansion{} \fB}\fR ! .IP "\fB??=\fR" 4 .IX Item "??=" @expansion{} \fB#\fR ! .IP "\fB??/\fR" 4 .IX Item "??/" @expansion{} \fB\e\fR ! .IP "\fB??'\fR" 4 .IX Item "??'" @expansion{} \fB^\fR ! .IP "\fB??!\fR" 4 .IX Item "??!" @expansion{} \fB|\fR ! .IP "\fB??-\fR" 4 .IX Item "??-" @expansion{} \fB~\fR .RE *************** Trigraph support is not popular, so many *** 3612,3625 **** properly. Portable code should not rely on trigraphs being either converted or ignored. .RE ! .Ip "\fB\-Wp,\fR\fIoption\fR" 4 .IX Item "-Wp,option" Pass \fIoption\fR as an option to the preprocessor. If \fIoption\fR contains commas, it is split into multiple options at the commas. .Sh "Passing Options to the Assembler" .IX Subsection "Passing Options to the Assembler" You can pass options to the assembler. ! .Ip "\fB\-Wa,\fR\fIoption\fR" 4 .IX Item "-Wa,option" Pass \fIoption\fR as an option to the assembler. If \fIoption\fR contains commas, it is split into multiple options at the commas. --- 3614,3627 ---- properly. Portable code should not rely on trigraphs being either converted or ignored. .RE ! .IP "\fB\-Wp,\fR\fIoption\fR" 4 .IX Item "-Wp,option" Pass \fIoption\fR as an option to the preprocessor. If \fIoption\fR contains commas, it is split into multiple options at the commas. .Sh "Passing Options to the Assembler" .IX Subsection "Passing Options to the Assembler" You can pass options to the assembler. ! .IP "\fB\-Wa,\fR\fIoption\fR" 4 .IX Item "-Wa,option" Pass \fIoption\fR as an option to the assembler. If \fIoption\fR contains commas, it is split into multiple options at the commas. *************** contains commas, it is split into multip *** 3628,3651 **** These options come into play when the compiler links object files into an executable output file. They are meaningless if the compiler is not doing a link step. ! .Ip "\fIobject-file-name\fR" 4 .IX Item "object-file-name" A file name that does not end in a special recognized suffix is considered to name an object file or library. (Object files are distinguished from libraries by the linker according to the file contents.) If linking is done, these object files are used as input to the linker. ! .Ip "\fB\-c\fR" 4 .IX Item "-c" .PD 0 ! .Ip "\fB\-S\fR" 4 .IX Item "-S" ! .Ip "\fB\-E\fR" 4 .IX Item "-E" .PD If any of these options is used, then the linker is not run, and object file names should not be used as arguments. ! .Ip "\fB\-l\fR\fIlibrary\fR" 4 .IX Item "-llibrary" Search the library named \fIlibrary\fR when linking. .Sp --- 3630,3653 ---- These options come into play when the compiler links object files into an executable output file. They are meaningless if the compiler is not doing a link step. ! .IP "\fIobject-file-name\fR" 4 .IX Item "object-file-name" A file name that does not end in a special recognized suffix is considered to name an object file or library. (Object files are distinguished from libraries by the linker according to the file contents.) If linking is done, these object files are used as input to the linker. ! .IP "\fB\-c\fR" 4 .IX Item "-c" .PD 0 ! .IP "\fB\-S\fR" 4 .IX Item "-S" ! .IP "\fB\-E\fR" 4 .IX Item "-E" .PD If any of these options is used, then the linker is not run, and object file names should not be used as arguments. ! .IP "\fB\-l\fR\fIlibrary\fR" 4 .IX Item "-llibrary" Search the library named \fIlibrary\fR when linking. .Sp *************** ordinary object file, it is linked in th *** 3670,3685 **** difference between using an \fB\-l\fR option and specifying a file name is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR and searches several directories. ! .Ip "\fB\-lobjc\fR" 4 .IX Item "-lobjc" You need this special case of the \fB\-l\fR option in order to link an Objective C program. ! .Ip "\fB\-nostartfiles\fR" 4 .IX Item "-nostartfiles" Do not use the standard system startup files when linking. The standard system libraries are used normally, unless \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR is used. ! .Ip "\fB\-nodefaultlibs\fR" 4 .IX Item "-nodefaultlibs" Do not use the standard system libraries when linking. Only the libraries you specify will be passed to the linker. --- 3672,3687 ---- difference between using an \fB\-l\fR option and specifying a file name is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR and searches several directories. ! .IP "\fB\-lobjc\fR" 4 .IX Item "-lobjc" You need this special case of the \fB\-l\fR option in order to link an Objective C program. ! .IP "\fB\-nostartfiles\fR" 4 .IX Item "-nostartfiles" Do not use the standard system startup files when linking. The standard system libraries are used normally, unless \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR is used. ! .IP "\fB\-nodefaultlibs\fR" 4 .IX Item "-nodefaultlibs" Do not use the standard system libraries when linking. Only the libraries you specify will be passed to the linker. *************** for System V (and \s-1ISO\s0 C) environm *** 3689,3695 **** \&\s-1BSD\s0 environments. These entries are usually resolved by entries in libc. These entry points should be supplied through some other mechanism when this option is specified. ! .Ip "\fB\-nostdlib\fR" 4 .IX Item "-nostdlib" Do not use the standard system startup files or libraries when linking. No startup files and only the libraries you specify will be passed to --- 3691,3697 ---- \&\s-1BSD\s0 environments. These entries are usually resolved by entries in libc. These entry points should be supplied through some other mechanism when this option is specified. ! .IP "\fB\-nostdlib\fR" 4 .IX Item "-nostdlib" Do not use the standard system startup files or libraries when linking. No startup files and only the libraries you specify will be passed to *************** or \fB\-nodefaultlibs\fR you should usua *** 3710,3733 **** This ensures that you have no unresolved references to internal \s-1GCC\s0 library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+ constructors will be called.) ! .Ip "\fB\-s\fR" 4 .IX Item "-s" Remove all symbol table and relocation information from the executable. ! .Ip "\fB\-static\fR" 4 .IX Item "-static" On systems that support dynamic linking, this prevents linking with the shared libraries. On other systems, this option has no effect. ! .Ip "\fB\-shared\fR" 4 .IX Item "-shared" Produce a shared object which can then be linked with other objects to form an executable. Not all systems support this option. For predictable results, you must also specify the same set of options that were used to generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) when you specify this option.[1] ! .Ip "\fB\-shared-libgcc\fR" 4 .IX Item "-shared-libgcc" .PD 0 ! .Ip "\fB\-static-libgcc\fR" 4 .IX Item "-static-libgcc" .PD On systems that provide \fIlibgcc\fR as a shared library, these options --- 3712,3735 ---- This ensures that you have no unresolved references to internal \s-1GCC\s0 library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+ constructors will be called.) ! .IP "\fB\-s\fR" 4 .IX Item "-s" Remove all symbol table and relocation information from the executable. ! .IP "\fB\-static\fR" 4 .IX Item "-static" On systems that support dynamic linking, this prevents linking with the shared libraries. On other systems, this option has no effect. ! .IP "\fB\-shared\fR" 4 .IX Item "-shared" Produce a shared object which can then be linked with other objects to form an executable. Not all systems support this option. For predictable results, you must also specify the same set of options that were used to generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions) when you specify this option.[1] ! .IP "\fB\-shared-libgcc\fR" 4 .IX Item "-shared-libgcc" .PD 0 ! .IP "\fB\-static-libgcc\fR" 4 .IX Item "-static-libgcc" .PD On systems that provide \fIlibgcc\fR as a shared library, these options *************** for \*(C+ programs that is typically the *** 3751,3763 **** However, when linking a main executable written in C, you must explicitly say \fB\-shared-libgcc\fR if you want to use the shared \&\fIlibgcc\fR. ! .Ip "\fB\-symbolic\fR" 4 .IX Item "-symbolic" Bind references to global symbols when building a shared object. Warn about any unresolved references (unless overridden by the link editor option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support this option. ! .Ip "\fB\-Xlinker\fR \fIoption\fR" 4 .IX Item "-Xlinker option" Pass \fIoption\fR as an option to the linker. You can use this to supply system-specific linker options which \s-1GCC\s0 does not know how to --- 3753,3765 ---- However, when linking a main executable written in C, you must explicitly say \fB\-shared-libgcc\fR if you want to use the shared \&\fIlibgcc\fR. ! .IP "\fB\-symbolic\fR" 4 .IX Item "-symbolic" Bind references to global symbols when building a shared object. Warn about any unresolved references (unless overridden by the link editor option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support this option. ! .IP "\fB\-Xlinker\fR \fIoption\fR" 4 .IX Item "-Xlinker option" Pass \fIoption\fR as an option to the linker. You can use this to supply system-specific linker options which \s-1GCC\s0 does not know how to *************** For example, to pass \fB\-assert definit *** 3769,3779 **** \&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire string as a single argument, which is not what the linker expects. ! .Ip "\fB\-Wl,\fR\fIoption\fR" 4 .IX Item "-Wl,option" Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains commas, it is split into multiple options at the commas. ! .Ip "\fB\-u\fR \fIsymbol\fR" 4 .IX Item "-u symbol" Pretend the symbol \fIsymbol\fR is undefined, to force linking of library modules to define it. You can use \fB\-u\fR multiple times with --- 3771,3781 ---- \&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire string as a single argument, which is not what the linker expects. ! .IP "\fB\-Wl,\fR\fIoption\fR" 4 .IX Item "-Wl,option" Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains commas, it is split into multiple options at the commas. ! .IP "\fB\-u\fR \fIsymbol\fR" 4 .IX Item "-u symbol" Pretend the symbol \fIsymbol\fR is undefined, to force linking of library modules to define it. You can use \fB\-u\fR multiple times with *************** different symbols to force loading of ad *** 3782,3788 **** .IX Subsection "Options for Directory Search" These options specify directories to search for header files, for libraries and for parts of the compiler: ! .Ip "\fB\-I\fR\fIdir\fR" 4 .IX Item "-Idir" Add the directory \fIdir\fR to the head of the list of directories to be searched for header files. This can be used to override a system header --- 3784,3790 ---- .IX Subsection "Options for Directory Search" These options specify directories to search for header files, for libraries and for parts of the compiler: ! .IP "\fB\-I\fR\fIdir\fR" 4 .IX Item "-Idir" Add the directory \fIdir\fR to the head of the list of directories to be searched for header files. This can be used to override a system header *************** not use this option to add directories t *** 3792,3798 **** system header files (use \fB\-isystem\fR for that). If you use more than one \fB\-I\fR option, the directories are scanned in left-to-right order; the standard system directories come after. ! .Ip "\fB\-I-\fR" 4 .IX Item "-I-" Any directories you specify with \fB\-I\fR options before the \fB\-I-\fR option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR; --- 3794,3800 ---- system header files (use \fB\-isystem\fR for that). If you use more than one \fB\-I\fR option, the directories are scanned in left-to-right order; the standard system directories come after. ! .IP "\fB\-I-\fR" 4 .IX Item "-I-" Any directories you specify with \fB\-I\fR options before the \fB\-I-\fR option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR; *************** by default, but it is often satisfactory *** 3814,3824 **** \&\fB\-I-\fR does not inhibit the use of the standard system directories for header files. Thus, \fB\-I-\fR and \fB\-nostdinc\fR are independent. ! .Ip "\fB\-L\fR\fIdir\fR" 4 .IX Item "-Ldir" Add directory \fIdir\fR to the list of directories to be searched for \fB\-l\fR. ! .Ip "\fB\-B\fR\fIprefix\fR" 4 .IX Item "-Bprefix" This option specifies where to find the executables, libraries, include files, and data files of the compiler itself. --- 3816,3826 ---- \&\fB\-I-\fR does not inhibit the use of the standard system directories for header files. Thus, \fB\-I-\fR and \fB\-nostdinc\fR are independent. ! .IP "\fB\-L\fR\fIdir\fR" 4 .IX Item "-Ldir" Add directory \fIdir\fR to the list of directories to be searched for \fB\-l\fR. ! .IP "\fB\-B\fR\fIprefix\fR" 4 .IX Item "-Bprefix" This option specifies where to find the executables, libraries, include files, and data files of the compiler itself. *************** out of the link if it is not found by th *** 3850,3856 **** .Sp Another way to specify a prefix much like the \fB\-B\fR prefix is to use the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR. ! .Ip "\fB\-specs=\fR\fIfile\fR" 4 .IX Item "-specs=file" Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR file, in order to override the defaults that the \fIgcc\fR driver --- 3852,3858 ---- .Sp Another way to specify a prefix much like the \fB\-B\fR prefix is to use the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR. ! .IP "\fB\-specs=\fR\fIfile\fR" 4 .IX Item "-specs=file" Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR file, in order to override the defaults that the \fIgcc\fR driver *************** installed side by side. Then you specif *** 3870,3876 **** In addition, older and newer versions of \s-1GCC\s0 can be installed side by side. One of them (probably the newest) will be the default, but you may sometimes wish to use another. ! .Ip "\fB\-b\fR \fImachine\fR" 4 .IX Item "-b machine" The argument \fImachine\fR specifies the target machine for compilation. This is useful when you have installed \s-1GCC\s0 as a cross-compiler. --- 3872,3878 ---- In addition, older and newer versions of \s-1GCC\s0 can be installed side by side. One of them (probably the newest) will be the default, but you may sometimes wish to use another. ! .IP "\fB\-b\fR \fImachine\fR" 4 .IX Item "-b machine" The argument \fImachine\fR specifies the target machine for compilation. This is useful when you have installed \s-1GCC\s0 as a cross-compiler. *************** would specify \fB\-b i386v\fR to run tha *** 3883,3889 **** .Sp When you do not specify \fB\-b\fR, it normally means to compile for the same type of machine that you are using. ! .Ip "\fB\-V\fR \fIversion\fR" 4 .IX Item "-V version" The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run. This is useful when multiple versions are installed. For example, --- 3885,3891 ---- .Sp When you do not specify \fB\-b\fR, it normally means to compile for the same type of machine that you are using. ! .IP "\fB\-V\fR \fIversion\fR" 4 .IX Item "-V version" The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run. This is useful when multiple versions are installed. For example, *************** These are the \fB\-m\fR options defined *** 3958,3967 **** values for these options depends on which style of 68000 was selected when the compiler was configured; the defaults for the most common choices are given below. ! .Ip "\fB\-m68000\fR" 4 .IX Item "-m68000" .PD 0 ! .Ip "\fB\-mc68000\fR" 4 .IX Item "-mc68000" .PD Generate output for a 68000. This is the default --- 3960,3969 ---- values for these options depends on which style of 68000 was selected when the compiler was configured; the defaults for the most common choices are given below. ! .IP "\fB\-m68000\fR" 4 .IX Item "-m68000" .PD 0 ! .IP "\fB\-mc68000\fR" 4 .IX Item "-mc68000" .PD Generate output for a 68000. This is the default *************** when the compiler is configured for 6800 *** 3969,3992 **** .Sp Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core, including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356. ! .Ip "\fB\-m68020\fR" 4 .IX Item "-m68020" .PD 0 ! .Ip "\fB\-mc68020\fR" 4 .IX Item "-mc68020" .PD Generate output for a 68020. This is the default when the compiler is configured for 68020\-based systems. ! .Ip "\fB\-m68881\fR" 4 .IX Item "-m68881" Generate output containing 68881 instructions for floating point. This is the default for most 68020 systems unless \fB\*(--nfp\fR was specified when the compiler was configured. ! .Ip "\fB\-m68030\fR" 4 .IX Item "-m68030" Generate output for a 68030. This is the default when the compiler is configured for 68030\-based systems. ! .Ip "\fB\-m68040\fR" 4 .IX Item "-m68040" Generate output for a 68040. This is the default when the compiler is configured for 68040\-based systems. --- 3971,3994 ---- .Sp Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core, including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356. ! .IP "\fB\-m68020\fR" 4 .IX Item "-m68020" .PD 0 ! .IP "\fB\-mc68020\fR" 4 .IX Item "-mc68020" .PD Generate output for a 68020. This is the default when the compiler is configured for 68020\-based systems. ! .IP "\fB\-m68881\fR" 4 .IX Item "-m68881" Generate output containing 68881 instructions for floating point. This is the default for most 68020 systems unless \fB\*(--nfp\fR was specified when the compiler was configured. ! .IP "\fB\-m68030\fR" 4 .IX Item "-m68030" Generate output for a 68030. This is the default when the compiler is configured for 68030\-based systems. ! .IP "\fB\-m68040\fR" 4 .IX Item "-m68040" Generate output for a 68040. This is the default when the compiler is configured for 68040\-based systems. *************** configured for 68040\-based systems. *** 3994,4000 **** This option inhibits the use of 68881/68882 instructions that have to be emulated by software on the 68040. Use this option if your 68040 does not have code to emulate those instructions. ! .Ip "\fB\-m68060\fR" 4 .IX Item "-m68060" Generate output for a 68060. This is the default when the compiler is configured for 68060\-based systems. --- 3996,4002 ---- This option inhibits the use of 68881/68882 instructions that have to be emulated by software on the 68040. Use this option if your 68040 does not have code to emulate those instructions. ! .IP "\fB\-m68060\fR" 4 .IX Item "-m68060" Generate output for a 68060. This is the default when the compiler is configured for 68060\-based systems. *************** configured for 68060\-based systems. *** 4002,4008 **** This option inhibits the use of 68020 and 68881/68882 instructions that have to be emulated by software on the 68060. Use this option if your 68060 does not have code to emulate those instructions. ! .Ip "\fB\-mcpu32\fR" 4 .IX Item "-mcpu32" Generate output for a \s-1CPU32\s0. This is the default when the compiler is configured for CPU32\-based systems. --- 4004,4010 ---- This option inhibits the use of 68020 and 68881/68882 instructions that have to be emulated by software on the 68060. Use this option if your 68060 does not have code to emulate those instructions. ! .IP "\fB\-mcpu32\fR" 4 .IX Item "-mcpu32" Generate output for a \s-1CPU32\s0. This is the default when the compiler is configured for CPU32\-based systems. *************** when the compiler is configured for CPU3 *** 4010,4038 **** Use this option for microcontrollers with a \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334, 68336, 68340, 68341, 68349 and 68360. ! .Ip "\fB\-m5200\fR" 4 .IX Item "-m5200" Generate output for a 520X ``coldfire'' family cpu. This is the default when the compiler is configured for 520X-based systems. .Sp Use this option for microcontroller with a 5200 core, including the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0. ! .Ip "\fB\-m68020\-40\fR" 4 .IX Item "-m68020-40" Generate output for a 68040, without using any of the new instructions. This results in code which can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68040. ! .Ip "\fB\-m68020\-60\fR" 4 .IX Item "-m68020-60" Generate output for a 68060, without using any of the new instructions. This results in code which can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68060. ! .Ip "\fB\-mfpa\fR" 4 .IX Item "-mfpa" Generate output containing Sun \s-1FPA\s0 instructions for floating point. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all m68k --- 4012,4040 ---- Use this option for microcontrollers with a \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334, 68336, 68340, 68341, 68349 and 68360. ! .IP "\fB\-m5200\fR" 4 .IX Item "-m5200" Generate output for a 520X ``coldfire'' family cpu. This is the default when the compiler is configured for 520X-based systems. .Sp Use this option for microcontroller with a 5200 core, including the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0. ! .IP "\fB\-m68020\-40\fR" 4 .IX Item "-m68020-40" Generate output for a 68040, without using any of the new instructions. This results in code which can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68040. ! .IP "\fB\-m68020\-60\fR" 4 .IX Item "-m68020-60" Generate output for a 68060, without using any of the new instructions. This results in code which can run relatively efficiently on either a 68020/68881 or a 68030 or a 68040. The generated code does use the 68881 instructions that are emulated on the 68060. ! .IP "\fB\-mfpa\fR" 4 .IX Item "-mfpa" Generate output containing Sun \s-1FPA\s0 instructions for floating point. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all m68k *************** used, but this can't be done directly in *** 4041,4059 **** make your own arrangements to provide suitable library functions for cross-compilation. The embedded targets \fBm68k-*\-aout\fR and \&\fBm68k-*\-coff\fR do provide software floating point support. ! .Ip "\fB\-mshort\fR" 4 .IX Item "-mshort" Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. ! .Ip "\fB\-mnobitfield\fR" 4 .IX Item "-mnobitfield" Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR and \fB\-m5200\fR options imply \fB\-mnobitfield\fR. ! .Ip "\fB\-mbitfield\fR" 4 .IX Item "-mbitfield" Do use the bit-field instructions. The \fB\-m68020\fR option implies \&\fB\-mbitfield\fR. This is the default if you use a configuration designed for a 68020. ! .Ip "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR --- 4043,4061 ---- make your own arrangements to provide suitable library functions for cross-compilation. The embedded targets \fBm68k-*\-aout\fR and \&\fBm68k-*\-coff\fR do provide software floating point support. ! .IP "\fB\-mshort\fR" 4 .IX Item "-mshort" Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. ! .IP "\fB\-mnobitfield\fR" 4 .IX Item "-mnobitfield" Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR and \fB\-m5200\fR options imply \fB\-mnobitfield\fR. ! .IP "\fB\-mbitfield\fR" 4 .IX Item "-mbitfield" Do use the bit-field instructions. The \fB\-m68020\fR option implies \&\fB\-mbitfield\fR. This is the default if you use a configuration designed for a 68020. ! .IP "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR *************** harmlessly ignored.) *** 4076,4085 **** .Sp The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030, 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200. ! .Ip "\fB\-malign-int\fR" 4 .IX Item "-malign-int" .PD 0 ! .Ip "\fB\-mno-align-int\fR" 4 .IX Item "-mno-align-int" .PD Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR, --- 4078,4087 ---- .Sp The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030, 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200. ! .IP "\fB\-malign-int\fR" 4 .IX Item "-malign-int" .PD 0 ! .IP "\fB\-mno-align-int\fR" 4 .IX Item "-mno-align-int" .PD Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR, *************** faster on processors with 32\-bit busses *** 4091,4107 **** \&\fBWarning:\fR if you use the \fB\-malign-int\fR switch, \s-1GCC\s0 will align structures containing the above types differently than most published application binary interface specifications for the m68k. ! .Ip "\fB\-mpcrel\fR" 4 .IX Item "-mpcrel" Use the pc-relative addressing mode of the 68000 directly, instead of using a global offset table. At present, this option implies \fB\-fpic\fR, allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is not presently supported with \fB\-mpcrel\fR, though this could be supported for 68020 and higher processors. ! .Ip "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD 0 ! .Ip "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD Do not (do) assume that unaligned memory references will be handled by --- 4093,4109 ---- \&\fBWarning:\fR if you use the \fB\-malign-int\fR switch, \s-1GCC\s0 will align structures containing the above types differently than most published application binary interface specifications for the m68k. ! .IP "\fB\-mpcrel\fR" 4 .IX Item "-mpcrel" Use the pc-relative addressing mode of the 68000 directly, instead of using a global offset table. At present, this option implies \fB\-fpic\fR, allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is not presently supported with \fB\-mpcrel\fR, though this could be supported for 68020 and higher processors. ! .IP "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD 0 ! .IP "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD Do not (do) assume that unaligned memory references will be handled by *************** These are the \fB\-m\fR options defined *** 4114,4143 **** microcontrollers. The default values for these options depends on which style of microcontroller was selected when the compiler was configured; the defaults for the most common choices are given below. ! .Ip "\fB\-m6811\fR" 4 .IX Item "-m6811" .PD 0 ! .Ip "\fB\-m68hc11\fR" 4 .IX Item "-m68hc11" .PD Generate output for a 68HC11. This is the default when the compiler is configured for 68HC11\-based systems. ! .Ip "\fB\-m6812\fR" 4 .IX Item "-m6812" .PD 0 ! .Ip "\fB\-m68hc12\fR" 4 .IX Item "-m68hc12" .PD Generate output for a 68HC12. This is the default when the compiler is configured for 68HC12\-based systems. ! .Ip "\fB\-mauto-incdec\fR" 4 .IX Item "-mauto-incdec" Enable the use of 68HC12 pre and post auto-increment and auto-decrement addressing modes. ! .Ip "\fB\-mshort\fR" 4 .IX Item "-mshort" Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. ! .Ip "\fB\-msoft-reg-count=\fR\fIcount\fR" 4 .IX Item "-msoft-reg-count=count" Specify the number of pseudo-soft registers which are used for the code generation. The maximum number is 32. Using more pseudo-soft --- 4116,4145 ---- microcontrollers. The default values for these options depends on which style of microcontroller was selected when the compiler was configured; the defaults for the most common choices are given below. ! .IP "\fB\-m6811\fR" 4 .IX Item "-m6811" .PD 0 ! .IP "\fB\-m68hc11\fR" 4 .IX Item "-m68hc11" .PD Generate output for a 68HC11. This is the default when the compiler is configured for 68HC11\-based systems. ! .IP "\fB\-m6812\fR" 4 .IX Item "-m6812" .PD 0 ! .IP "\fB\-m68hc12\fR" 4 .IX Item "-m68hc12" .PD Generate output for a 68HC12. This is the default when the compiler is configured for 68HC12\-based systems. ! .IP "\fB\-mauto-incdec\fR" 4 .IX Item "-mauto-incdec" Enable the use of 68HC12 pre and post auto-increment and auto-decrement addressing modes. ! .IP "\fB\-mshort\fR" 4 .IX Item "-mshort" Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR. ! .IP "\fB\-msoft-reg-count=\fR\fIcount\fR" 4 .IX Item "-msoft-reg-count=count" Specify the number of pseudo-soft registers which are used for the code generation. The maximum number is 32. Using more pseudo-soft *************** The default is 4 for 68HC11 and 2 for 68 *** 4148,4163 **** .IX Subsection "VAX Options" .PP These \fB\-m\fR options are defined for the Vax: ! .Ip "\fB\-munix\fR" 4 .IX Item "-munix" Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on) that the Unix assembler for the Vax cannot handle across long ranges. ! .Ip "\fB\-mgnu\fR" 4 .IX Item "-mgnu" Do output those jump instructions, on the assumption that you will assemble with the \s-1GNU\s0 assembler. ! .Ip "\fB\-mg\fR" 4 .IX Item "-mg" Output code for g-format floating point numbers instead of d-format. .PP --- 4150,4165 ---- .IX Subsection "VAX Options" .PP These \fB\-m\fR options are defined for the Vax: ! .IP "\fB\-munix\fR" 4 .IX Item "-munix" Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on) that the Unix assembler for the Vax cannot handle across long ranges. ! .IP "\fB\-mgnu\fR" 4 .IX Item "-mgnu" Do output those jump instructions, on the assumption that you will assemble with the \s-1GNU\s0 assembler. ! .IP "\fB\-mg\fR" 4 .IX Item "-mg" Output code for g-format floating point numbers instead of d-format. .PP *************** Output code for g-format floating point *** 4165,4174 **** .IX Subsection "SPARC Options" .PP These \fB\-m\fR switches are supported on the \s-1SPARC:\s0 ! .Ip "\fB\-mno-app-regs\fR" 4 .IX Item "-mno-app-regs" .PD 0 ! .Ip "\fB\-mapp-regs\fR" 4 .IX Item "-mapp-regs" .PD Specify \fB\-mapp-regs\fR to generate output using the global registers --- 4167,4176 ---- .IX Subsection "SPARC Options" .PP These \fB\-m\fR switches are supported on the \s-1SPARC:\s0 ! .IP "\fB\-mno-app-regs\fR" 4 .IX Item "-mno-app-regs" .PD 0 ! .IP "\fB\-mapp-regs\fR" 4 .IX Item "-mapp-regs" .PD Specify \fB\-mapp-regs\fR to generate output using the global registers *************** is the default. *** 4178,4195 **** To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss, specify \fB\-mno-app-regs\fR. You should compile libraries and system software with this option. ! .Ip "\fB\-mfpu\fR" 4 .IX Item "-mfpu" .PD 0 ! .Ip "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" .PD Generate output containing floating point instructions. This is the default. ! .Ip "\fB\-mno-fpu\fR" 4 .IX Item "-mno-fpu" .PD 0 ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD Generate output containing library calls for floating point. --- 4180,4197 ---- To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss, specify \fB\-mno-app-regs\fR. You should compile libraries and system software with this option. ! .IP "\fB\-mfpu\fR" 4 .IX Item "-mfpu" .PD 0 ! .IP "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" .PD Generate output containing floating point instructions. This is the default. ! .IP "\fB\-mno-fpu\fR" 4 .IX Item "-mno-fpu" .PD 0 ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD Generate output containing library calls for floating point. *************** therefore, it is only useful if you comp *** 4205,4215 **** this option. In particular, you need to compile \fIlibgcc.a\fR, the library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for this to work. ! .Ip "\fB\-mhard-quad-float\fR" 4 .IX Item "-mhard-quad-float" Generate output containing quad-word (long double) floating point instructions. ! .Ip "\fB\-msoft-quad-float\fR" 4 .IX Item "-msoft-quad-float" Generate output containing library calls for quad-word (long double) floating point instructions. The functions called are those specified --- 4207,4217 ---- this option. In particular, you need to compile \fIlibgcc.a\fR, the library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for this to work. ! .IP "\fB\-mhard-quad-float\fR" 4 .IX Item "-mhard-quad-float" Generate output containing quad-word (long double) floating point instructions. ! .IP "\fB\-msoft-quad-float\fR" 4 .IX Item "-msoft-quad-float" Generate output containing library calls for quad-word (long double) floating point instructions. The functions called are those specified *************** a trap handler for one of these instruct *** 4221,4230 **** emulates the effect of the instruction. Because of the trap handler overhead, this is much slower than calling the \s-1ABI\s0 library routines. Thus the \&\fB\-msoft-quad-float\fR option is the default. ! .Ip "\fB\-mno-epilogue\fR" 4 .IX Item "-mno-epilogue" .PD 0 ! .Ip "\fB\-mepilogue\fR" 4 .IX Item "-mepilogue" .PD With \fB\-mepilogue\fR (the default), the compiler always emits code for --- 4223,4232 ---- emulates the effect of the instruction. Because of the trap handler overhead, this is much slower than calling the \s-1ABI\s0 library routines. Thus the \&\fB\-msoft-quad-float\fR option is the default. ! .IP "\fB\-mno-epilogue\fR" 4 .IX Item "-mno-epilogue" .PD 0 ! .IP "\fB\-mepilogue\fR" 4 .IX Item "-mepilogue" .PD With \fB\-mepilogue\fR (the default), the compiler always emits code for *************** generate a jump to the exit code at the *** 4234,4243 **** .Sp With \fB\-mno-epilogue\fR, the compiler tries to emit exit code inline at every function exit. ! .Ip "\fB\-mno-flat\fR" 4 .IX Item "-mno-flat" .PD 0 ! .Ip "\fB\-mflat\fR" 4 .IX Item "-mflat" .PD With \fB\-mflat\fR, the compiler does not generate save/restore instructions --- 4236,4245 ---- .Sp With \fB\-mno-epilogue\fR, the compiler tries to emit exit code inline at every function exit. ! .IP "\fB\-mno-flat\fR" 4 .IX Item "-mno-flat" .PD 0 ! .IP "\fB\-mflat\fR" 4 .IX Item "-mflat" .PD With \fB\-mflat\fR, the compiler does not generate save/restore instructions *************** The local registers and the input regist *** 4249,4258 **** .Sp With \fB\-mno-flat\fR (the default), the compiler emits save/restore instructions (except for leaf functions) and is the normal mode of operation. ! .Ip "\fB\-mno-unaligned-doubles\fR" 4 .IX Item "-mno-unaligned-doubles" .PD 0 ! .Ip "\fB\-munaligned-doubles\fR" 4 .IX Item "-munaligned-doubles" .PD Assume that doubles have 8 byte alignment. This is the default. --- 4251,4260 ---- .Sp With \fB\-mno-flat\fR (the default), the compiler emits save/restore instructions (except for leaf functions) and is the normal mode of operation. ! .IP "\fB\-mno-unaligned-doubles\fR" 4 .IX Item "-mno-unaligned-doubles" .PD 0 ! .IP "\fB\-munaligned-doubles\fR" 4 .IX Item "-munaligned-doubles" .PD Assume that doubles have 8 byte alignment. This is the default. *************** absolute address. Otherwise, it assumes *** 4263,4272 **** Specifying this option avoids some rare compatibility problems with code generated by other compilers. It is not the default because it results in a performance loss, especially for floating point code. ! .Ip "\fB\-mno-faster-structs\fR" 4 .IX Item "-mno-faster-structs" .PD 0 ! .Ip "\fB\-mfaster-structs\fR" 4 .IX Item "-mfaster-structs" .PD With \fB\-mfaster-structs\fR, the compiler assumes that structures --- 4265,4274 ---- Specifying this option avoids some rare compatibility problems with code generated by other compilers. It is not the default because it results in a performance loss, especially for floating point code. ! .IP "\fB\-mno-faster-structs\fR" 4 .IX Item "-mno-faster-structs" .PD 0 ! .IP "\fB\-mfaster-structs\fR" 4 .IX Item "-mfaster-structs" .PD With \fB\-mfaster-structs\fR, the compiler assumes that structures *************** However, the use of this changed alignme *** 4277,4286 **** \&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer acknowledges that their resulting code will not be directly in line with the rules of the \s-1ABI\s0. ! .Ip "\fB\-mv8\fR" 4 .IX Item "-mv8" .PD 0 ! .Ip "\fB\-msparclite\fR" 4 .IX Item "-msparclite" .PD These two options select variations on the \s-1SPARC\s0 architecture. --- 4279,4288 ---- \&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer acknowledges that their resulting code will not be directly in line with the rules of the \s-1ABI\s0. ! .IP "\fB\-mv8\fR" 4 .IX Item "-mv8" .PD 0 ! .IP "\fB\-msparclite\fR" 4 .IX Item "-msparclite" .PD These two options select variations on the \s-1SPARC\s0 architecture. *************** exist in SPARClite but not in \s-1SPARC\ *** 4298,4307 **** .Sp These options are deprecated and will be deleted in a future \s-1GCC\s0 release. They have been replaced with \fB\-mcpu=xxx\fR. ! .Ip "\fB\-mcypress\fR" 4 .IX Item "-mcypress" .PD 0 ! .Ip "\fB\-msupersparc\fR" 4 .IX Item "-msupersparc" .PD These two options select the processor for which the code is optimised. --- 4300,4309 ---- .Sp These options are deprecated and will be deleted in a future \s-1GCC\s0 release. They have been replaced with \fB\-mcpu=xxx\fR. ! .IP "\fB\-mcypress\fR" 4 .IX Item "-mcypress" .PD 0 ! .IP "\fB\-msupersparc\fR" 4 .IX Item "-msupersparc" .PD These two options select the processor for which the code is optimised. *************** of the full \s-1SPARC\s0 v8 instruction *** 4316,4322 **** .Sp These options are deprecated and will be deleted in a future \s-1GCC\s0 release. They have been replaced with \fB\-mcpu=xxx\fR. ! .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are --- 4318,4324 ---- .Sp These options are deprecated and will be deleted in a future \s-1GCC\s0 release. They have been replaced with \fB\-mcpu=xxx\fR. ! .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are *************** implementations. *** 4338,4344 **** \& sparclet: tsc701 \& v9: ultrasparc .Ve ! .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 .IX Item "-mtune=cpu_type" Set the instruction scheduling parameters for machine type \&\fIcpu_type\fR, but do not set the instruction set or register set that the --- 4340,4346 ---- \& sparclet: tsc701 \& v9: ultrasparc .Ve ! .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4 .IX Item "-mtune=cpu_type" Set the instruction scheduling parameters for machine type \&\fIcpu_type\fR, but do not set the instruction set or register set that the *************** select a particular cpu implementation: *** 4352,4366 **** .PP These \fB\-m\fR switches are supported in addition to the above on the \s-1SPARCLET\s0 processor. ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. ! .Ip "\fB\-mlive-g0\fR" 4 .IX Item "-mlive-g0" ! Treat register \f(CW\*(C`%g0\*(C'\fR as a normal register. \&\s-1GCC\s0 will continue to clobber it as necessary but will not assume it always reads as 0. ! .Ip "\fB\-mbroken-saverestore\fR" 4 .IX Item "-mbroken-saverestore" Generate code that does not use non-trivial forms of the \f(CW\*(C`save\*(C'\fR and \&\f(CW\*(C`restore\*(C'\fR instructions. Early versions of the \s-1SPARCLET\s0 processor do --- 4354,4368 ---- .PP These \fB\-m\fR switches are supported in addition to the above on the \s-1SPARCLET\s0 processor. ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. ! .IP "\fB\-mlive-g0\fR" 4 .IX Item "-mlive-g0" ! Treat register \f(CW%g0\fR as a normal register. \&\s-1GCC\s0 will continue to clobber it as necessary but will not assume it always reads as 0. ! .IP "\fB\-mbroken-saverestore\fR" 4 .IX Item "-mbroken-saverestore" Generate code that does not use non-trivial forms of the \f(CW\*(C`save\*(C'\fR and \&\f(CW\*(C`restore\*(C'\fR instructions. Early versions of the \s-1SPARCLET\s0 processor do *************** handlers. *** 4373,4419 **** .PP These \fB\-m\fR switches are supported in addition to the above on \s-1SPARC\s0 V9 processors in 64\-bit environments. ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. ! .Ip "\fB\-m32\fR" 4 .IX Item "-m32" .PD 0 ! .Ip "\fB\-m64\fR" 4 .IX Item "-m64" .PD Generate code for a 32\-bit or 64\-bit environment. The 32\-bit environment sets int, long and pointer to 32 bits. The 64\-bit environment sets int to 32 bits and long and pointer to 64 bits. ! .Ip "\fB\-mcmodel=medlow\fR" 4 .IX Item "-mcmodel=medlow" Generate code for the Medium/Low code model: the program must be linked in the low 32 bits of the address space. Pointers are 64 bits. Programs can be statically or dynamically linked. ! .Ip "\fB\-mcmodel=medmid\fR" 4 .IX Item "-mcmodel=medmid" Generate code for the Medium/Middle code model: the program must be linked in the low 44 bits of the address space, the text segment must be less than 2G bytes, and data segment must be within 2G of the text segment. Pointers are 64 bits. ! .Ip "\fB\-mcmodel=medany\fR" 4 .IX Item "-mcmodel=medany" Generate code for the Medium/Anywhere code model: the program may be linked anywhere in the address space, the text segment must be less than 2G bytes, and data segment must be within 2G of the text segment. Pointers are 64 bits. ! .Ip "\fB\-mcmodel=embmedany\fR" 4 .IX Item "-mcmodel=embmedany" Generate code for the Medium/Anywhere code model for embedded systems: assume a 32\-bit text and a 32\-bit data segment, both starting anywhere (determined at link time). Register \f(CW%g4\fR points to the base of the data segment. Pointers are still 64 bits. Programs are statically linked, \s-1PIC\s0 is not supported. ! .Ip "\fB\-mstack-bias\fR" 4 .IX Item "-mstack-bias" .PD 0 ! .Ip "\fB\-mno-stack-bias\fR" 4 .IX Item "-mno-stack-bias" .PD With \fB\-mstack-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and --- 4375,4421 ---- .PP These \fB\-m\fR switches are supported in addition to the above on \s-1SPARC\s0 V9 processors in 64\-bit environments. ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. ! .IP "\fB\-m32\fR" 4 .IX Item "-m32" .PD 0 ! .IP "\fB\-m64\fR" 4 .IX Item "-m64" .PD Generate code for a 32\-bit or 64\-bit environment. The 32\-bit environment sets int, long and pointer to 32 bits. The 64\-bit environment sets int to 32 bits and long and pointer to 64 bits. ! .IP "\fB\-mcmodel=medlow\fR" 4 .IX Item "-mcmodel=medlow" Generate code for the Medium/Low code model: the program must be linked in the low 32 bits of the address space. Pointers are 64 bits. Programs can be statically or dynamically linked. ! .IP "\fB\-mcmodel=medmid\fR" 4 .IX Item "-mcmodel=medmid" Generate code for the Medium/Middle code model: the program must be linked in the low 44 bits of the address space, the text segment must be less than 2G bytes, and data segment must be within 2G of the text segment. Pointers are 64 bits. ! .IP "\fB\-mcmodel=medany\fR" 4 .IX Item "-mcmodel=medany" Generate code for the Medium/Anywhere code model: the program may be linked anywhere in the address space, the text segment must be less than 2G bytes, and data segment must be within 2G of the text segment. Pointers are 64 bits. ! .IP "\fB\-mcmodel=embmedany\fR" 4 .IX Item "-mcmodel=embmedany" Generate code for the Medium/Anywhere code model for embedded systems: assume a 32\-bit text and a 32\-bit data segment, both starting anywhere (determined at link time). Register \f(CW%g4\fR points to the base of the data segment. Pointers are still 64 bits. Programs are statically linked, \s-1PIC\s0 is not supported. ! .IP "\fB\-mstack-bias\fR" 4 .IX Item "-mstack-bias" .PD 0 ! .IP "\fB\-mno-stack-bias\fR" 4 .IX Item "-mno-stack-bias" .PD With \fB\-mstack-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and *************** Otherwise, assume no such offset is pres *** 4425,4476 **** .IX Subsection "Convex Options" .PP These \fB\-m\fR options are defined for Convex: ! .Ip "\fB\-mc1\fR" 4 .IX Item "-mc1" Generate output for C1. The code will run on any Convex machine. The preprocessor symbol \f(CW\*(C`_\|_convex_\|_c1_\|_\*(C'\fR is defined. ! .Ip "\fB\-mc2\fR" 4 .IX Item "-mc2" Generate output for C2. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C2. The preprocessor symbol \f(CW\*(C`_\|_convex_c2_\|_\*(C'\fR is defined. ! .Ip "\fB\-mc32\fR" 4 .IX Item "-mc32" Generate output for C32xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C32. The preprocessor symbol \f(CW\*(C`_\|_convex_c32_\|_\*(C'\fR is defined. ! .Ip "\fB\-mc34\fR" 4 .IX Item "-mc34" Generate output for C34xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C34. The preprocessor symbol \f(CW\*(C`_\|_convex_c34_\|_\*(C'\fR is defined. ! .Ip "\fB\-mc38\fR" 4 .IX Item "-mc38" Generate output for C38xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C38. The preprocessor symbol \f(CW\*(C`_\|_convex_c38_\|_\*(C'\fR is defined. ! .Ip "\fB\-margcount\fR" 4 .IX Item "-margcount" Generate code which puts an argument count in the word preceding each argument list. This is compatible with regular \s-1CC\s0, and a few programs may need the argument count word. \s-1GDB\s0 and other source-level debuggers do not need it; this info is in the symbol table. ! .Ip "\fB\-mnoargcount\fR" 4 .IX Item "-mnoargcount" Omit the argument count word. This is the default. ! .Ip "\fB\-mvolatile-cache\fR" 4 .IX Item "-mvolatile-cache" Allow volatile references to be cached. This is the default. ! .Ip "\fB\-mvolatile-nocache\fR" 4 .IX Item "-mvolatile-nocache" Volatile references bypass the data cache, going all the way to memory. This is only needed for multi-processor code that does not use standard synchronization instructions. Making non-volatile references to volatile locations will not necessarily work. ! .Ip "\fB\-mlong32\fR" 4 .IX Item "-mlong32" Type long is 32 bits, the same as type int. This is the default. ! .Ip "\fB\-mlong64\fR" 4 .IX Item "-mlong64" Type long is 64 bits, the same as type long long. This option is useless, because no library support exists for it. --- 4427,4478 ---- .IX Subsection "Convex Options" .PP These \fB\-m\fR options are defined for Convex: ! .IP "\fB\-mc1\fR" 4 .IX Item "-mc1" Generate output for C1. The code will run on any Convex machine. The preprocessor symbol \f(CW\*(C`_\|_convex_\|_c1_\|_\*(C'\fR is defined. ! .IP "\fB\-mc2\fR" 4 .IX Item "-mc2" Generate output for C2. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C2. The preprocessor symbol \f(CW\*(C`_\|_convex_c2_\|_\*(C'\fR is defined. ! .IP "\fB\-mc32\fR" 4 .IX Item "-mc32" Generate output for C32xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C32. The preprocessor symbol \f(CW\*(C`_\|_convex_c32_\|_\*(C'\fR is defined. ! .IP "\fB\-mc34\fR" 4 .IX Item "-mc34" Generate output for C34xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C34. The preprocessor symbol \f(CW\*(C`_\|_convex_c34_\|_\*(C'\fR is defined. ! .IP "\fB\-mc38\fR" 4 .IX Item "-mc38" Generate output for C38xx. Uses instructions not available on C1. Scheduling and other optimizations are chosen for max performance on C38. The preprocessor symbol \f(CW\*(C`_\|_convex_c38_\|_\*(C'\fR is defined. ! .IP "\fB\-margcount\fR" 4 .IX Item "-margcount" Generate code which puts an argument count in the word preceding each argument list. This is compatible with regular \s-1CC\s0, and a few programs may need the argument count word. \s-1GDB\s0 and other source-level debuggers do not need it; this info is in the symbol table. ! .IP "\fB\-mnoargcount\fR" 4 .IX Item "-mnoargcount" Omit the argument count word. This is the default. ! .IP "\fB\-mvolatile-cache\fR" 4 .IX Item "-mvolatile-cache" Allow volatile references to be cached. This is the default. ! .IP "\fB\-mvolatile-nocache\fR" 4 .IX Item "-mvolatile-nocache" Volatile references bypass the data cache, going all the way to memory. This is only needed for multi-processor code that does not use standard synchronization instructions. Making non-volatile references to volatile locations will not necessarily work. ! .IP "\fB\-mlong32\fR" 4 .IX Item "-mlong32" Type long is 32 bits, the same as type int. This is the default. ! .IP "\fB\-mlong64\fR" 4 .IX Item "-mlong64" Type long is 64 bits, the same as type long long. This option is useless, because no library support exists for it. *************** because no library support exists for it *** 4479,4523 **** .IX Subsection "AMD29K Options" .PP These \fB\-m\fR options are defined for the \s-1AMD\s0 Am29000: ! .Ip "\fB\-mdw\fR" 4 .IX Item "-mdw" Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is set, i.e., that byte and halfword operations are directly supported by the hardware. This is the default. ! .Ip "\fB\-mndw\fR" 4 .IX Item "-mndw" Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is not set. ! .Ip "\fB\-mbw\fR" 4 .IX Item "-mbw" Generate code that assumes the system supports byte and halfword write operations. This is the default. ! .Ip "\fB\-mnbw\fR" 4 .IX Item "-mnbw" Generate code that assumes the systems does not support byte and halfword write operations. \fB\-mnbw\fR implies \fB\-mndw\fR. ! .Ip "\fB\-msmall\fR" 4 .IX Item "-msmall" Use a small memory model that assumes that all function addresses are either within a single 256 \s-1KB\s0 segment or at an absolute address of less than 256k. This allows the \f(CW\*(C`call\*(C'\fR instruction to be used instead of a \f(CW\*(C`const\*(C'\fR, \f(CW\*(C`consth\*(C'\fR, \f(CW\*(C`calli\*(C'\fR sequence. ! .Ip "\fB\-mnormal\fR" 4 .IX Item "-mnormal" Use the normal memory model: Generate \f(CW\*(C`call\*(C'\fR instructions only when calling functions in the same file and \f(CW\*(C`calli\*(C'\fR instructions otherwise. This works if each file occupies less than 256 \s-1KB\s0 but allows the entire executable to be larger than 256 \s-1KB\s0. This is the default. ! .Ip "\fB\-mlarge\fR" 4 .IX Item "-mlarge" Always use \f(CW\*(C`calli\*(C'\fR instructions. Specify this option if you expect a single file to compile into more than 256 \s-1KB\s0 of code. ! .Ip "\fB\-m29050\fR" 4 .IX Item "-m29050" Generate code for the Am29050. ! .Ip "\fB\-m29000\fR" 4 .IX Item "-m29000" Generate code for the Am29000. This is the default. ! .Ip "\fB\-mkernel-registers\fR" 4 .IX Item "-mkernel-registers" Generate references to registers \f(CW\*(C`gr64\-gr95\*(C'\fR instead of to registers \f(CW\*(C`gr96\-gr127\*(C'\fR. This option can be used when compiling --- 4481,4525 ---- .IX Subsection "AMD29K Options" .PP These \fB\-m\fR options are defined for the \s-1AMD\s0 Am29000: ! .IP "\fB\-mdw\fR" 4 .IX Item "-mdw" Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is set, i.e., that byte and halfword operations are directly supported by the hardware. This is the default. ! .IP "\fB\-mndw\fR" 4 .IX Item "-mndw" Generate code that assumes the \f(CW\*(C`DW\*(C'\fR bit is not set. ! .IP "\fB\-mbw\fR" 4 .IX Item "-mbw" Generate code that assumes the system supports byte and halfword write operations. This is the default. ! .IP "\fB\-mnbw\fR" 4 .IX Item "-mnbw" Generate code that assumes the systems does not support byte and halfword write operations. \fB\-mnbw\fR implies \fB\-mndw\fR. ! .IP "\fB\-msmall\fR" 4 .IX Item "-msmall" Use a small memory model that assumes that all function addresses are either within a single 256 \s-1KB\s0 segment or at an absolute address of less than 256k. This allows the \f(CW\*(C`call\*(C'\fR instruction to be used instead of a \f(CW\*(C`const\*(C'\fR, \f(CW\*(C`consth\*(C'\fR, \f(CW\*(C`calli\*(C'\fR sequence. ! .IP "\fB\-mnormal\fR" 4 .IX Item "-mnormal" Use the normal memory model: Generate \f(CW\*(C`call\*(C'\fR instructions only when calling functions in the same file and \f(CW\*(C`calli\*(C'\fR instructions otherwise. This works if each file occupies less than 256 \s-1KB\s0 but allows the entire executable to be larger than 256 \s-1KB\s0. This is the default. ! .IP "\fB\-mlarge\fR" 4 .IX Item "-mlarge" Always use \f(CW\*(C`calli\*(C'\fR instructions. Specify this option if you expect a single file to compile into more than 256 \s-1KB\s0 of code. ! .IP "\fB\-m29050\fR" 4 .IX Item "-m29050" Generate code for the Am29050. ! .IP "\fB\-m29000\fR" 4 .IX Item "-m29000" Generate code for the Am29000. This is the default. ! .IP "\fB\-mkernel-registers\fR" 4 .IX Item "-mkernel-registers" Generate references to registers \f(CW\*(C`gr64\-gr95\*(C'\fR instead of to registers \f(CW\*(C`gr96\-gr127\*(C'\fR. This option can be used when compiling *************** by user-mode code. *** 4526,4570 **** .Sp Note that when this option is used, register names in \fB\-f\fR flags must use the normal, user-mode, names. ! .Ip "\fB\-muser-registers\fR" 4 .IX Item "-muser-registers" Use the normal set of global registers, \f(CW\*(C`gr96\-gr127\*(C'\fR. This is the default. ! .Ip "\fB\-mstack-check\fR" 4 .IX Item "-mstack-check" .PD 0 ! .Ip "\fB\-mno-stack-check\fR" 4 .IX Item "-mno-stack-check" .PD Insert (or do not insert) a call to \f(CW\*(C`_\|_msp_check\*(C'\fR after each stack adjustment. This is often used for kernel code. ! .Ip "\fB\-mstorem-bug\fR" 4 .IX Item "-mstorem-bug" .PD 0 ! .Ip "\fB\-mno-storem-bug\fR" 4 .IX Item "-mno-storem-bug" .PD \&\fB\-mstorem-bug\fR handles 29k processors which cannot handle the separation of a mtsrim insn and a storem instruction (most 29000 chips to date, but not the 29050). ! .Ip "\fB\-mno-reuse-arg-regs\fR" 4 .IX Item "-mno-reuse-arg-regs" .PD 0 ! .Ip "\fB\-mreuse-arg-regs\fR" 4 .IX Item "-mreuse-arg-regs" .PD \&\fB\-mno-reuse-arg-regs\fR tells the compiler to only use incoming argument registers for copying out arguments. This helps detect calling a function with fewer arguments than it was declared with. ! .Ip "\fB\-mno-impure-text\fR" 4 .IX Item "-mno-impure-text" .PD 0 ! .Ip "\fB\-mimpure-text\fR" 4 .IX Item "-mimpure-text" .PD \&\fB\-mimpure-text\fR, used in addition to \fB\-shared\fR, tells the compiler to not pass \fB\-assert pure-text\fR to the linker when linking a shared object. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. --- 4528,4572 ---- .Sp Note that when this option is used, register names in \fB\-f\fR flags must use the normal, user-mode, names. ! .IP "\fB\-muser-registers\fR" 4 .IX Item "-muser-registers" Use the normal set of global registers, \f(CW\*(C`gr96\-gr127\*(C'\fR. This is the default. ! .IP "\fB\-mstack-check\fR" 4 .IX Item "-mstack-check" .PD 0 ! .IP "\fB\-mno-stack-check\fR" 4 .IX Item "-mno-stack-check" .PD Insert (or do not insert) a call to \f(CW\*(C`_\|_msp_check\*(C'\fR after each stack adjustment. This is often used for kernel code. ! .IP "\fB\-mstorem-bug\fR" 4 .IX Item "-mstorem-bug" .PD 0 ! .IP "\fB\-mno-storem-bug\fR" 4 .IX Item "-mno-storem-bug" .PD \&\fB\-mstorem-bug\fR handles 29k processors which cannot handle the separation of a mtsrim insn and a storem instruction (most 29000 chips to date, but not the 29050). ! .IP "\fB\-mno-reuse-arg-regs\fR" 4 .IX Item "-mno-reuse-arg-regs" .PD 0 ! .IP "\fB\-mreuse-arg-regs\fR" 4 .IX Item "-mreuse-arg-regs" .PD \&\fB\-mno-reuse-arg-regs\fR tells the compiler to only use incoming argument registers for copying out arguments. This helps detect calling a function with fewer arguments than it was declared with. ! .IP "\fB\-mno-impure-text\fR" 4 .IX Item "-mno-impure-text" .PD 0 ! .IP "\fB\-mimpure-text\fR" 4 .IX Item "-mimpure-text" .PD \&\fB\-mimpure-text\fR, used in addition to \fB\-shared\fR, tells the compiler to not pass \fB\-assert pure-text\fR to the linker when linking a shared object. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. *************** Normally the facilities of the machine's *** 4572,4578 **** this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation. ! .Ip "\fB\-mno-multm\fR" 4 .IX Item "-mno-multm" Do not generate multm or multmu instructions. This is useful for some embedded systems which do not have trap handlers for these instructions. --- 4574,4580 ---- this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation. ! .IP "\fB\-mno-multm\fR" 4 .IX Item "-mno-multm" Do not generate multm or multmu instructions. This is useful for some embedded systems which do not have trap handlers for these instructions. *************** systems which do not have trap handlers *** 4582,4617 **** .PP These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0) architectures: ! .Ip "\fB\-mapcs-frame\fR" 4 .IX Item "-mapcs-frame" Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call Standard for all functions, even if this is not strictly necessary for correct execution of the code. Specifying \fB\-fomit-frame-pointer\fR with this option will cause the stack frames not to be generated for leaf functions. The default is \fB\-mno-apcs-frame\fR. ! .Ip "\fB\-mapcs\fR" 4 .IX Item "-mapcs" This is a synonym for \fB\-mapcs-frame\fR. ! .Ip "\fB\-mapcs-26\fR" 4 .IX Item "-mapcs-26" Generate code for a processor running with a 26\-bit program counter, and conforming to the function calling standards for the \s-1APCS\s0 26\-bit option. This option replaces the \fB\-m2\fR and \fB\-m3\fR options of previous releases of the compiler. ! .Ip "\fB\-mapcs-32\fR" 4 .IX Item "-mapcs-32" Generate code for a processor running with a 32\-bit program counter, and conforming to the function calling standards for the \s-1APCS\s0 32\-bit option. This option replaces the \fB\-m6\fR option of previous releases of the compiler. ! .Ip "\fB\-mthumb-interwork\fR" 4 .IX Item "-mthumb-interwork" Generate code which supports calling between the \s-1ARM\s0 and Thumb instruction sets. Without this option the two instruction sets cannot be reliably used inside one program. The default is \&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated when \fB\-mthumb-interwork\fR is specified. ! .Ip "\fB\-mno-sched-prolog\fR" 4 .IX Item "-mno-sched-prolog" Prevent the reordering of instructions in the function prolog, or the merging of those instruction with the instructions in the function's --- 4584,4619 ---- .PP These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0) architectures: ! .IP "\fB\-mapcs-frame\fR" 4 .IX Item "-mapcs-frame" Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call Standard for all functions, even if this is not strictly necessary for correct execution of the code. Specifying \fB\-fomit-frame-pointer\fR with this option will cause the stack frames not to be generated for leaf functions. The default is \fB\-mno-apcs-frame\fR. ! .IP "\fB\-mapcs\fR" 4 .IX Item "-mapcs" This is a synonym for \fB\-mapcs-frame\fR. ! .IP "\fB\-mapcs-26\fR" 4 .IX Item "-mapcs-26" Generate code for a processor running with a 26\-bit program counter, and conforming to the function calling standards for the \s-1APCS\s0 26\-bit option. This option replaces the \fB\-m2\fR and \fB\-m3\fR options of previous releases of the compiler. ! .IP "\fB\-mapcs-32\fR" 4 .IX Item "-mapcs-32" Generate code for a processor running with a 32\-bit program counter, and conforming to the function calling standards for the \s-1APCS\s0 32\-bit option. This option replaces the \fB\-m6\fR option of previous releases of the compiler. ! .IP "\fB\-mthumb-interwork\fR" 4 .IX Item "-mthumb-interwork" Generate code which supports calling between the \s-1ARM\s0 and Thumb instruction sets. Without this option the two instruction sets cannot be reliably used inside one program. The default is \&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated when \fB\-mthumb-interwork\fR is specified. ! .IP "\fB\-mno-sched-prolog\fR" 4 .IX Item "-mno-sched-prolog" Prevent the reordering of instructions in the function prolog, or the merging of those instruction with the instructions in the function's *************** of instructions (or in fact one of a cho *** 4620,4630 **** different function prologues), and this information can be used to locate the start if functions inside an executable piece of code. The default is \fB\-msched-prolog\fR. ! .Ip "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" Generate output containing floating point instructions. This is the default. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0 --- 4622,4632 ---- different function prologues), and this information can be used to locate the start if functions inside an executable piece of code. The default is \fB\-msched-prolog\fR. ! .IP "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" Generate output containing floating point instructions. This is the default. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0 *************** therefore, it is only useful if you comp *** 4638,4652 **** this option. In particular, you need to compile \fIlibgcc.a\fR, the library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for this to work. ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. This is the default for all standard configurations. ! .Ip "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" Generate code for a processor running in big-endian mode; the default is to compile code for a little-endian processor. ! .Ip "\fB\-mwords-little-endian\fR" 4 .IX Item "-mwords-little-endian" This option only applies when generating code for big-endian processors. Generate code for a little-endian word order but a big-endian byte --- 4640,4654 ---- this option. In particular, you need to compile \fIlibgcc.a\fR, the library that comes with \s-1GCC\s0, with \fB\-msoft-float\fR in order for this to work. ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a processor running in little-endian mode. This is the default for all standard configurations. ! .IP "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" Generate code for a processor running in big-endian mode; the default is to compile code for a little-endian processor. ! .IP "\fB\-mwords-little-endian\fR" 4 .IX Item "-mwords-little-endian" This option only applies when generating code for big-endian processors. Generate code for a little-endian word order but a big-endian byte *************** order. That is, a byte order of the for *** 4654,4660 **** option should only be used if you require compatibility with code for big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to 2.8. ! .Ip "\fB\-malignment-traps\fR" 4 .IX Item "-malignment-traps" Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled. On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to --- 4656,4662 ---- option should only be used if you require compatibility with code for big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to 2.8. ! .IP "\fB\-malignment-traps\fR" 4 .IX Item "-malignment-traps" Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled. On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to *************** address is aligned to a word boundary. *** 4670,4676 **** This option is ignored when compiling for \s-1ARM\s0 architecture 4 or later, since these processors have instructions to directly access half-word objects in memory. ! .Ip "\fB\-mno-alignment-traps\fR" 4 .IX Item "-mno-alignment-traps" Generate code that assumes that the \s-1MMU\s0 will not trap unaligned accesses. This produces better code when the target instruction set --- 4672,4678 ---- This option is ignored when compiling for \s-1ARM\s0 architecture 4 or later, since these processors have instructions to directly access half-word objects in memory. ! .IP "\fB\-mno-alignment-traps\fR" 4 .IX Item "-mno-alignment-traps" Generate code that assumes that the \s-1MMU\s0 will not trap unaligned accesses. This produces better code when the target instruction set *************** memory. *** 4684,4712 **** The default setting for most targets is \fB\-mno-alignment-traps\fR, since this produces better code when there are no half-word memory instructions available. ! .Ip "\fB\-mshort-load-bytes\fR" 4 .IX Item "-mshort-load-bytes" .PD 0 ! .Ip "\fB\-mno-short-load-words\fR" 4 .IX Item "-mno-short-load-words" .PD These are deprecated aliases for \fB\-malignment-traps\fR. ! .Ip "\fB\-mno-short-load-bytes\fR" 4 .IX Item "-mno-short-load-bytes" .PD 0 ! .Ip "\fB\-mshort-load-words\fR" 4 .IX Item "-mshort-load-words" .PD This are deprecated aliases for \fB\-mno-alignment-traps\fR. ! .Ip "\fB\-mbsd\fR" 4 .IX Item "-mbsd" This option only applies to \s-1RISC\s0 iX. Emulate the native BSD-mode compiler. This is the default if \fB\-ansi\fR is not specified. ! .Ip "\fB\-mxopen\fR" 4 .IX Item "-mxopen" This option only applies to \s-1RISC\s0 iX. Emulate the native X/Open-mode compiler. ! .Ip "\fB\-mno-symrename\fR" 4 .IX Item "-mno-symrename" This option only applies to \s-1RISC\s0 iX. Do not run the assembler post-processor, \fBsymrename\fR, after code has been assembled. --- 4686,4714 ---- The default setting for most targets is \fB\-mno-alignment-traps\fR, since this produces better code when there are no half-word memory instructions available. ! .IP "\fB\-mshort-load-bytes\fR" 4 .IX Item "-mshort-load-bytes" .PD 0 ! .IP "\fB\-mno-short-load-words\fR" 4 .IX Item "-mno-short-load-words" .PD These are deprecated aliases for \fB\-malignment-traps\fR. ! .IP "\fB\-mno-short-load-bytes\fR" 4 .IX Item "-mno-short-load-bytes" .PD 0 ! .IP "\fB\-mshort-load-words\fR" 4 .IX Item "-mshort-load-words" .PD This are deprecated aliases for \fB\-mno-alignment-traps\fR. ! .IP "\fB\-mbsd\fR" 4 .IX Item "-mbsd" This option only applies to \s-1RISC\s0 iX. Emulate the native BSD-mode compiler. This is the default if \fB\-ansi\fR is not specified. ! .IP "\fB\-mxopen\fR" 4 .IX Item "-mxopen" This option only applies to \s-1RISC\s0 iX. Emulate the native X/Open-mode compiler. ! .IP "\fB\-mno-symrename\fR" 4 .IX Item "-mno-symrename" This option only applies to \s-1RISC\s0 iX. Do not run the assembler post-processor, \fBsymrename\fR, after code has been assembled. *************** Normally it is necessary to modify some *** 4714,4720 **** preparation for linking with the \s-1RISC\s0 iX C library; this option suppresses this pass. The post-processor is never run when the compiler is built for cross-compilation. ! .Ip "\fB\-mcpu=\fR\fIname\fR" 4 .IX Item "-mcpu=name" This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name to determine what kind of instructions it can emit when generating --- 4716,4722 ---- preparation for linking with the \s-1RISC\s0 iX C library; this option suppresses this pass. The post-processor is never run when the compiler is built for cross-compilation. ! .IP "\fB\-mcpu=\fR\fIname\fR" 4 .IX Item "-mcpu=name" This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name to determine what kind of instructions it can emit when generating *************** assembly code. Permissible names are: \ *** 4728,4734 **** \&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR, \&\fBarm920t\fR, \fBarm940t\fR, \fBarm9tdmi\fR, \fBarm10tdmi\fR, \&\fBarm1020t\fR, \fBxscale\fR. ! .Ip "\fB\-mtune=\fR\fIname\fR" 4 .IX Item "-mtune=name" This option is very similar to the \fB\-mcpu=\fR option, except that instead of specifying the actual target processor type, and hence --- 4730,4736 ---- \&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR, \&\fBarm920t\fR, \fBarm940t\fR, \fBarm9tdmi\fR, \fBarm10tdmi\fR, \&\fBarm1020t\fR, \fBxscale\fR. ! .IP "\fB\-mtune=\fR\fIname\fR" 4 .IX Item "-mtune=name" This option is very similar to the \fB\-mcpu=\fR option, except that instead of specifying the actual target processor type, and hence *************** specified in this option, but still choo *** 4738,4744 **** will generate based on the cpu specified by a \fB\-mcpu=\fR option. For some \s-1ARM\s0 implementations better performance can be obtained by using this option. ! .Ip "\fB\-march=\fR\fIname\fR" 4 .IX Item "-march=name" This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this name to determine what kind of instructions it can emit when generating --- 4740,4746 ---- will generate based on the cpu specified by a \fB\-mcpu=\fR option. For some \s-1ARM\s0 implementations better performance can be obtained by using this option. ! .IP "\fB\-march=\fR\fIname\fR" 4 .IX Item "-march=name" This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this name to determine what kind of instructions it can emit when generating *************** assembly code. This option can be used *** 4746,4761 **** of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR, \&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR, \&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR. ! .Ip "\fB\-mfpe=\fR\fInumber\fR" 4 .IX Item "-mfpe=number" .PD 0 ! .Ip "\fB\-mfp=\fR\fInumber\fR" 4 .IX Item "-mfp=number" .PD This specifies the version of the floating point emulation available on the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0. ! .Ip "\fB\-mstructure-size-boundary=\fR\fIn\fR" 4 .IX Item "-mstructure-size-boundary=n" The size of all structures and unions will be rounded up to a multiple of the number of bits set by this option. Permissible values are 8 and --- 4748,4763 ---- of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR, \&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR, \&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR. ! .IP "\fB\-mfpe=\fR\fInumber\fR" 4 .IX Item "-mfpe=number" .PD 0 ! .IP "\fB\-mfp=\fR\fInumber\fR" 4 .IX Item "-mfp=number" .PD This specifies the version of the floating point emulation available on the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0. ! .IP "\fB\-mstructure-size-boundary=\fR\fIn\fR" 4 .IX Item "-mstructure-size-boundary=n" The size of all structures and unions will be rounded up to a multiple of the number of bits set by this option. Permissible values are 8 and *************** of the program. The two values are pote *** 4766,4780 **** compiled with one value cannot necessarily expect to work with code or libraries compiled with the other value, if they exchange information using structures or unions. ! .Ip "\fB\-mabort-on-noreturn\fR" 4 .IX Item "-mabort-on-noreturn" Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a \&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to return. ! .Ip "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .Ip "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Tells the compiler to perform function calls by first loading the --- 4768,4782 ---- compiled with one value cannot necessarily expect to work with code or libraries compiled with the other value, if they exchange information using structures or unions. ! .IP "\fB\-mabort-on-noreturn\fR" 4 .IX Item "-mabort-on-noreturn" Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a \&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to return. ! .IP "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .IP "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Tells the compiler to perform function calls by first loading the *************** placing the function calls within the sc *** 4800,4819 **** long_calls_off\fR directive. Note these switches have no effect on how the compiler generates code to handle function calls via function pointers. ! .Ip "\fB\-mnop-fun-dllimport\fR" 4 .IX Item "-mnop-fun-dllimport" Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute. ! .Ip "\fB\-msingle-pic-base\fR" 4 .IX Item "-msingle-pic-base" Treat the register used for \s-1PIC\s0 addressing as read-only, rather than loading it in the prologue for each function. The run-time system is responsible for initialising this register with an appropriate value before execution begins. ! .Ip "\fB\-mpic-register=\fR\fIreg\fR" 4 .IX Item "-mpic-register=reg" Specify the register to be used for \s-1PIC\s0 addressing. The default is R10 unless stack-checking is enabled, when R9 is used. ! .Ip "\fB\-mpoke-function-name\fR" 4 .IX Item "-mpoke-function-name" Write the name of each function into the text section, directly preceding the function prologue. The generated code is similar to this: --- 4802,4821 ---- long_calls_off\fR directive. Note these switches have no effect on how the compiler generates code to handle function calls via function pointers. ! .IP "\fB\-mnop-fun-dllimport\fR" 4 .IX Item "-mnop-fun-dllimport" Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute. ! .IP "\fB\-msingle-pic-base\fR" 4 .IX Item "-msingle-pic-base" Treat the register used for \s-1PIC\s0 addressing as read-only, rather than loading it in the prologue for each function. The run-time system is responsible for initialising this register with an appropriate value before execution begins. ! .IP "\fB\-mpic-register=\fR\fIreg\fR" 4 .IX Item "-mpic-register=reg" Specify the register to be used for \s-1PIC\s0 addressing. The default is R10 unless stack-checking is enabled, when R9 is used. ! .IP "\fB\-mpoke-function-name\fR" 4 .IX Item "-mpoke-function-name" Write the name of each function into the text section, directly preceding the function prologue. The generated code is similar to this: *************** When performing a stack backtrace, code *** 4834,4860 **** location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that there is a function name embedded immediately preceding this location and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR. ! .Ip "\fB\-mthumb\fR" 4 .IX Item "-mthumb" Generate code for the 16\-bit Thumb instruction set. The default is to use the 32\-bit \s-1ARM\s0 instruction set. ! .Ip "\fB\-mtpcs-frame\fR" 4 .IX Item "-mtpcs-frame" Generate a stack frame that is compliant with the Thumb Procedure Call Standard for all non-leaf functions. (A leaf function is one that does not call any other functions.) The default is \fB\-mno-tpcs-frame\fR. ! .Ip "\fB\-mtpcs-leaf-frame\fR" 4 .IX Item "-mtpcs-leaf-frame" Generate a stack frame that is compliant with the Thumb Procedure Call Standard for all leaf functions. (A leaf function is one that does not call any other functions.) The default is \fB\-mno-apcs-leaf-frame\fR. ! .Ip "\fB\-mcallee-super-interworking\fR" 4 .IX Item "-mcallee-super-interworking" Gives all externally visible functions in the file being compiled an \s-1ARM\s0 instruction set header which switches to Thumb mode before executing the rest of the function. This allows these functions to be called from non-interworking code. ! .Ip "\fB\-mcaller-super-interworking\fR" 4 .IX Item "-mcaller-super-interworking" Allows calls via function pointers (including virtual functions) to execute correctly regardless of whether the target code has been --- 4836,4862 ---- location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that there is a function name embedded immediately preceding this location and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR. ! .IP "\fB\-mthumb\fR" 4 .IX Item "-mthumb" Generate code for the 16\-bit Thumb instruction set. The default is to use the 32\-bit \s-1ARM\s0 instruction set. ! .IP "\fB\-mtpcs-frame\fR" 4 .IX Item "-mtpcs-frame" Generate a stack frame that is compliant with the Thumb Procedure Call Standard for all non-leaf functions. (A leaf function is one that does not call any other functions.) The default is \fB\-mno-tpcs-frame\fR. ! .IP "\fB\-mtpcs-leaf-frame\fR" 4 .IX Item "-mtpcs-leaf-frame" Generate a stack frame that is compliant with the Thumb Procedure Call Standard for all leaf functions. (A leaf function is one that does not call any other functions.) The default is \fB\-mno-apcs-leaf-frame\fR. ! .IP "\fB\-mcallee-super-interworking\fR" 4 .IX Item "-mcallee-super-interworking" Gives all externally visible functions in the file being compiled an \s-1ARM\s0 instruction set header which switches to Thumb mode before executing the rest of the function. This allows these functions to be called from non-interworking code. ! .IP "\fB\-mcaller-super-interworking\fR" 4 .IX Item "-mcaller-super-interworking" Allows calls via function pointers (including virtual functions) to execute correctly regardless of whether the target code has been *************** of executing a function pointer if this *** 4865,4871 **** .IX Subsection "MN10200 Options" .PP These \fB\-m\fR options are defined for Matsushita \s-1MN10200\s0 architectures: ! .Ip "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Indicate to the linker that it should perform a relaxation optimization pass to shorten branches, calls and absolute memory addresses. This option only --- 4867,4873 ---- .IX Subsection "MN10200 Options" .PP These \fB\-m\fR options are defined for Matsushita \s-1MN10200\s0 architectures: ! .IP "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Indicate to the linker that it should perform a relaxation optimization pass to shorten branches, calls and absolute memory addresses. This option only *************** This option makes symbolic debugging imp *** 4877,4901 **** .IX Subsection "MN10300 Options" .PP These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures: ! .Ip "\fB\-mmult-bug\fR" 4 .IX Item "-mmult-bug" Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0 processors. This is the default. ! .Ip "\fB\-mno-mult-bug\fR" 4 .IX Item "-mno-mult-bug" Do not generate code to avoid bugs in the multiply instructions for the \&\s-1MN10300\s0 processors. ! .Ip "\fB\-mam33\fR" 4 .IX Item "-mam33" Generate code which uses features specific to the \s-1AM33\s0 processor. ! .Ip "\fB\-mno-am33\fR" 4 .IX Item "-mno-am33" Do not generate code which uses features specific to the \s-1AM33\s0 processor. This is the default. ! .Ip "\fB\-mno-crt0\fR" 4 .IX Item "-mno-crt0" Do not link in the C run-time initialization object file. ! .Ip "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Indicate to the linker that it should perform a relaxation optimization pass to shorten branches, calls and absolute memory addresses. This option only --- 4879,4903 ---- .IX Subsection "MN10300 Options" .PP These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures: ! .IP "\fB\-mmult-bug\fR" 4 .IX Item "-mmult-bug" Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0 processors. This is the default. ! .IP "\fB\-mno-mult-bug\fR" 4 .IX Item "-mno-mult-bug" Do not generate code to avoid bugs in the multiply instructions for the \&\s-1MN10300\s0 processors. ! .IP "\fB\-mam33\fR" 4 .IX Item "-mam33" Generate code which uses features specific to the \s-1AM33\s0 processor. ! .IP "\fB\-mno-am33\fR" 4 .IX Item "-mno-am33" Do not generate code which uses features specific to the \s-1AM33\s0 processor. This is the default. ! .IP "\fB\-mno-crt0\fR" 4 .IX Item "-mno-crt0" Do not link in the C run-time initialization object file. ! .IP "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Indicate to the linker that it should perform a relaxation optimization pass to shorten branches, calls and absolute memory addresses. This option only *************** This option makes symbolic debugging imp *** 4907,4913 **** .IX Subsection "M32R/D Options" .PP These \fB\-m\fR options are defined for Mitsubishi M32R/D architectures: ! .Ip "\fB\-mcode-model=small\fR" 4 .IX Item "-mcode-model=small" Assume all objects live in the lower 16MB of memory (so that their addresses can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines --- 4909,4915 ---- .IX Subsection "M32R/D Options" .PP These \fB\-m\fR options are defined for Mitsubishi M32R/D architectures: ! .IP "\fB\-mcode-model=small\fR" 4 .IX Item "-mcode-model=small" Assume all objects live in the lower 16MB of memory (so that their addresses can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines *************** This is the default. *** 4916,4934 **** .Sp The addressability of a particular object can be set with the \&\f(CW\*(C`model\*(C'\fR attribute. ! .Ip "\fB\-mcode-model=medium\fR" 4 .IX Item "-mcode-model=medium" Assume objects may be anywhere in the 32\-bit address space (the compiler will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. ! .Ip "\fB\-mcode-model=large\fR" 4 .IX Item "-mcode-model=large" Assume objects may be anywhere in the 32\-bit address space (the compiler will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR instruction sequence). ! .Ip "\fB\-msdata=none\fR" 4 .IX Item "-msdata=none" Disable use of the small data area. Variables will be put into one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the --- 4918,4936 ---- .Sp The addressability of a particular object can be set with the \&\f(CW\*(C`model\*(C'\fR attribute. ! .IP "\fB\-mcode-model=medium\fR" 4 .IX Item "-mcode-model=medium" Assume objects may be anywhere in the 32\-bit address space (the compiler will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction. ! .IP "\fB\-mcode-model=large\fR" 4 .IX Item "-mcode-model=large" Assume objects may be anywhere in the 32\-bit address space (the compiler will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR instruction sequence). ! .IP "\fB\-msdata=none\fR" 4 .IX Item "-msdata=none" Disable use of the small data area. Variables will be put into one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the *************** This is the default. *** 4938,4952 **** The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR. Objects may be explicitly put in the small data area with the \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections. ! .Ip "\fB\-msdata=sdata\fR" 4 .IX Item "-msdata=sdata" Put small global and static data in the small data area, but do not generate special code to reference them. ! .Ip "\fB\-msdata=use\fR" 4 .IX Item "-msdata=use" Put small global and static data in the small data area, and generate special instructions to reference them. ! .Ip "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" Put global and static objects less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss --- 4940,4954 ---- The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR. Objects may be explicitly put in the small data area with the \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections. ! .IP "\fB\-msdata=sdata\fR" 4 .IX Item "-msdata=sdata" Put small global and static data in the small data area, but do not generate special code to reference them. ! .IP "\fB\-msdata=use\fR" 4 .IX Item "-msdata=use" Put small global and static data in the small data area, and generate special instructions to reference them. ! .IP "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" Put global and static objects less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss *************** generated. *** 4963,4998 **** .IX Subsection "M88K Options" .PP These \fB\-m\fR options are defined for Motorola 88k architectures: ! .Ip "\fB\-m88000\fR" 4 .IX Item "-m88000" Generate code that works well on both the m88100 and the m88110. ! .Ip "\fB\-m88100\fR" 4 .IX Item "-m88100" Generate code that works best for the m88100, but that also runs on the m88110. ! .Ip "\fB\-m88110\fR" 4 .IX Item "-m88110" Generate code that works best for the m88110, and may not run on the m88100. ! .Ip "\fB\-mbig-pic\fR" 4 .IX Item "-mbig-pic" Obsolete option to be removed from the next revision. Use \fB\-fPIC\fR. ! .Ip "\fB\-midentify-revision\fR" 4 .IX Item "-midentify-revision" Include an \f(CW\*(C`ident\*(C'\fR directive in the assembler output recording the source file name, compiler name and version, timestamp, and compilation flags used. ! .Ip "\fB\-mno-underscores\fR" 4 .IX Item "-mno-underscores" In assembler output, emit symbol names without adding an underscore character at the beginning of each name. The default is to use an underscore as prefix on each name. ! .Ip "\fB\-mocs-debug-info\fR" 4 .IX Item "-mocs-debug-info" .PD 0 ! .Ip "\fB\-mno-ocs-debug-info\fR" 4 .IX Item "-mno-ocs-debug-info" .PD Include (or omit) additional debugging information (about registers used --- 4965,5000 ---- .IX Subsection "M88K Options" .PP These \fB\-m\fR options are defined for Motorola 88k architectures: ! .IP "\fB\-m88000\fR" 4 .IX Item "-m88000" Generate code that works well on both the m88100 and the m88110. ! .IP "\fB\-m88100\fR" 4 .IX Item "-m88100" Generate code that works best for the m88100, but that also runs on the m88110. ! .IP "\fB\-m88110\fR" 4 .IX Item "-m88110" Generate code that works best for the m88110, and may not run on the m88100. ! .IP "\fB\-mbig-pic\fR" 4 .IX Item "-mbig-pic" Obsolete option to be removed from the next revision. Use \fB\-fPIC\fR. ! .IP "\fB\-midentify-revision\fR" 4 .IX Item "-midentify-revision" Include an \f(CW\*(C`ident\*(C'\fR directive in the assembler output recording the source file name, compiler name and version, timestamp, and compilation flags used. ! .IP "\fB\-mno-underscores\fR" 4 .IX Item "-mno-underscores" In assembler output, emit symbol names without adding an underscore character at the beginning of each name. The default is to use an underscore as prefix on each name. ! .IP "\fB\-mocs-debug-info\fR" 4 .IX Item "-mocs-debug-info" .PD 0 ! .IP "\fB\-mno-ocs-debug-info\fR" 4 .IX Item "-mno-ocs-debug-info" .PD Include (or omit) additional debugging information (about registers used *************** Standard, ``\s-1OCS\s0''. This extra in *** 5001,5007 **** has had the frame pointer eliminated. The default for \s-1DG/UX\s0, SVr4, and Delta 88 SVr3.2 is to include this information; other 88k configurations omit this information by default. ! .Ip "\fB\-mocs-frame-position\fR" 4 .IX Item "-mocs-frame-position" When emitting \s-1COFF\s0 debugging information for automatic variables and parameters stored on the stack, use the offset from the canonical frame --- 5003,5009 ---- has had the frame pointer eliminated. The default for \s-1DG/UX\s0, SVr4, and Delta 88 SVr3.2 is to include this information; other 88k configurations omit this information by default. ! .IP "\fB\-mocs-frame-position\fR" 4 .IX Item "-mocs-frame-position" When emitting \s-1COFF\s0 debugging information for automatic variables and parameters stored on the stack, use the offset from the canonical frame *************** address, which is the stack pointer (reg *** 5009,5025 **** function. The \s-1DG/UX\s0, SVr4, Delta88 SVr3.2, and \s-1BCS\s0 configurations use \&\fB\-mocs-frame-position\fR; other 88k configurations have the default \&\fB\-mno-ocs-frame-position\fR. ! .Ip "\fB\-mno-ocs-frame-position\fR" 4 .IX Item "-mno-ocs-frame-position" When emitting \s-1COFF\s0 debugging information for automatic variables and parameters stored on the stack, use the offset from the frame pointer register (register 30). When this option is in effect, the frame pointer is not eliminated when debugging information is selected by the \&\-g switch. ! .Ip "\fB\-moptimize-arg-area\fR" 4 .IX Item "-moptimize-arg-area" .PD 0 ! .Ip "\fB\-mno-optimize-arg-area\fR" 4 .IX Item "-mno-optimize-arg-area" .PD Control how function arguments are stored in stack frames. --- 5011,5027 ---- function. The \s-1DG/UX\s0, SVr4, Delta88 SVr3.2, and \s-1BCS\s0 configurations use \&\fB\-mocs-frame-position\fR; other 88k configurations have the default \&\fB\-mno-ocs-frame-position\fR. ! .IP "\fB\-mno-ocs-frame-position\fR" 4 .IX Item "-mno-ocs-frame-position" When emitting \s-1COFF\s0 debugging information for automatic variables and parameters stored on the stack, use the offset from the frame pointer register (register 30). When this option is in effect, the frame pointer is not eliminated when debugging information is selected by the \&\-g switch. ! .IP "\fB\-moptimize-arg-area\fR" 4 .IX Item "-moptimize-arg-area" .PD 0 ! .IP "\fB\-mno-optimize-arg-area\fR" 4 .IX Item "-mno-optimize-arg-area" .PD Control how function arguments are stored in stack frames. *************** Control how function arguments are store *** 5027,5033 **** conflicts with the 88open specifications. The opposite alternative, \&\fB\-mno-optimize-arg-area\fR, agrees with 88open standards. By default \&\s-1GCC\s0 does not optimize the argument area. ! .Ip "\fB\-mshort-data-\fR\fInum\fR" 4 .IX Item "-mshort-data-num" Generate smaller data references by making them relative to \f(CW\*(C`r0\*(C'\fR, which allows loading a value using a single instruction (rather than the --- 5029,5035 ---- conflicts with the 88open specifications. The opposite alternative, \&\fB\-mno-optimize-arg-area\fR, agrees with 88open standards. By default \&\s-1GCC\s0 does not optimize the argument area. ! .IP "\fB\-mshort-data-\fR\fInum\fR" 4 .IX Item "-mshort-data-num" Generate smaller data references by making them relative to \f(CW\*(C`r0\*(C'\fR, which allows loading a value using a single instruction (rather than the *************** specifying \fInum\fR with this option. *** 5037,5046 **** involving displacements of less than 512 bytes. \&\fB\-mshort-data-\fR\fInum\fR is not effective for \fInum\fR greater than 64k. ! .Ip "\fB\-mserialize-volatile\fR" 4 .IX Item "-mserialize-volatile" .PD 0 ! .Ip "\fB\-mno-serialize-volatile\fR" 4 .IX Item "-mno-serialize-volatile" .PD Do, or don't, generate code to guarantee sequential consistency --- 5039,5048 ---- involving displacements of less than 512 bytes. \&\fB\-mshort-data-\fR\fInum\fR is not effective for \fInum\fR greater than 64k. ! .IP "\fB\-mserialize-volatile\fR" 4 .IX Item "-mserialize-volatile" .PD 0 ! .IP "\fB\-mno-serialize-volatile\fR" 4 .IX Item "-mno-serialize-volatile" .PD Do, or don't, generate code to guarantee sequential consistency *************** even when you use \fB\-m88100\fR, so tha *** 5066,5086 **** The extra code generated to guarantee consistency may affect the performance of your application. If you know that you can safely forgo this guarantee, you may use \fB\-mno-serialize-volatile\fR. ! .Ip "\fB\-msvr4\fR" 4 .IX Item "-msvr4" .PD 0 ! .Ip "\fB\-msvr3\fR" 4 .IX Item "-msvr3" .PD Turn on (\fB\-msvr4\fR) or off (\fB\-msvr3\fR) compiler extensions related to System V release 4 (SVr4). This controls the following: .RS 4 ! .Ip "1." 4 Which variant of the assembler syntax to emit. ! .Ip "2." 4 \&\fB\-msvr4\fR makes the C preprocessor recognize \fB#pragma weak\fR that is used on System V release 4. ! .Ip "3." 4 \&\fB\-msvr4\fR makes \s-1GCC\s0 issue additional declaration directives used in SVr4. .RE --- 5068,5088 ---- The extra code generated to guarantee consistency may affect the performance of your application. If you know that you can safely forgo this guarantee, you may use \fB\-mno-serialize-volatile\fR. ! .IP "\fB\-msvr4\fR" 4 .IX Item "-msvr4" .PD 0 ! .IP "\fB\-msvr3\fR" 4 .IX Item "-msvr3" .PD Turn on (\fB\-msvr4\fR) or off (\fB\-msvr3\fR) compiler extensions related to System V release 4 (SVr4). This controls the following: .RS 4 ! .IP "1." 4 Which variant of the assembler syntax to emit. ! .IP "2." 4 \&\fB\-msvr4\fR makes the C preprocessor recognize \fB#pragma weak\fR that is used on System V release 4. ! .IP "3." 4 \&\fB\-msvr4\fR makes \s-1GCC\s0 issue additional declaration directives used in SVr4. .RE *************** SVr4. *** 5090,5102 **** m88k-dg-dgux m88k configurations. \fB\-msvr3\fR is the default for all other m88k configurations. .RE ! .Ip "\fB\-mversion-03.00\fR" 4 .IX Item "-mversion-03.00" This option is obsolete, and is ignored. ! .Ip "\fB\-mno-check-zero-division\fR" 4 .IX Item "-mno-check-zero-division" .PD 0 ! .Ip "\fB\-mcheck-zero-division\fR" 4 .IX Item "-mcheck-zero-division" .PD Do, or don't, generate code to guarantee that integer division by --- 5092,5104 ---- m88k-dg-dgux m88k configurations. \fB\-msvr3\fR is the default for all other m88k configurations. .RE ! .IP "\fB\-mversion-03.00\fR" 4 .IX Item "-mversion-03.00" This option is obsolete, and is ignored. ! .IP "\fB\-mno-check-zero-division\fR" 4 .IX Item "-mno-check-zero-division" .PD 0 ! .IP "\fB\-mcheck-zero-division\fR" 4 .IX Item "-mcheck-zero-division" .PD Do, or don't, generate code to guarantee that integer division by *************** instances of integer division by zero. *** 5115,5121 **** specified, both \fB\-mcheck-zero-division\fR and \&\fB\-mno-check-zero-division\fR are ignored, and no explicit checks for zero-valued divisors are generated. ! .Ip "\fB\-muse-div-instruction\fR" 4 .IX Item "-muse-div-instruction" Use the div instruction for signed integer division on the \&\s-1MC88100\s0 processor. By default, the div instruction is not used. --- 5117,5123 ---- specified, both \fB\-mcheck-zero-division\fR and \&\fB\-mno-check-zero-division\fR are ignored, and no explicit checks for zero-valued divisors are generated. ! .IP "\fB\-muse-div-instruction\fR" 4 .IX Item "-muse-div-instruction" Use the div instruction for signed integer division on the \&\s-1MC88100\s0 processor. By default, the div instruction is not used. *************** for signed integer division. *** 5142,5157 **** Note that the result of dividing \f(CW\*(C`INT_MIN\*(C'\fR by \-1 is undefined. In particular, the behavior of such a division with and without \&\fB\-muse-div-instruction\fR may differ. ! .Ip "\fB\-mtrap-large-shift\fR" 4 .IX Item "-mtrap-large-shift" .PD 0 ! .Ip "\fB\-mhandle-large-shift\fR" 4 .IX Item "-mhandle-large-shift" .PD Include code to detect bit-shifts of more than 31 bits; respectively, trap such shifts or emit code to handle them properly. By default \s-1GCC\s0 makes no special provision for large bit shifts. ! .Ip "\fB\-mwarn-passed-structs\fR" 4 .IX Item "-mwarn-passed-structs" Warn when a function passes a struct as an argument or result. Structure-passing conventions have changed during the evolution of the C --- 5144,5159 ---- Note that the result of dividing \f(CW\*(C`INT_MIN\*(C'\fR by \-1 is undefined. In particular, the behavior of such a division with and without \&\fB\-muse-div-instruction\fR may differ. ! .IP "\fB\-mtrap-large-shift\fR" 4 .IX Item "-mtrap-large-shift" .PD 0 ! .IP "\fB\-mhandle-large-shift\fR" 4 .IX Item "-mhandle-large-shift" .PD Include code to detect bit-shifts of more than 31 bits; respectively, trap such shifts or emit code to handle them properly. By default \s-1GCC\s0 makes no special provision for large bit shifts. ! .IP "\fB\-mwarn-passed-structs\fR" 4 .IX Item "-mwarn-passed-structs" Warn when a function passes a struct as an argument or result. Structure-passing conventions have changed during the evolution of the C *************** language, and are often the source of po *** 5162,5191 **** .IX Subsection "IBM RS/6000 and PowerPC Options" .PP These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC: ! .Ip "\fB\-mpower\fR" 4 .IX Item "-mpower" .PD 0 ! .Ip "\fB\-mno-power\fR" 4 .IX Item "-mno-power" ! .Ip "\fB\-mpower2\fR" 4 .IX Item "-mpower2" ! .Ip "\fB\-mno-power2\fR" 4 .IX Item "-mno-power2" ! .Ip "\fB\-mpowerpc\fR" 4 .IX Item "-mpowerpc" ! .Ip "\fB\-mno-powerpc\fR" 4 .IX Item "-mno-powerpc" ! .Ip "\fB\-mpowerpc-gpopt\fR" 4 .IX Item "-mpowerpc-gpopt" ! .Ip "\fB\-mno-powerpc-gpopt\fR" 4 .IX Item "-mno-powerpc-gpopt" ! .Ip "\fB\-mpowerpc-gfxopt\fR" 4 .IX Item "-mpowerpc-gfxopt" ! .Ip "\fB\-mno-powerpc-gfxopt\fR" 4 .IX Item "-mno-powerpc-gfxopt" ! .Ip "\fB\-mpowerpc64\fR" 4 .IX Item "-mpowerpc64" ! .Ip "\fB\-mno-powerpc64\fR" 4 .IX Item "-mno-powerpc64" .PD \&\s-1GCC\s0 supports two related instruction set architectures for the --- 5164,5193 ---- .IX Subsection "IBM RS/6000 and PowerPC Options" .PP These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC: ! .IP "\fB\-mpower\fR" 4 .IX Item "-mpower" .PD 0 ! .IP "\fB\-mno-power\fR" 4 .IX Item "-mno-power" ! .IP "\fB\-mpower2\fR" 4 .IX Item "-mpower2" ! .IP "\fB\-mno-power2\fR" 4 .IX Item "-mno-power2" ! .IP "\fB\-mpowerpc\fR" 4 .IX Item "-mpowerpc" ! .IP "\fB\-mno-powerpc\fR" 4 .IX Item "-mno-powerpc" ! .IP "\fB\-mpowerpc-gpopt\fR" 4 .IX Item "-mpowerpc-gpopt" ! .IP "\fB\-mno-powerpc-gpopt\fR" 4 .IX Item "-mno-powerpc-gpopt" ! .IP "\fB\-mpowerpc-gfxopt\fR" 4 .IX Item "-mpowerpc-gfxopt" ! .IP "\fB\-mno-powerpc-gfxopt\fR" 4 .IX Item "-mno-powerpc-gfxopt" ! .IP "\fB\-mpowerpc64\fR" 4 .IX Item "-mpowerpc64" ! .IP "\fB\-mno-powerpc64\fR" 4 .IX Item "-mno-powerpc64" .PD \&\s-1GCC\s0 supports two related instruction set architectures for the *************** architectures plus some special \s-1AIX\ *** 5232,5241 **** the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR permits \s-1GCC\s0 to use any instruction from either architecture and to allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0. ! .Ip "\fB\-mnew-mnemonics\fR" 4 .IX Item "-mnew-mnemonics" .PD 0 ! .Ip "\fB\-mold-mnemonics\fR" 4 .IX Item "-mold-mnemonics" .PD Select which mnemonics to use in the generated assembler code. --- 5234,5243 ---- the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR permits \s-1GCC\s0 to use any instruction from either architecture and to allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0. ! .IP "\fB\-mnew-mnemonics\fR" 4 .IX Item "-mnew-mnemonics" .PD 0 ! .IP "\fB\-mold-mnemonics\fR" 4 .IX Item "-mold-mnemonics" .PD Select which mnemonics to use in the generated assembler code. *************** use. Specifying \fB\-mcpu=\fR\fIcpu_typ *** 5251,5257 **** value of these option. Unless you are building a cross-compiler, you should normally not specify either \fB\-mnew-mnemonics\fR or \&\fB\-mold-mnemonics\fR, but should instead accept the default. ! .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type \fIcpu_type\fR. --- 5253,5259 ---- value of these option. Unless you are building a cross-compiler, you should normally not specify either \fB\-mnew-mnemonics\fR or \&\fB\-mold-mnemonics\fR, but should instead accept the default. ! .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set architecture type, register usage, choice of mnemonics, and instruction scheduling parameters for machine type \fIcpu_type\fR. *************** the \fBnew-mnemonics\fR option. *** 5298,5304 **** .Sp Specifying \fB\-mcpu=403\fR, \fB\-mcpu=821\fR, or \fB\-mcpu=860\fR also enables the \fB\-msoft-float\fR option. ! .Ip "\fB\-mtune=\fR\fIcpu_type\fR" 4 .IX Item "-mtune=cpu_type" Set the instruction scheduling parameters for machine type \&\fIcpu_type\fR, but do not set the architecture type, register usage, --- 5300,5306 ---- .Sp Specifying \fB\-mcpu=403\fR, \fB\-mcpu=821\fR, or \fB\-mcpu=860\fR also enables the \fB\-msoft-float\fR option. ! .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4 .IX Item "-mtune=cpu_type" Set the instruction scheduling parameters for machine type \&\fIcpu_type\fR, but do not set the architecture type, register usage, *************** values for \fIcpu_type\fR are used for \ *** 5307,5320 **** for \fB\-mcpu=\fR\fIcpu_type\fR. The \fB\-mtune=\fR\fIcpu_type\fR option overrides the \fB\-mcpu=\fR\fIcpu_type\fR option in terms of instruction scheduling parameters. ! .Ip "\fB\-mfull-toc\fR" 4 .IX Item "-mfull-toc" .PD 0 ! .Ip "\fB\-mno-fp-in-toc\fR" 4 .IX Item "-mno-fp-in-toc" ! .Ip "\fB\-mno-sum-in-toc\fR" 4 .IX Item "-mno-sum-in-toc" ! .Ip "\fB\-mminimal-toc\fR" 4 .IX Item "-mminimal-toc" .PD Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for --- 5309,5322 ---- for \fB\-mcpu=\fR\fIcpu_type\fR. The \fB\-mtune=\fR\fIcpu_type\fR option overrides the \fB\-mcpu=\fR\fIcpu_type\fR option in terms of instruction scheduling parameters. ! .IP "\fB\-mfull-toc\fR" 4 .IX Item "-mfull-toc" .PD 0 ! .IP "\fB\-mno-fp-in-toc\fR" 4 .IX Item "-mno-fp-in-toc" ! .IP "\fB\-mno-sum-in-toc\fR" 4 .IX Item "-mno-sum-in-toc" ! .IP "\fB\-mminimal-toc\fR" 4 .IX Item "-mminimal-toc" .PD Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for *************** these options, specify \fB\-mminimal-toc *** 5340,5349 **** option, \s-1GCC\s0 will produce code that is slower and larger but which uses extremely little \s-1TOC\s0 space. You may wish to use this option only on files that contain less frequently executed code. ! .Ip "\fB\-maix64\fR" 4 .IX Item "-maix64" .PD 0 ! .Ip "\fB\-maix32\fR" 4 .IX Item "-maix32" .PD Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit --- 5342,5351 ---- option, \s-1GCC\s0 will produce code that is slower and larger but which uses extremely little \s-1TOC\s0 space. You may wish to use this option only on files that contain less frequently executed code. ! .IP "\fB\-maix64\fR" 4 .IX Item "-maix64" .PD 0 ! .IP "\fB\-maix32\fR" 4 .IX Item "-maix32" .PD Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit *************** Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and *** 5351,5360 **** Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and implies \fB\-mno-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR. ! .Ip "\fB\-mxl-call\fR" 4 .IX Item "-mxl-call" .PD 0 ! .Ip "\fB\-mno-xl-call\fR" 4 .IX Item "-mno-xl-call" .PD On \s-1AIX\s0, pass floating-point arguments to prototyped functions beyond the --- 5353,5362 ---- Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and implies \fB\-mno-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR. ! .IP "\fB\-mxl-call\fR" 4 .IX Item "-mxl-call" .PD 0 ! .IP "\fB\-mno-xl-call\fR" 4 .IX Item "-mno-xl-call" .PD On \s-1AIX\s0, pass floating-point arguments to prototyped functions beyond the *************** optimization. Because always storing fl *** 5368,5379 **** stack is inefficient and rarely needed, this option is not enabled by default and only is necessary when calling subroutines compiled by \s-1AIX\s0 \&\s-1XL\s0 compilers without optimization. ! .Ip "\fB\-mthreads\fR" 4 .IX Item "-mthreads" Support \fI\s-1AIX\s0 Threads\fR. Link an application written to use \&\fIpthreads\fR with special libraries and startup code to enable the application to run. ! .Ip "\fB\-mpe\fR" 4 .IX Item "-mpe" Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an application written to use message passing with special startup code to --- 5370,5381 ---- stack is inefficient and rarely needed, this option is not enabled by default and only is necessary when calling subroutines compiled by \s-1AIX\s0 \&\s-1XL\s0 compilers without optimization. ! .IP "\fB\-mthreads\fR" 4 .IX Item "-mthreads" Support \fI\s-1AIX\s0 Threads\fR. Link an application written to use \&\fIpthreads\fR with special libraries and startup code to enable the application to run. ! .IP "\fB\-mpe\fR" 4 .IX Item "-mpe" Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an application written to use message passing with special startup code to *************** must be overridden with the \fB\-specs=\ *** 5383,5401 **** appropriate directory location. The Parallel Environment does not support threads, so the \fB\-mpe\fR option and the \fB\-mthreads\fR option are incompatible. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD 0 ! .Ip "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" .PD Generate code that does not use (uses) the floating-point register set. Software floating point emulation is provided if you use the \&\fB\-msoft-float\fR option, and pass the option to \s-1GCC\s0 when linking. ! .Ip "\fB\-mmultiple\fR" 4 .IX Item "-mmultiple" .PD 0 ! .Ip "\fB\-mno-multiple\fR" 4 .IX Item "-mno-multiple" .PD Generate code that uses (does not use) the load multiple word --- 5385,5403 ---- appropriate directory location. The Parallel Environment does not support threads, so the \fB\-mpe\fR option and the \fB\-mthreads\fR option are incompatible. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD 0 ! .IP "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" .PD Generate code that does not use (uses) the floating-point register set. Software floating point emulation is provided if you use the \&\fB\-msoft-float\fR option, and pass the option to \s-1GCC\s0 when linking. ! .IP "\fB\-mmultiple\fR" 4 .IX Item "-mmultiple" .PD 0 ! .IP "\fB\-mno-multiple\fR" 4 .IX Item "-mno-multiple" .PD Generate code that uses (does not use) the load multiple word *************** generated on PowerPC systems. Do not us *** 5405,5414 **** endian PowerPC systems, since those instructions do not work when the processor is in little endian mode. The exceptions are \s-1PPC740\s0 and \&\s-1PPC750\s0 which permit the instructions usage in little endian mode. ! .Ip "\fB\-mstring\fR" 4 .IX Item "-mstring" .PD 0 ! .Ip "\fB\-mno-string\fR" 4 .IX Item "-mno-string" .PD Generate code that uses (does not use) the load string instructions --- 5407,5416 ---- endian PowerPC systems, since those instructions do not work when the processor is in little endian mode. The exceptions are \s-1PPC740\s0 and \&\s-1PPC750\s0 which permit the instructions usage in little endian mode. ! .IP "\fB\-mstring\fR" 4 .IX Item "-mstring" .PD 0 ! .IP "\fB\-mno-string\fR" 4 .IX Item "-mno-string" .PD Generate code that uses (does not use) the load string instructions *************** do small block moves. These instruction *** 5419,5428 **** instructions do not work when the processor is in little endian mode. The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions usage in little endian mode. ! .Ip "\fB\-mupdate\fR" 4 .IX Item "-mupdate" .PD 0 ! .Ip "\fB\-mno-update\fR" 4 .IX Item "-mno-update" .PD Generate code that uses (does not use) the load or store instructions --- 5421,5430 ---- instructions do not work when the processor is in little endian mode. The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions usage in little endian mode. ! .IP "\fB\-mupdate\fR" 4 .IX Item "-mupdate" .PD 0 ! .IP "\fB\-mno-update\fR" 4 .IX Item "-mno-update" .PD Generate code that uses (does not use) the load or store instructions *************** location. These instructions are genera *** 5432,5450 **** stack pointer is updated and the address of the previous frame is stored, which means code that walks the stack frame across interrupts or signals may get corrupted data. ! .Ip "\fB\-mfused-madd\fR" 4 .IX Item "-mfused-madd" .PD 0 ! .Ip "\fB\-mno-fused-madd\fR" 4 .IX Item "-mno-fused-madd" .PD Generate code that uses (does not use) the floating point multiply and accumulate instructions. These instructions are generated by default if hardware floating is used. ! .Ip "\fB\-mno-bit-align\fR" 4 .IX Item "-mno-bit-align" .PD 0 ! .Ip "\fB\-mbit-align\fR" 4 .IX Item "-mbit-align" .PD On System V.4 and embedded PowerPC systems do not (do) force structures --- 5434,5452 ---- stack pointer is updated and the address of the previous frame is stored, which means code that walks the stack frame across interrupts or signals may get corrupted data. ! .IP "\fB\-mfused-madd\fR" 4 .IX Item "-mfused-madd" .PD 0 ! .IP "\fB\-mno-fused-madd\fR" 4 .IX Item "-mno-fused-madd" .PD Generate code that uses (does not use) the floating point multiply and accumulate instructions. These instructions are generated by default if hardware floating is used. ! .IP "\fB\-mno-bit-align\fR" 4 .IX Item "-mno-bit-align" .PD 0 ! .IP "\fB\-mbit-align\fR" 4 .IX Item "-mbit-align" .PD On System V.4 and embedded PowerPC systems do not (do) force structures *************** For example, by default a structure cont *** 5456,5483 **** boundary and have a size of 4 bytes. By using \fB\-mno-bit-align\fR, the structure would be aligned to a 1 byte boundary and be one byte in size. ! .Ip "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD 0 ! .Ip "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD On System V.4 and embedded PowerPC systems do not (do) assume that unaligned memory references will be handled by the system. ! .Ip "\fB\-mrelocatable\fR" 4 .IX Item "-mrelocatable" .PD 0 ! .Ip "\fB\-mno-relocatable\fR" 4 .IX Item "-mno-relocatable" .PD On embedded PowerPC systems generate code that allows (does not allow) the program to be relocated to a different address at runtime. If you use \fB\-mrelocatable\fR on any module, all objects linked together must be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable-lib\fR. ! .Ip "\fB\-mrelocatable-lib\fR" 4 .IX Item "-mrelocatable-lib" .PD 0 ! .Ip "\fB\-mno-relocatable-lib\fR" 4 .IX Item "-mno-relocatable-lib" .PD On embedded PowerPC systems generate code that allows (does not allow) --- 5458,5485 ---- boundary and have a size of 4 bytes. By using \fB\-mno-bit-align\fR, the structure would be aligned to a 1 byte boundary and be one byte in size. ! .IP "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD 0 ! .IP "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD On System V.4 and embedded PowerPC systems do not (do) assume that unaligned memory references will be handled by the system. ! .IP "\fB\-mrelocatable\fR" 4 .IX Item "-mrelocatable" .PD 0 ! .IP "\fB\-mno-relocatable\fR" 4 .IX Item "-mno-relocatable" .PD On embedded PowerPC systems generate code that allows (does not allow) the program to be relocated to a different address at runtime. If you use \fB\-mrelocatable\fR on any module, all objects linked together must be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable-lib\fR. ! .IP "\fB\-mrelocatable-lib\fR" 4 .IX Item "-mrelocatable-lib" .PD 0 ! .IP "\fB\-mno-relocatable-lib\fR" 4 .IX Item "-mno-relocatable-lib" .PD On embedded PowerPC systems generate code that allows (does not allow) *************** the program to be relocated to a differe *** 5485,5546 **** compiled with \fB\-mrelocatable-lib\fR can be linked with either modules compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable-lib\fR or with modules compiled with the \fB\-mrelocatable\fR options. ! .Ip "\fB\-mno-toc\fR" 4 .IX Item "-mno-toc" .PD 0 ! .Ip "\fB\-mtoc\fR" 4 .IX Item "-mtoc" .PD On System V.4 and embedded PowerPC systems do not (do) assume that register 2 contains a pointer to a global area pointing to the addresses used in the program. ! .Ip "\fB\-mlittle\fR" 4 .IX Item "-mlittle" .PD 0 ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" .PD On System V.4 and embedded PowerPC systems compile code for the processor in little endian mode. The \fB\-mlittle-endian\fR option is the same as \fB\-mlittle\fR. ! .Ip "\fB\-mbig\fR" 4 .IX Item "-mbig" .PD 0 ! .Ip "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" .PD On System V.4 and embedded PowerPC systems compile code for the processor in big endian mode. The \fB\-mbig-endian\fR option is the same as \fB\-mbig\fR. ! .Ip "\fB\-mcall-sysv\fR" 4 .IX Item "-mcall-sysv" On System V.4 and embedded PowerPC systems compile code using calling conventions that adheres to the March 1995 draft of the System V Application Binary Interface, PowerPC processor supplement. This is the default unless you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. ! .Ip "\fB\-mcall-sysv-eabi\fR" 4 .IX Item "-mcall-sysv-eabi" Specify both \fB\-mcall-sysv\fR and \fB\-meabi\fR options. ! .Ip "\fB\-mcall-sysv-noeabi\fR" 4 .IX Item "-mcall-sysv-noeabi" Specify both \fB\-mcall-sysv\fR and \fB\-mno-eabi\fR options. ! .Ip "\fB\-mcall-aix\fR" 4 .IX Item "-mcall-aix" On System V.4 and embedded PowerPC systems compile code using calling conventions that are similar to those used on \s-1AIX\s0. This is the default if you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. ! .Ip "\fB\-mcall-solaris\fR" 4 .IX Item "-mcall-solaris" On System V.4 and embedded PowerPC systems compile code for the Solaris operating system. ! .Ip "\fB\-mcall-linux\fR" 4 .IX Item "-mcall-linux" On System V.4 and embedded PowerPC systems compile code for the Linux-based \s-1GNU\s0 system. ! .Ip "\fB\-mprototype\fR" 4 .IX Item "-mprototype" .PD 0 ! .Ip "\fB\-mno-prototype\fR" 4 .IX Item "-mno-prototype" .PD On System V.4 and embedded PowerPC systems assume that all calls to --- 5487,5548 ---- compiled with \fB\-mrelocatable-lib\fR can be linked with either modules compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable-lib\fR or with modules compiled with the \fB\-mrelocatable\fR options. ! .IP "\fB\-mno-toc\fR" 4 .IX Item "-mno-toc" .PD 0 ! .IP "\fB\-mtoc\fR" 4 .IX Item "-mtoc" .PD On System V.4 and embedded PowerPC systems do not (do) assume that register 2 contains a pointer to a global area pointing to the addresses used in the program. ! .IP "\fB\-mlittle\fR" 4 .IX Item "-mlittle" .PD 0 ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" .PD On System V.4 and embedded PowerPC systems compile code for the processor in little endian mode. The \fB\-mlittle-endian\fR option is the same as \fB\-mlittle\fR. ! .IP "\fB\-mbig\fR" 4 .IX Item "-mbig" .PD 0 ! .IP "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" .PD On System V.4 and embedded PowerPC systems compile code for the processor in big endian mode. The \fB\-mbig-endian\fR option is the same as \fB\-mbig\fR. ! .IP "\fB\-mcall-sysv\fR" 4 .IX Item "-mcall-sysv" On System V.4 and embedded PowerPC systems compile code using calling conventions that adheres to the March 1995 draft of the System V Application Binary Interface, PowerPC processor supplement. This is the default unless you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. ! .IP "\fB\-mcall-sysv-eabi\fR" 4 .IX Item "-mcall-sysv-eabi" Specify both \fB\-mcall-sysv\fR and \fB\-meabi\fR options. ! .IP "\fB\-mcall-sysv-noeabi\fR" 4 .IX Item "-mcall-sysv-noeabi" Specify both \fB\-mcall-sysv\fR and \fB\-mno-eabi\fR options. ! .IP "\fB\-mcall-aix\fR" 4 .IX Item "-mcall-aix" On System V.4 and embedded PowerPC systems compile code using calling conventions that are similar to those used on \s-1AIX\s0. This is the default if you configured \s-1GCC\s0 using \fBpowerpc-*\-eabiaix\fR. ! .IP "\fB\-mcall-solaris\fR" 4 .IX Item "-mcall-solaris" On System V.4 and embedded PowerPC systems compile code for the Solaris operating system. ! .IP "\fB\-mcall-linux\fR" 4 .IX Item "-mcall-linux" On System V.4 and embedded PowerPC systems compile code for the Linux-based \s-1GNU\s0 system. ! .IP "\fB\-mprototype\fR" 4 .IX Item "-mprototype" .PD 0 ! .IP "\fB\-mno-prototype\fR" 4 .IX Item "-mno-prototype" .PD On System V.4 and embedded PowerPC systems assume that all calls to *************** indicate whether floating point values w *** 5551,5589 **** registers in case the function takes a variable arguments. With \&\fB\-mprototype\fR, only calls to prototyped variable argument functions will set or clear the bit. ! .Ip "\fB\-msim\fR" 4 .IX Item "-msim" On embedded PowerPC systems, assume that the startup module is called \&\fIsim-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and \&\fIlibc.a\fR. This is the default for \fBpowerpc-*\-eabisim\fR. configurations. ! .Ip "\fB\-mmvme\fR" 4 .IX Item "-mmvme" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and \&\fIlibc.a\fR. ! .Ip "\fB\-mads\fR" 4 .IX Item "-mads" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and \&\fIlibc.a\fR. ! .Ip "\fB\-myellowknife\fR" 4 .IX Item "-myellowknife" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and \&\fIlibc.a\fR. ! .Ip "\fB\-mvxworks\fR" 4 .IX Item "-mvxworks" On System V.4 and embedded PowerPC systems, specify that you are compiling for a VxWorks system. ! .Ip "\fB\-memb\fR" 4 .IX Item "-memb" On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags header to indicate that \fBeabi\fR extended relocations are used. ! .Ip "\fB\-meabi\fR" 4 .IX Item "-meabi" .PD 0 ! .Ip "\fB\-mno-eabi\fR" 4 .IX Item "-mno-eabi" .PD On System V.4 and embedded PowerPC systems do (do not) adhere to the --- 5553,5591 ---- registers in case the function takes a variable arguments. With \&\fB\-mprototype\fR, only calls to prototyped variable argument functions will set or clear the bit. ! .IP "\fB\-msim\fR" 4 .IX Item "-msim" On embedded PowerPC systems, assume that the startup module is called \&\fIsim-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and \&\fIlibc.a\fR. This is the default for \fBpowerpc-*\-eabisim\fR. configurations. ! .IP "\fB\-mmvme\fR" 4 .IX Item "-mmvme" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and \&\fIlibc.a\fR. ! .IP "\fB\-mads\fR" 4 .IX Item "-mads" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and \&\fIlibc.a\fR. ! .IP "\fB\-myellowknife\fR" 4 .IX Item "-myellowknife" On embedded PowerPC systems, assume that the startup module is called \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and \&\fIlibc.a\fR. ! .IP "\fB\-mvxworks\fR" 4 .IX Item "-mvxworks" On System V.4 and embedded PowerPC systems, specify that you are compiling for a VxWorks system. ! .IP "\fB\-memb\fR" 4 .IX Item "-memb" On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags header to indicate that \fBeabi\fR extended relocations are used. ! .IP "\fB\-meabi\fR" 4 .IX Item "-meabi" .PD 0 ! .IP "\fB\-mno-eabi\fR" 4 .IX Item "-mno-eabi" .PD On System V.4 and embedded PowerPC systems do (do not) adhere to the *************** do not call an initialization function f *** 5598,5604 **** \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single small data area. The \fB\-meabi\fR option is on by default if you configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options. ! .Ip "\fB\-msdata=eabi\fR" 4 .IX Item "-msdata=eabi" On System V.4 and embedded PowerPC systems, put small initialized \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which --- 5600,5606 ---- \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single small data area. The \fB\-meabi\fR option is on by default if you configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options. ! .IP "\fB\-msdata=eabi\fR" 4 .IX Item "-msdata=eabi" On System V.4 and embedded PowerPC systems, put small initialized \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which *************** global and static data in the \fB.sbss\f *** 5609,5615 **** the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is incompatible with the \fB\-mrelocatable\fR option. The \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option. ! .Ip "\fB\-msdata=sysv\fR" 4 .IX Item "-msdata=sysv" On System V.4 and embedded PowerPC systems, put small global and static data in the \fB.sdata\fR section, which is pointed to by register --- 5611,5617 ---- the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is incompatible with the \fB\-mrelocatable\fR option. The \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option. ! .IP "\fB\-msdata=sysv\fR" 4 .IX Item "-msdata=sysv" On System V.4 and embedded PowerPC systems, put small global and static data in the \fB.sdata\fR section, which is pointed to by register *************** data in the \fB.sdata\fR section, which *** 5617,5658 **** \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section. The \fB\-msdata=sysv\fR option is incompatible with the \&\fB\-mrelocatable\fR option. ! .Ip "\fB\-msdata=default\fR" 4 .IX Item "-msdata=default" .PD 0 ! .Ip "\fB\-msdata\fR" 4 .IX Item "-msdata" .PD On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used, compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the same as \fB\-msdata=sysv\fR. ! .Ip "\fB\-msdata-data\fR" 4 .IX Item "-msdata-data" On System V.4 and embedded PowerPC systems, put small global and static data in the \fB.sdata\fR section. Put small uninitialized global and static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR to address small data however. This is the default behavior unless other \fB\-msdata\fR options are used. ! .Ip "\fB\-msdata=none\fR" 4 .IX Item "-msdata=none" .PD 0 ! .Ip "\fB\-mno-sdata\fR" 4 .IX Item "-mno-sdata" .PD On embedded PowerPC systems, put all initialized global and static data in the \fB.data\fR section, and all uninitialized data in the \&\fB.bss\fR section. ! .Ip "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" On embedded PowerPC systems, put global and static items less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss section. By default, \fInum\fR is 8. The \&\fB\-G\fR \fInum\fR switch is also passed to the linker. All modules should be compiled with the same \fB\-G\fR \fInum\fR value. ! .Ip "\fB\-mregnames\fR" 4 .IX Item "-mregnames" .PD 0 ! .Ip "\fB\-mno-regnames\fR" 4 .IX Item "-mno-regnames" .PD On System V.4 and embedded PowerPC systems do (do not) emit register --- 5619,5660 ---- \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section. The \fB\-msdata=sysv\fR option is incompatible with the \&\fB\-mrelocatable\fR option. ! .IP "\fB\-msdata=default\fR" 4 .IX Item "-msdata=default" .PD 0 ! .IP "\fB\-msdata\fR" 4 .IX Item "-msdata" .PD On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used, compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the same as \fB\-msdata=sysv\fR. ! .IP "\fB\-msdata-data\fR" 4 .IX Item "-msdata-data" On System V.4 and embedded PowerPC systems, put small global and static data in the \fB.sdata\fR section. Put small uninitialized global and static data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR to address small data however. This is the default behavior unless other \fB\-msdata\fR options are used. ! .IP "\fB\-msdata=none\fR" 4 .IX Item "-msdata=none" .PD 0 ! .IP "\fB\-mno-sdata\fR" 4 .IX Item "-mno-sdata" .PD On embedded PowerPC systems, put all initialized global and static data in the \fB.data\fR section, and all uninitialized data in the \&\fB.bss\fR section. ! .IP "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" On embedded PowerPC systems, put global and static items less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss section. By default, \fInum\fR is 8. The \&\fB\-G\fR \fInum\fR switch is also passed to the linker. All modules should be compiled with the same \fB\-G\fR \fInum\fR value. ! .IP "\fB\-mregnames\fR" 4 .IX Item "-mregnames" .PD 0 ! .IP "\fB\-mno-regnames\fR" 4 .IX Item "-mno-regnames" .PD On System V.4 and embedded PowerPC systems do (do not) emit register *************** names in the assembly language output us *** 5662,5700 **** .IX Subsection "IBM RT Options" .PP These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RT\s0 \s-1PC:\s0 ! .Ip "\fB\-min-line-mul\fR" 4 .IX Item "-min-line-mul" Use an in-line code sequence for integer multiplies. This is the default. ! .Ip "\fB\-mcall-lib-mul\fR" 4 .IX Item "-mcall-lib-mul" Call \f(CW\*(C`lmul$$\*(C'\fR for integer multiples. ! .Ip "\fB\-mfull-fp-blocks\fR" 4 .IX Item "-mfull-fp-blocks" Generate full-size floating point data blocks, including the minimum amount of scratch space recommended by \s-1IBM\s0. This is the default. ! .Ip "\fB\-mminimum-fp-blocks\fR" 4 .IX Item "-mminimum-fp-blocks" Do not include extra scratch space in floating point data blocks. This results in smaller code, but slower execution, since scratch space must be allocated dynamically. ! .Ip "\fB\-mfp-arg-in-fpregs\fR" 4 .IX Item "-mfp-arg-in-fpregs" Use a calling sequence incompatible with the \s-1IBM\s0 calling convention in which floating point arguments are passed in floating point registers. Note that \f(CW\*(C`varargs.h\*(C'\fR and \f(CW\*(C`stdarg.h\*(C'\fR will not work with floating point operands if this option is specified. ! .Ip "\fB\-mfp-arg-in-gregs\fR" 4 .IX Item "-mfp-arg-in-gregs" Use the normal calling convention for floating point arguments. This is the default. ! .Ip "\fB\-mhc-struct-return\fR" 4 .IX Item "-mhc-struct-return" Return structures of more than one word in memory, rather than in a register. This provides compatibility with the MetaWare HighC (hc) compiler. Use the option \fB\-fpcc-struct-return\fR for compatibility with the Portable C Compiler (pcc). ! .Ip "\fB\-mnohc-struct-return\fR" 4 .IX Item "-mnohc-struct-return" Return some structures of more than one word in registers, when convenient. This is the default. For compatibility with the --- 5664,5702 ---- .IX Subsection "IBM RT Options" .PP These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RT\s0 \s-1PC:\s0 ! .IP "\fB\-min-line-mul\fR" 4 .IX Item "-min-line-mul" Use an in-line code sequence for integer multiplies. This is the default. ! .IP "\fB\-mcall-lib-mul\fR" 4 .IX Item "-mcall-lib-mul" Call \f(CW\*(C`lmul$$\*(C'\fR for integer multiples. ! .IP "\fB\-mfull-fp-blocks\fR" 4 .IX Item "-mfull-fp-blocks" Generate full-size floating point data blocks, including the minimum amount of scratch space recommended by \s-1IBM\s0. This is the default. ! .IP "\fB\-mminimum-fp-blocks\fR" 4 .IX Item "-mminimum-fp-blocks" Do not include extra scratch space in floating point data blocks. This results in smaller code, but slower execution, since scratch space must be allocated dynamically. ! .IP "\fB\-mfp-arg-in-fpregs\fR" 4 .IX Item "-mfp-arg-in-fpregs" Use a calling sequence incompatible with the \s-1IBM\s0 calling convention in which floating point arguments are passed in floating point registers. Note that \f(CW\*(C`varargs.h\*(C'\fR and \f(CW\*(C`stdarg.h\*(C'\fR will not work with floating point operands if this option is specified. ! .IP "\fB\-mfp-arg-in-gregs\fR" 4 .IX Item "-mfp-arg-in-gregs" Use the normal calling convention for floating point arguments. This is the default. ! .IP "\fB\-mhc-struct-return\fR" 4 .IX Item "-mhc-struct-return" Return structures of more than one word in memory, rather than in a register. This provides compatibility with the MetaWare HighC (hc) compiler. Use the option \fB\-fpcc-struct-return\fR for compatibility with the Portable C Compiler (pcc). ! .IP "\fB\-mnohc-struct-return\fR" 4 .IX Item "-mnohc-struct-return" Return some structures of more than one word in registers, when convenient. This is the default. For compatibility with the *************** option \fB\-mhc-struct-return\fR. *** 5705,5711 **** .IX Subsection "MIPS Options" .PP These \fB\-m\fR options are defined for the \s-1MIPS\s0 family of computers: ! .Ip "\fB\-mcpu=\fR\fIcpu-type\fR" 4 .IX Item "-mcpu=cpu-type" Assume the defaults for the machine type \fIcpu-type\fR when scheduling instructions. The choices for \fIcpu-type\fR are \fBr2000\fR, \fBr3000\fR, --- 5707,5713 ---- .IX Subsection "MIPS Options" .PP These \fB\-m\fR options are defined for the \s-1MIPS\s0 family of computers: ! .IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4 .IX Item "-mcpu=cpu-type" Assume the defaults for the machine type \fIcpu-type\fR when scheduling instructions. The choices for \fIcpu-type\fR are \fBr2000\fR, \fBr3000\fR, *************** and \fBorion\fR. Additionally, the \fBr *** 5718,5766 **** chip, the compiler will not generate any code that does not meet level 1 of the \s-1MIPS\s0 \s-1ISA\s0 (instruction set architecture) without a \fB\-mipsX\fR or \fB\-mabi\fR switch being used. ! .Ip "\fB\-mips1\fR" 4 .IX Item "-mips1" Issue instructions from level 1 of the \s-1MIPS\s0 \s-1ISA\s0. This is the default. \&\fBr3000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. ! .Ip "\fB\-mips2\fR" 4 .IX Item "-mips2" Issue instructions from level 2 of the \s-1MIPS\s0 \s-1ISA\s0 (branch likely, square root instructions). \fBr6000\fR is the default \fIcpu-type\fR at this \&\s-1ISA\s0 level. ! .Ip "\fB\-mips3\fR" 4 .IX Item "-mips3" Issue instructions from level 3 of the \s-1MIPS\s0 \s-1ISA\s0 (64\-bit instructions). \&\fBr4000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. ! .Ip "\fB\-mips4\fR" 4 .IX Item "-mips4" Issue instructions from level 4 of the \s-1MIPS\s0 \s-1ISA\s0 (conditional move, prefetch, enhanced \s-1FPU\s0 instructions). \fBr8000\fR is the default \&\fIcpu-type\fR at this \s-1ISA\s0 level. ! .Ip "\fB\-mfp32\fR" 4 .IX Item "-mfp32" Assume that 32 32\-bit floating point registers are available. This is the default. ! .Ip "\fB\-mfp64\fR" 4 .IX Item "-mfp64" Assume that 32 64\-bit floating point registers are available. This is the default when the \fB\-mips3\fR option is used. ! .Ip "\fB\-mgp32\fR" 4 .IX Item "-mgp32" Assume that 32 32\-bit general purpose registers are available. This is the default. ! .Ip "\fB\-mgp64\fR" 4 .IX Item "-mgp64" Assume that 32 64\-bit general purpose registers are available. This is the default when the \fB\-mips3\fR option is used. ! .Ip "\fB\-mint64\fR" 4 .IX Item "-mint64" Force int and long types to be 64 bits wide. See \fB\-mlong32\fR for an explanation of the default, and the width of pointers. ! .Ip "\fB\-mlong64\fR" 4 .IX Item "-mlong64" Force long types to be 64 bits wide. See \fB\-mlong32\fR for an explanation of the default, and the width of pointers. ! .Ip "\fB\-mlong32\fR" 4 .IX Item "-mlong32" Force long, int, and pointer types to be 32 bits wide. .Sp --- 5720,5768 ---- chip, the compiler will not generate any code that does not meet level 1 of the \s-1MIPS\s0 \s-1ISA\s0 (instruction set architecture) without a \fB\-mipsX\fR or \fB\-mabi\fR switch being used. ! .IP "\fB\-mips1\fR" 4 .IX Item "-mips1" Issue instructions from level 1 of the \s-1MIPS\s0 \s-1ISA\s0. This is the default. \&\fBr3000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. ! .IP "\fB\-mips2\fR" 4 .IX Item "-mips2" Issue instructions from level 2 of the \s-1MIPS\s0 \s-1ISA\s0 (branch likely, square root instructions). \fBr6000\fR is the default \fIcpu-type\fR at this \&\s-1ISA\s0 level. ! .IP "\fB\-mips3\fR" 4 .IX Item "-mips3" Issue instructions from level 3 of the \s-1MIPS\s0 \s-1ISA\s0 (64\-bit instructions). \&\fBr4000\fR is the default \fIcpu-type\fR at this \s-1ISA\s0 level. ! .IP "\fB\-mips4\fR" 4 .IX Item "-mips4" Issue instructions from level 4 of the \s-1MIPS\s0 \s-1ISA\s0 (conditional move, prefetch, enhanced \s-1FPU\s0 instructions). \fBr8000\fR is the default \&\fIcpu-type\fR at this \s-1ISA\s0 level. ! .IP "\fB\-mfp32\fR" 4 .IX Item "-mfp32" Assume that 32 32\-bit floating point registers are available. This is the default. ! .IP "\fB\-mfp64\fR" 4 .IX Item "-mfp64" Assume that 32 64\-bit floating point registers are available. This is the default when the \fB\-mips3\fR option is used. ! .IP "\fB\-mgp32\fR" 4 .IX Item "-mgp32" Assume that 32 32\-bit general purpose registers are available. This is the default. ! .IP "\fB\-mgp64\fR" 4 .IX Item "-mgp64" Assume that 32 64\-bit general purpose registers are available. This is the default when the \fB\-mips3\fR option is used. ! .IP "\fB\-mint64\fR" 4 .IX Item "-mint64" Force int and long types to be 64 bits wide. See \fB\-mlong32\fR for an explanation of the default, and the width of pointers. ! .IP "\fB\-mlong64\fR" 4 .IX Item "-mlong64" Force long types to be 64 bits wide. See \fB\-mlong32\fR for an explanation of the default, and the width of pointers. ! .IP "\fB\-mlong32\fR" 4 .IX Item "-mlong32" Force long, int, and pointer types to be 32 bits wide. .Sp *************** and longs are 32 bits wide. For \fB\-ma *** 5773,5788 **** are 32 bits, and longs are 64 bits wide. The width of pointer types is the smaller of the width of longs or the width of general purpose registers (which in turn depends on the \s-1ISA\s0). ! .Ip "\fB\-mabi=32\fR" 4 .IX Item "-mabi=32" .PD 0 ! .Ip "\fB\-mabi=o64\fR" 4 .IX Item "-mabi=o64" ! .Ip "\fB\-mabi=n32\fR" 4 .IX Item "-mabi=n32" ! .Ip "\fB\-mabi=64\fR" 4 .IX Item "-mabi=64" ! .Ip "\fB\-mabi=eabi\fR" 4 .IX Item "-mabi=eabi" .PD Generate code for the indicated \s-1ABI\s0. The default instruction level is --- 5775,5790 ---- are 32 bits, and longs are 64 bits wide. The width of pointer types is the smaller of the width of longs or the width of general purpose registers (which in turn depends on the \s-1ISA\s0). ! .IP "\fB\-mabi=32\fR" 4 .IX Item "-mabi=32" .PD 0 ! .IP "\fB\-mabi=o64\fR" 4 .IX Item "-mabi=o64" ! .IP "\fB\-mabi=n32\fR" 4 .IX Item "-mabi=n32" ! .IP "\fB\-mabi=64\fR" 4 .IX Item "-mabi=64" ! .IP "\fB\-mabi=eabi\fR" 4 .IX Item "-mabi=eabi" .PD Generate code for the indicated \s-1ABI\s0. The default instruction level is *************** Generate code for the indicated \s-1ABI\ *** 5790,5796 **** \&\fB\-mips4\fR otherwise. Conversely, with \fB\-mips1\fR or \&\fB\-mips2\fR, the default \s-1ABI\s0 is \fB32\fR; otherwise, the default \s-1ABI\s0 is \fB64\fR. ! .Ip "\fB\-mmips-as\fR" 4 .IX Item "-mmips-as" Generate code for the \s-1MIPS\s0 assembler, and invoke \fImips-tfile\fR to add normal debug information. This is the default for all --- 5792,5798 ---- \&\fB\-mips4\fR otherwise. Conversely, with \fB\-mips1\fR or \&\fB\-mips2\fR, the default \s-1ABI\s0 is \fB32\fR; otherwise, the default \s-1ABI\s0 is \fB64\fR. ! .IP "\fB\-mmips-as\fR" 4 .IX Item "-mmips-as" Generate code for the \s-1MIPS\s0 assembler, and invoke \fImips-tfile\fR to add normal debug information. This is the default for all *************** platforms except for the \s-1OSF/1\s0 re *** 5798,5812 **** object format. If the either of the \fB\-gstabs\fR or \fB\-gstabs+\fR switches are used, the \fImips-tfile\fR program will encapsulate the stabs within \s-1MIPS\s0 \s-1ECOFF\s0. ! .Ip "\fB\-mgas\fR" 4 .IX Item "-mgas" Generate code for the \s-1GNU\s0 assembler. This is the default on the \s-1OSF/1\s0 reference platform, using the OSF/rose object format. Also, this is the default if the configure option \fB\*(--with-gnu-as\fR is used. ! .Ip "\fB\-msplit-addresses\fR" 4 .IX Item "-msplit-addresses" .PD 0 ! .Ip "\fB\-mno-split-addresses\fR" 4 .IX Item "-mno-split-addresses" .PD Generate code to load the high and low parts of address constants separately. --- 5800,5814 ---- object format. If the either of the \fB\-gstabs\fR or \fB\-gstabs+\fR switches are used, the \fImips-tfile\fR program will encapsulate the stabs within \s-1MIPS\s0 \s-1ECOFF\s0. ! .IP "\fB\-mgas\fR" 4 .IX Item "-mgas" Generate code for the \s-1GNU\s0 assembler. This is the default on the \s-1OSF/1\s0 reference platform, using the OSF/rose object format. Also, this is the default if the configure option \fB\*(--with-gnu-as\fR is used. ! .IP "\fB\-msplit-addresses\fR" 4 .IX Item "-msplit-addresses" .PD 0 ! .IP "\fB\-mno-split-addresses\fR" 4 .IX Item "-mno-split-addresses" .PD Generate code to load the high and low parts of address constants separately. *************** This allows \s-1GCC\s0 to optimize away *** 5814,5833 **** bits of addresses. This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. This optimization is enabled by default for some embedded targets where \&\s-1GNU\s0 as and \s-1GNU\s0 ld are standard. ! .Ip "\fB\-mrnames\fR" 4 .IX Item "-mrnames" .PD 0 ! .Ip "\fB\-mno-rnames\fR" 4 .IX Item "-mno-rnames" .PD The \fB\-mrnames\fR switch says to output code using the \s-1MIPS\s0 software names for the registers, instead of the hardware names (ie, \fIa0\fR instead of \fI$4\fR). The only known assembler that supports this option is the Algorithmics assembler. ! .Ip "\fB\-mgpopt\fR" 4 .IX Item "-mgpopt" .PD 0 ! .Ip "\fB\-mno-gpopt\fR" 4 .IX Item "-mno-gpopt" .PD The \fB\-mgpopt\fR switch says to write all of the data declarations --- 5816,5835 ---- bits of addresses. This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. This optimization is enabled by default for some embedded targets where \&\s-1GNU\s0 as and \s-1GNU\s0 ld are standard. ! .IP "\fB\-mrnames\fR" 4 .IX Item "-mrnames" .PD 0 ! .IP "\fB\-mno-rnames\fR" 4 .IX Item "-mno-rnames" .PD The \fB\-mrnames\fR switch says to output code using the \s-1MIPS\s0 software names for the registers, instead of the hardware names (ie, \fIa0\fR instead of \fI$4\fR). The only known assembler that supports this option is the Algorithmics assembler. ! .IP "\fB\-mgpopt\fR" 4 .IX Item "-mgpopt" .PD 0 ! .IP "\fB\-mno-gpopt\fR" 4 .IX Item "-mno-gpopt" .PD The \fB\-mgpopt\fR switch says to write all of the data declarations *************** before the instructions in the text sect *** 5835,5863 **** assembler to generate one word memory references instead of using two words for short global or static data items. This is on by default if optimization is selected. ! .Ip "\fB\-mstats\fR" 4 .IX Item "-mstats" .PD 0 ! .Ip "\fB\-mno-stats\fR" 4 .IX Item "-mno-stats" .PD For each non-inline function processed, the \fB\-mstats\fR switch causes the compiler to emit one line to the standard error file to print statistics about the program (number of registers saved, stack size, etc.). ! .Ip "\fB\-mmemcpy\fR" 4 .IX Item "-mmemcpy" .PD 0 ! .Ip "\fB\-mno-memcpy\fR" 4 .IX Item "-mno-memcpy" .PD The \fB\-mmemcpy\fR switch makes all block moves call the appropriate string function (\fBmemcpy\fR or \fBbcopy\fR) instead of possibly generating inline code. ! .Ip "\fB\-mmips-tfile\fR" 4 .IX Item "-mmips-tfile" .PD 0 ! .Ip "\fB\-mno-mips-tfile\fR" 4 .IX Item "-mno-mips-tfile" .PD The \fB\-mno-mips-tfile\fR switch causes the compiler not --- 5837,5865 ---- assembler to generate one word memory references instead of using two words for short global or static data items. This is on by default if optimization is selected. ! .IP "\fB\-mstats\fR" 4 .IX Item "-mstats" .PD 0 ! .IP "\fB\-mno-stats\fR" 4 .IX Item "-mno-stats" .PD For each non-inline function processed, the \fB\-mstats\fR switch causes the compiler to emit one line to the standard error file to print statistics about the program (number of registers saved, stack size, etc.). ! .IP "\fB\-mmemcpy\fR" 4 .IX Item "-mmemcpy" .PD 0 ! .IP "\fB\-mno-memcpy\fR" 4 .IX Item "-mno-memcpy" .PD The \fB\-mmemcpy\fR switch makes all block moves call the appropriate string function (\fBmemcpy\fR or \fBbcopy\fR) instead of possibly generating inline code. ! .IP "\fB\-mmips-tfile\fR" 4 .IX Item "-mmips-tfile" .PD 0 ! .IP "\fB\-mno-mips-tfile\fR" 4 .IX Item "-mno-mips-tfile" .PD The \fB\-mno-mips-tfile\fR switch causes the compiler not *************** assembler embedded in the object file, w *** 5870,5876 **** not compare the same. The \fB\-mno-mips-tfile\fR switch should only be used when there are bugs in the \fImips-tfile\fR program that prevents compilation. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. --- 5872,5878 ---- not compare the same. The \fB\-mno-mips-tfile\fR switch should only be used when there are bugs in the \fImips-tfile\fR program that prevents compilation. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. *************** Normally the facilities of the machine's *** 5878,5918 **** this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation. ! .Ip "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" Generate output containing floating point instructions. This is the default if you use the unmodified sources. ! .Ip "\fB\-mabicalls\fR" 4 .IX Item "-mabicalls" .PD 0 ! .Ip "\fB\-mno-abicalls\fR" 4 .IX Item "-mno-abicalls" .PD Emit (or do not emit) the pseudo operations \fB.abicalls\fR, \&\fB.cpload\fR, and \fB.cprestore\fR that some System V.4 ports use for position independent code. ! .Ip "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .Ip "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Do all calls with the \fB\s-1JALR\s0\fR instruction, which requires loading up a function's address into a register before the call. You need to use this switch, if you call outside of the current 512 megabyte segment to functions that are not through pointers. ! .Ip "\fB\-mhalf-pic\fR" 4 .IX Item "-mhalf-pic" .PD 0 ! .Ip "\fB\-mno-half-pic\fR" 4 .IX Item "-mno-half-pic" .PD Put pointers to extern references into the data section and load them up, rather than put the references in the text section. ! .Ip "\fB\-membedded-pic\fR" 4 .IX Item "-membedded-pic" .PD 0 ! .Ip "\fB\-mno-embedded-pic\fR" 4 .IX Item "-mno-embedded-pic" .PD Generate \s-1PIC\s0 code suitable for some embedded systems. All calls are --- 5880,5920 ---- this can't be done directly in cross-compilation. You must make your own arrangements to provide suitable library functions for cross-compilation. ! .IP "\fB\-mhard-float\fR" 4 .IX Item "-mhard-float" Generate output containing floating point instructions. This is the default if you use the unmodified sources. ! .IP "\fB\-mabicalls\fR" 4 .IX Item "-mabicalls" .PD 0 ! .IP "\fB\-mno-abicalls\fR" 4 .IX Item "-mno-abicalls" .PD Emit (or do not emit) the pseudo operations \fB.abicalls\fR, \&\fB.cpload\fR, and \fB.cprestore\fR that some System V.4 ports use for position independent code. ! .IP "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .IP "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Do all calls with the \fB\s-1JALR\s0\fR instruction, which requires loading up a function's address into a register before the call. You need to use this switch, if you call outside of the current 512 megabyte segment to functions that are not through pointers. ! .IP "\fB\-mhalf-pic\fR" 4 .IX Item "-mhalf-pic" .PD 0 ! .IP "\fB\-mno-half-pic\fR" 4 .IX Item "-mno-half-pic" .PD Put pointers to extern references into the data section and load them up, rather than put the references in the text section. ! .IP "\fB\-membedded-pic\fR" 4 .IX Item "-membedded-pic" .PD 0 ! .IP "\fB\-mno-embedded-pic\fR" 4 .IX Item "-mno-embedded-pic" .PD Generate \s-1PIC\s0 code suitable for some embedded systems. All calls are *************** made using \s-1PC\s0 relative address, a *** 5920,5985 **** register. No more than 65536 bytes of global data may be used. This requires \s-1GNU\s0 as and \s-1GNU\s0 ld which do most of the work. This currently only works on targets which use \s-1ECOFF\s0; it does not work with \s-1ELF\s0. ! .Ip "\fB\-membedded-data\fR" 4 .IX Item "-membedded-data" .PD 0 ! .Ip "\fB\-mno-embedded-data\fR" 4 .IX Item "-mno-embedded-data" .PD Allocate variables to the read-only data section first if possible, then next in the small data section if possible, otherwise in data. This gives slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required when executing, and thus may be preferred for some embedded systems. ! .Ip "\fB\-muninit-const-in-rodata\fR" 4 .IX Item "-muninit-const-in-rodata" .PD 0 ! .Ip "\fB\-mno-uninit-const-in-rodata\fR" 4 .IX Item "-mno-uninit-const-in-rodata" .PD When used together with \fB\-membedded-data\fR, it will always store uninitialized const variables in the read-only data section. ! .Ip "\fB\-msingle-float\fR" 4 .IX Item "-msingle-float" .PD 0 ! .Ip "\fB\-mdouble-float\fR" 4 .IX Item "-mdouble-float" .PD The \fB\-msingle-float\fR switch tells gcc to assume that the floating point coprocessor only supports single precision operations, as on the \&\fBr4650\fR chip. The \fB\-mdouble-float\fR switch permits gcc to use double precision operations. This is the default. ! .Ip "\fB\-mmad\fR" 4 .IX Item "-mmad" .PD 0 ! .Ip "\fB\-mno-mad\fR" 4 .IX Item "-mno-mad" .PD Permit use of the \fBmad\fR, \fBmadu\fR and \fBmul\fR instructions, as on the \fBr4650\fR chip. ! .Ip "\fB\-m4650\fR" 4 .IX Item "-m4650" Turns on \fB\-msingle-float\fR, \fB\-mmad\fR, and, at least for now, \&\fB\-mcpu=r4650\fR. ! .Ip "\fB\-mips16\fR" 4 .IX Item "-mips16" .PD 0 ! .Ip "\fB\-mno-mips16\fR" 4 .IX Item "-mno-mips16" .PD Enable 16\-bit instructions. ! .Ip "\fB\-mentry\fR" 4 .IX Item "-mentry" Use the entry and exit pseudo ops. This option can only be used with \&\fB\-mips16\fR. ! .Ip "\fB\-EL\fR" 4 .IX Item "-EL" Compile code for the processor in little endian mode. The requisite libraries are assumed to exist. ! .Ip "\fB\-EB\fR" 4 .IX Item "-EB" Compile code for the processor in big endian mode. The requisite libraries are assumed to exist. ! .Ip "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" Put global and static items less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss --- 5922,5987 ---- register. No more than 65536 bytes of global data may be used. This requires \s-1GNU\s0 as and \s-1GNU\s0 ld which do most of the work. This currently only works on targets which use \s-1ECOFF\s0; it does not work with \s-1ELF\s0. ! .IP "\fB\-membedded-data\fR" 4 .IX Item "-membedded-data" .PD 0 ! .IP "\fB\-mno-embedded-data\fR" 4 .IX Item "-mno-embedded-data" .PD Allocate variables to the read-only data section first if possible, then next in the small data section if possible, otherwise in data. This gives slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required when executing, and thus may be preferred for some embedded systems. ! .IP "\fB\-muninit-const-in-rodata\fR" 4 .IX Item "-muninit-const-in-rodata" .PD 0 ! .IP "\fB\-mno-uninit-const-in-rodata\fR" 4 .IX Item "-mno-uninit-const-in-rodata" .PD When used together with \fB\-membedded-data\fR, it will always store uninitialized const variables in the read-only data section. ! .IP "\fB\-msingle-float\fR" 4 .IX Item "-msingle-float" .PD 0 ! .IP "\fB\-mdouble-float\fR" 4 .IX Item "-mdouble-float" .PD The \fB\-msingle-float\fR switch tells gcc to assume that the floating point coprocessor only supports single precision operations, as on the \&\fBr4650\fR chip. The \fB\-mdouble-float\fR switch permits gcc to use double precision operations. This is the default. ! .IP "\fB\-mmad\fR" 4 .IX Item "-mmad" .PD 0 ! .IP "\fB\-mno-mad\fR" 4 .IX Item "-mno-mad" .PD Permit use of the \fBmad\fR, \fBmadu\fR and \fBmul\fR instructions, as on the \fBr4650\fR chip. ! .IP "\fB\-m4650\fR" 4 .IX Item "-m4650" Turns on \fB\-msingle-float\fR, \fB\-mmad\fR, and, at least for now, \&\fB\-mcpu=r4650\fR. ! .IP "\fB\-mips16\fR" 4 .IX Item "-mips16" .PD 0 ! .IP "\fB\-mno-mips16\fR" 4 .IX Item "-mno-mips16" .PD Enable 16\-bit instructions. ! .IP "\fB\-mentry\fR" 4 .IX Item "-mentry" Use the entry and exit pseudo ops. This option can only be used with \&\fB\-mips16\fR. ! .IP "\fB\-EL\fR" 4 .IX Item "-EL" Compile code for the processor in little endian mode. The requisite libraries are assumed to exist. ! .IP "\fB\-EB\fR" 4 .IX Item "-EB" Compile code for the processor in big endian mode. The requisite libraries are assumed to exist. ! .IP "\fB\-G\fR \fInum\fR" 4 .IX Item "-G num" Put global and static items less than or equal to \fInum\fR bytes into the small data or bss sections instead of the normal data or bss *************** the \s-1MIPS\s0 assembler is used, and 0 *** 5990,6005 **** \&\fB\-G\fR \fInum\fR switch is also passed to the assembler and linker. All modules should be compiled with the same \fB\-G\fR \fInum\fR value. ! .Ip "\fB\-nocpp\fR" 4 .IX Item "-nocpp" Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user assembler files (with a \fB.s\fR suffix) when assembling them. ! .Ip "\fB\-mfix7000\fR" 4 .IX Item "-mfix7000" Pass an option to gas which will cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions. ! .Ip "\fB\-no-crt0\fR" 4 .IX Item "-no-crt0" Do not include the default crt0. .PP --- 5992,6007 ---- \&\fB\-G\fR \fInum\fR switch is also passed to the assembler and linker. All modules should be compiled with the same \fB\-G\fR \fInum\fR value. ! .IP "\fB\-nocpp\fR" 4 .IX Item "-nocpp" Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user assembler files (with a \fB.s\fR suffix) when assembling them. ! .IP "\fB\-mfix7000\fR" 4 .IX Item "-mfix7000" Pass an option to gas which will cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions. ! .IP "\fB\-no-crt0\fR" 4 .IX Item "-no-crt0" Do not include the default crt0. .PP *************** Do not include the default crt0. *** 6007,6013 **** .IX Subsection "Intel 386 Options" .PP These \fB\-m\fR options are defined for the i386 family of computers: ! .Ip "\fB\-mcpu=\fR\fIcpu-type\fR" 4 .IX Item "-mcpu=cpu-type" Assume the defaults for the machine type \fIcpu-type\fR when scheduling instructions. The choices for \fIcpu-type\fR are \fBi386\fR, --- 6009,6015 ---- .IX Subsection "Intel 386 Options" .PP These \fB\-m\fR options are defined for the i386 family of computers: ! .IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4 .IX Item "-mcpu=cpu-type" Assume the defaults for the machine type \fIcpu-type\fR when scheduling instructions. The choices for \fIcpu-type\fR are \fBi386\fR, *************** does not run on the i386 without the \fB *** 6020,6055 **** being used. \fBi586\fR is equivalent to \fBpentium\fR and \fBi686\fR is equivalent to \fBpentiumpro\fR. \fBk6\fR is the \s-1AMD\s0 chip as opposed to the Intel ones. ! .Ip "\fB\-march=\fR\fIcpu-type\fR" 4 .IX Item "-march=cpu-type" Generate instructions for the machine type \fIcpu-type\fR. The choices for \fIcpu-type\fR are the same as for \fB\-mcpu\fR. Moreover, specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mcpu=\fR\fIcpu-type\fR. ! .Ip "\fB\-m386\fR" 4 .IX Item "-m386" .PD 0 ! .Ip "\fB\-m486\fR" 4 .IX Item "-m486" ! .Ip "\fB\-mpentium\fR" 4 .IX Item "-mpentium" ! .Ip "\fB\-mpentiumpro\fR" 4 .IX Item "-mpentiumpro" .PD Synonyms for \fB\-mcpu=i386\fR, \fB\-mcpu=i486\fR, \fB\-mcpu=pentium\fR, and \fB\-mcpu=pentiumpro\fR respectively. These synonyms are deprecated. ! .Ip "\fB\-mintel-syntax\fR" 4 .IX Item "-mintel-syntax" Emit assembly using Intel syntax opcodes instead of \s-1AT&T\s0 syntax. ! .Ip "\fB\-mieee-fp\fR" 4 .IX Item "-mieee-fp" .PD 0 ! .Ip "\fB\-mno-ieee-fp\fR" 4 .IX Item "-mno-ieee-fp" .PD Control whether or not the compiler uses \s-1IEEE\s0 floating point comparisons. These handle correctly the case where the result of a comparison is unordered. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. --- 6022,6057 ---- being used. \fBi586\fR is equivalent to \fBpentium\fR and \fBi686\fR is equivalent to \fBpentiumpro\fR. \fBk6\fR is the \s-1AMD\s0 chip as opposed to the Intel ones. ! .IP "\fB\-march=\fR\fIcpu-type\fR" 4 .IX Item "-march=cpu-type" Generate instructions for the machine type \fIcpu-type\fR. The choices for \fIcpu-type\fR are the same as for \fB\-mcpu\fR. Moreover, specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mcpu=\fR\fIcpu-type\fR. ! .IP "\fB\-m386\fR" 4 .IX Item "-m386" .PD 0 ! .IP "\fB\-m486\fR" 4 .IX Item "-m486" ! .IP "\fB\-mpentium\fR" 4 .IX Item "-mpentium" ! .IP "\fB\-mpentiumpro\fR" 4 .IX Item "-mpentiumpro" .PD Synonyms for \fB\-mcpu=i386\fR, \fB\-mcpu=i486\fR, \fB\-mcpu=pentium\fR, and \fB\-mcpu=pentiumpro\fR respectively. These synonyms are deprecated. ! .IP "\fB\-mintel-syntax\fR" 4 .IX Item "-mintel-syntax" Emit assembly using Intel syntax opcodes instead of \s-1AT&T\s0 syntax. ! .IP "\fB\-mieee-fp\fR" 4 .IX Item "-mieee-fp" .PD 0 ! .IP "\fB\-mno-ieee-fp\fR" 4 .IX Item "-mno-ieee-fp" .PD Control whether or not the compiler uses \s-1IEEE\s0 floating point comparisons. These handle correctly the case where the result of a comparison is unordered. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0. *************** cross-compilation. *** 6061,6067 **** On machines where a function returns floating point results in the 80387 register stack, some floating point opcodes may be emitted even if \&\fB\-msoft-float\fR is used. ! .Ip "\fB\-mno-fp-ret-in-387\fR" 4 .IX Item "-mno-fp-ret-in-387" Do not use the \s-1FPU\s0 registers for return values of functions. .Sp --- 6063,6069 ---- On machines where a function returns floating point results in the 80387 register stack, some floating point opcodes may be emitted even if \&\fB\-msoft-float\fR is used. ! .IP "\fB\-mno-fp-ret-in-387\fR" 4 .IX Item "-mno-fp-ret-in-387" Do not use the \s-1FPU\s0 registers for return values of functions. .Sp *************** an \s-1FPU\s0. *** 6072,6088 **** .Sp The option \fB\-mno-fp-ret-in-387\fR causes such values to be returned in ordinary \s-1CPU\s0 registers instead. ! .Ip "\fB\-mno-fancy-math-387\fR" 4 .IX Item "-mno-fancy-math-387" Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid generating those instructions. This option is the default on FreeBSD. As of revision 2.6.1, these instructions are not generated unless you also use the \fB\-ffast-math\fR switch. ! .Ip "\fB\-malign-double\fR" 4 .IX Item "-malign-double" .PD 0 ! .Ip "\fB\-mno-align-double\fR" 4 .IX Item "-mno-align-double" .PD Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and --- 6074,6090 ---- .Sp The option \fB\-mno-fp-ret-in-387\fR causes such values to be returned in ordinary \s-1CPU\s0 registers instead. ! .IP "\fB\-mno-fancy-math-387\fR" 4 .IX Item "-mno-fancy-math-387" Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid generating those instructions. This option is the default on FreeBSD. As of revision 2.6.1, these instructions are not generated unless you also use the \fB\-ffast-math\fR switch. ! .IP "\fB\-malign-double\fR" 4 .IX Item "-malign-double" .PD 0 ! .IP "\fB\-mno-align-double\fR" 4 .IX Item "-mno-align-double" .PD Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and *************** Control whether \s-1GCC\s0 aligns \f(CW\ *** 6090,6101 **** boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will produce code that runs somewhat faster on a \fBPentium\fR at the expense of more memory. ! .Ip "\fB\-m128bit-long-double\fR" 4 ! .IX Item "-m128bit-long-double" ! .PD 0 ! .Ip "\fB\-m128bit-long-double\fR" 4 .IX Item "-m128bit-long-double" - .PD Control the size of \f(CW\*(C`long double\*(C'\fR type. i386 application binary interface specify the size to be 12 bytes, while modern architectures (Pentium and newer) prefer \f(CW\*(C`long double\*(C'\fR aligned to 8 or 16 byte boundary. This is --- 6092,6099 ---- boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will produce code that runs somewhat faster on a \fBPentium\fR at the expense of more memory. ! .IP "\fB\-m128bit-long-double\fR" 4 .IX Item "-m128bit-long-double" Control the size of \f(CW\*(C`long double\*(C'\fR type. i386 application binary interface specify the size to be 12 bytes, while modern architectures (Pentium and newer) prefer \f(CW\*(C`long double\*(C'\fR aligned to 8 or 16 byte boundary. This is *************** impossible to reach with 12 byte long do *** 6105,6137 **** structures and arrays containing \f(CW\*(C`long double\*(C'\fR will change their size as well as function calling convention for function taking \f(CW\*(C`long double\*(C'\fR will be modified. ! .Ip "\fB\-m96bit-long-double\fR" 4 ! .IX Item "-m96bit-long-double" ! .PD 0 ! .Ip "\fB\-m96bit-long-double\fR" 4 .IX Item "-m96bit-long-double" - .PD Set the size of \f(CW\*(C`long double\*(C'\fR to 96 bits as required by the i386 application binary interface. This is the default. ! .Ip "\fB\-msvr3\-shlib\fR" 4 .IX Item "-msvr3-shlib" .PD 0 ! .Ip "\fB\-mno-svr3\-shlib\fR" 4 .IX Item "-mno-svr3-shlib" .PD Control whether \s-1GCC\s0 places uninitialized locals into \f(CW\*(C`bss\*(C'\fR or \&\f(CW\*(C`data\*(C'\fR. \fB\-msvr3\-shlib\fR places these locals into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3. ! .Ip "\fB\-mno-wide-multiply\fR" 4 ! .IX Item "-mno-wide-multiply" ! .PD 0 ! .Ip "\fB\-mwide-multiply\fR" 4 ! .IX Item "-mwide-multiply" ! .PD ! Control whether \s-1GCC\s0 uses the \f(CW\*(C`mul\*(C'\fR and \f(CW\*(C`imul\*(C'\fR that produce ! 64\-bit results in \f(CW\*(C`eax:edx\*(C'\fR from 32\-bit operands to do \f(CW\*(C`long ! long\*(C'\fR multiplies and 32\-bit division by constants. ! .Ip "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR --- 6103,6122 ---- structures and arrays containing \f(CW\*(C`long double\*(C'\fR will change their size as well as function calling convention for function taking \f(CW\*(C`long double\*(C'\fR will be modified. ! .IP "\fB\-m96bit-long-double\fR" 4 .IX Item "-m96bit-long-double" Set the size of \f(CW\*(C`long double\*(C'\fR to 96 bits as required by the i386 application binary interface. This is the default. ! .IP "\fB\-msvr3\-shlib\fR" 4 .IX Item "-msvr3-shlib" .PD 0 ! .IP "\fB\-mno-svr3\-shlib\fR" 4 .IX Item "-mno-svr3-shlib" .PD Control whether \s-1GCC\s0 places uninitialized locals into \f(CW\*(C`bss\*(C'\fR or \&\f(CW\*(C`data\*(C'\fR. \fB\-msvr3\-shlib\fR places these locals into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3. ! .IP "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR *************** functions. *** 6156,6162 **** In addition, seriously incorrect code will result if you call a function with too many arguments. (Normally, extra arguments are harmlessly ignored.) ! .Ip "\fB\-mreg-alloc=\fR\fIregs\fR" 4 .IX Item "-mreg-alloc=regs" Control the default allocation order of integer registers. The string \fIregs\fR is a series of letters specifying a register. The --- 6141,6147 ---- In addition, seriously incorrect code will result if you call a function with too many arguments. (Normally, extra arguments are harmlessly ignored.) ! .IP "\fB\-mreg-alloc=\fR\fIregs\fR" 4 .IX Item "-mreg-alloc=regs" Control the default allocation order of integer registers. The string \fIregs\fR is a series of letters specifying a register. The *************** supported letters are: \f(CW\*(C`a\*(C'\ *** 6165,6171 **** \&\f(CW\*(C`D\*(C'\fR allocate \s-1EDI\s0; \f(CW\*(C`B\*(C'\fR allocate \s-1EBP\s0. This option is deprecated and will not be supported by future releases of gcc. ! .Ip "\fB\-mregparm=\fR\fInum\fR" 4 .IX Item "-mregparm=num" Control how many registers are used to pass integer arguments. By default, no registers are used to pass arguments, and at most 3 --- 6150,6156 ---- \&\f(CW\*(C`D\*(C'\fR allocate \s-1EDI\s0; \f(CW\*(C`B\*(C'\fR allocate \s-1EBP\s0. This option is deprecated and will not be supported by future releases of gcc. ! .IP "\fB\-mregparm=\fR\fInum\fR" 4 .IX Item "-mregparm=num" Control how many registers are used to pass integer arguments. By default, no registers are used to pass arguments, and at most 3 *************** function by using the function attribute *** 6176,6189 **** \&\fInum\fR is nonzero, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules. ! .Ip "\fB\-malign-loops=\fR\fInum\fR" 4 .IX Item "-malign-loops=num" Align loops to a 2 raised to a \fInum\fR byte boundary. If \&\fB\-malign-loops\fR is not specified, the default is 2 unless gas 2.8 (or later) is being used in which case the default is to align the loop on a 16 byte boundary if it is less than 8 bytes away. ! .Ip "\fB\-malign-jumps=\fR\fInum\fR" 4 .IX Item "-malign-jumps=num" Align instructions that are only jumped to to a 2 raised to a \fInum\fR byte boundary. If \fB\-malign-jumps\fR is not specified, the default is --- 6161,6174 ---- \&\fInum\fR is nonzero, then you must build all modules with the same value, including any libraries. This includes the system libraries and startup modules. ! .IP "\fB\-malign-loops=\fR\fInum\fR" 4 .IX Item "-malign-loops=num" Align loops to a 2 raised to a \fInum\fR byte boundary. If \&\fB\-malign-loops\fR is not specified, the default is 2 unless gas 2.8 (or later) is being used in which case the default is to align the loop on a 16 byte boundary if it is less than 8 bytes away. ! .IP "\fB\-malign-jumps=\fR\fInum\fR" 4 .IX Item "-malign-jumps=num" Align instructions that are only jumped to to a 2 raised to a \fInum\fR byte boundary. If \fB\-malign-jumps\fR is not specified, the default is *************** byte boundary. If \fB\-malign-jumps\fR *** 6191,6202 **** gas 2.8 (or later) is being used in which case the default is to align the instruction on a 16 byte boundary if it is less than 8 bytes away. ! .Ip "\fB\-malign-functions=\fR\fInum\fR" 4 .IX Item "-malign-functions=num" Align the start of functions to a 2 raised to \fInum\fR byte boundary. If \fB\-malign-functions\fR is not specified, the default is 2 if optimizing for a 386, and 4 if optimizing for a 486. ! .Ip "\fB\-mpreferred-stack-boundary=\fR\fInum\fR" 4 .IX Item "-mpreferred-stack-boundary=num" Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR byte boundary. If \fB\-mpreferred-stack-boundary\fR is not specified, --- 6176,6187 ---- gas 2.8 (or later) is being used in which case the default is to align the instruction on a 16 byte boundary if it is less than 8 bytes away. ! .IP "\fB\-malign-functions=\fR\fInum\fR" 4 .IX Item "-malign-functions=num" Align the start of functions to a 2 raised to \fInum\fR byte boundary. If \fB\-malign-functions\fR is not specified, the default is 2 if optimizing for a 386, and 4 if optimizing for a 486. ! .IP "\fB\-mpreferred-stack-boundary=\fR\fInum\fR" 4 .IX Item "-mpreferred-stack-boundary=num" Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR byte boundary. If \fB\-mpreferred-stack-boundary\fR is not specified, *************** This extra alignment does consume extra *** 6221,6258 **** to stack space usage, such as embedded systems and operating system kernels, may want to reduce the preferred alignment to \&\fB\-mpreferred-stack-boundary=2\fR. ! .Ip "\fB\-mpush-args\fR" 4 .IX Item "-mpush-args" Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled by default. In some cases disabling it may improve performance because of improved scheduling and reduced dependencies. ! .Ip "\fB\-maccumulate-outgoing-args\fR" 4 .IX Item "-maccumulate-outgoing-args" If enabled, the maximum amount of space required for outgoing arguments will be ! computed in the function prologue. This in faster on most modern CPUs because of reduced dependencies, improved scheduling and reduced stack usage when preferred stack boundary is not equal to 2. The drawback is a notable increase in code size. This switch implies \fB\-mno-push-args\fR. ! .Ip "\fB\-mthreads\fR" 4 .IX Item "-mthreads" Support thread-safe exception handling on \fBMingw32\fR. Code that relies on thread-safe exception handling must compile and link all code with the \&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines \&\fB\-D_MT\fR; when linking, it links in a special thread helper library \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data. ! .Ip "\fB\-mno-align-stringops\fR" 4 .IX Item "-mno-align-stringops" Do not align destination of inlined string operations. This switch reduces code size and improves performance in case the destination is already aligned, but gcc don't know about it. ! .Ip "\fB\-minline-all-stringops\fR" 4 .IX Item "-minline-all-stringops" By default \s-1GCC\s0 inlines string operations only when destination is known to be aligned at least to 4 byte boundary. This enables more inlining, increase code size, but may improve performance of code that depends on fast memcpy, strlen and memset for short lengths. ! .Ip "\fB\-momit-leaf-frame-pointer\fR" 4 .IX Item "-momit-leaf-frame-pointer" Don't keep the frame pointer in a register for leaf functions. This avoids the instructions to save, set up and restore frame pointers and --- 6206,6247 ---- to stack space usage, such as embedded systems and operating system kernels, may want to reduce the preferred alignment to \&\fB\-mpreferred-stack-boundary=2\fR. ! .IP "\fB\-mpush-args\fR" 4 .IX Item "-mpush-args" + .PD 0 + .IP "\fB\-mno-push-args\fR" 4 + .IX Item "-mno-push-args" + .PD Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled by default. In some cases disabling it may improve performance because of improved scheduling and reduced dependencies. ! .IP "\fB\-maccumulate-outgoing-args\fR" 4 .IX Item "-maccumulate-outgoing-args" If enabled, the maximum amount of space required for outgoing arguments will be ! computed in the function prologue. This is faster on most modern CPUs because of reduced dependencies, improved scheduling and reduced stack usage when preferred stack boundary is not equal to 2. The drawback is a notable increase in code size. This switch implies \fB\-mno-push-args\fR. ! .IP "\fB\-mthreads\fR" 4 .IX Item "-mthreads" Support thread-safe exception handling on \fBMingw32\fR. Code that relies on thread-safe exception handling must compile and link all code with the \&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines \&\fB\-D_MT\fR; when linking, it links in a special thread helper library \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data. ! .IP "\fB\-mno-align-stringops\fR" 4 .IX Item "-mno-align-stringops" Do not align destination of inlined string operations. This switch reduces code size and improves performance in case the destination is already aligned, but gcc don't know about it. ! .IP "\fB\-minline-all-stringops\fR" 4 .IX Item "-minline-all-stringops" By default \s-1GCC\s0 inlines string operations only when destination is known to be aligned at least to 4 byte boundary. This enables more inlining, increase code size, but may improve performance of code that depends on fast memcpy, strlen and memset for short lengths. ! .IP "\fB\-momit-leaf-frame-pointer\fR" 4 .IX Item "-momit-leaf-frame-pointer" Don't keep the frame pointer in a register for leaf functions. This avoids the instructions to save, set up and restore frame pointers and *************** which might make debugging harder. *** 6264,6270 **** .IX Subsection "HPPA Options" .PP These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers: ! .Ip "\fB\-march=\fR\fIarchitecture-type\fR" 4 .IX Item "-march=architecture-type" Generate code for the specified architecture. The choices for \&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0 --- 6253,6259 ---- .IX Subsection "HPPA Options" .PP These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers: ! .IP "\fB\-march=\fR\fIarchitecture-type\fR" 4 .IX Item "-march=architecture-type" Generate code for the specified architecture. The choices for \&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0 *************** other way around. *** 6277,6348 **** \&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later. The next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0 support. ! .Ip "\fB\-mpa-risc-1\-0\fR" 4 .IX Item "-mpa-risc-1-0" .PD 0 ! .Ip "\fB\-mpa-risc-1\-1\fR" 4 .IX Item "-mpa-risc-1-1" ! .Ip "\fB\-mpa-risc-2\-0\fR" 4 .IX Item "-mpa-risc-2-0" .PD Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively. ! .Ip "\fB\-mbig-switch\fR" 4 .IX Item "-mbig-switch" Generate code suitable for big switch tables. Use this option only if the assembler/linker complain about out of range branches within a switch table. ! .Ip "\fB\-mjump-in-delay\fR" 4 .IX Item "-mjump-in-delay" Fill delay slots of function calls with unconditional jump instructions by modifying the return pointer for the function call to be the target of the conditional jump. ! .Ip "\fB\-mdisable-fpregs\fR" 4 .IX Item "-mdisable-fpregs" Prevent floating point registers from being used in any manner. This is necessary for compiling kernels which perform lazy context switching of floating point registers. If you use this option and attempt to perform floating point operations, the compiler will abort. ! .Ip "\fB\-mdisable-indexing\fR" 4 .IX Item "-mdisable-indexing" Prevent the compiler from using indexing address modes. This avoids some rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0. ! .Ip "\fB\-mno-space-regs\fR" 4 .IX Item "-mno-space-regs" Generate code that assumes the target has no space registers. This allows \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes. .Sp Such code is suitable for level 0 \s-1PA\s0 systems and kernels. ! .Ip "\fB\-mfast-indirect-calls\fR" 4 .IX Item "-mfast-indirect-calls" Generate code that assumes calls never cross space boundaries. This allows \s-1GCC\s0 to emit code which performs faster indirect calls. .Sp This option will not work in the presence of shared libraries or nested functions. ! .Ip "\fB\-mlong-load-store\fR" 4 .IX Item "-mlong-load-store" Generate 3\-instruction load and store sequences as sometimes required by the \s-1HP-UX\s0 10 linker. This is equivalent to the \fB+k\fR option to the \s-1HP\s0 compilers. ! .Ip "\fB\-mportable-runtime\fR" 4 .IX Item "-mportable-runtime" Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems. ! .Ip "\fB\-mgas\fR" 4 .IX Item "-mgas" Enable the use of assembler directives only \s-1GAS\s0 understands. ! .Ip "\fB\-mschedule=\fR\fIcpu-type\fR" 4 .IX Item "-mschedule=cpu-type" Schedule code according to the constraints for the machine type \&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, and \fB8000\fR. Refer to \&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the proper scheduling option for your machine. ! .Ip "\fB\-mlinker-opt\fR" 4 .IX Item "-mlinker-opt" Enable the optimization pass in the \s-1HPUX\s0 linker. Note this makes symbolic debugging impossible. It also triggers a bug in the \s-1HPUX\s0 8 and \s-1HPUX\s0 9 linkers in which they give bogus error messages when linking some programs. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0 --- 6266,6337 ---- \&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later. The next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0 support. ! .IP "\fB\-mpa-risc-1\-0\fR" 4 .IX Item "-mpa-risc-1-0" .PD 0 ! .IP "\fB\-mpa-risc-1\-1\fR" 4 .IX Item "-mpa-risc-1-1" ! .IP "\fB\-mpa-risc-2\-0\fR" 4 .IX Item "-mpa-risc-2-0" .PD Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively. ! .IP "\fB\-mbig-switch\fR" 4 .IX Item "-mbig-switch" Generate code suitable for big switch tables. Use this option only if the assembler/linker complain about out of range branches within a switch table. ! .IP "\fB\-mjump-in-delay\fR" 4 .IX Item "-mjump-in-delay" Fill delay slots of function calls with unconditional jump instructions by modifying the return pointer for the function call to be the target of the conditional jump. ! .IP "\fB\-mdisable-fpregs\fR" 4 .IX Item "-mdisable-fpregs" Prevent floating point registers from being used in any manner. This is necessary for compiling kernels which perform lazy context switching of floating point registers. If you use this option and attempt to perform floating point operations, the compiler will abort. ! .IP "\fB\-mdisable-indexing\fR" 4 .IX Item "-mdisable-indexing" Prevent the compiler from using indexing address modes. This avoids some rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0. ! .IP "\fB\-mno-space-regs\fR" 4 .IX Item "-mno-space-regs" Generate code that assumes the target has no space registers. This allows \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes. .Sp Such code is suitable for level 0 \s-1PA\s0 systems and kernels. ! .IP "\fB\-mfast-indirect-calls\fR" 4 .IX Item "-mfast-indirect-calls" Generate code that assumes calls never cross space boundaries. This allows \s-1GCC\s0 to emit code which performs faster indirect calls. .Sp This option will not work in the presence of shared libraries or nested functions. ! .IP "\fB\-mlong-load-store\fR" 4 .IX Item "-mlong-load-store" Generate 3\-instruction load and store sequences as sometimes required by the \s-1HP-UX\s0 10 linker. This is equivalent to the \fB+k\fR option to the \s-1HP\s0 compilers. ! .IP "\fB\-mportable-runtime\fR" 4 .IX Item "-mportable-runtime" Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems. ! .IP "\fB\-mgas\fR" 4 .IX Item "-mgas" Enable the use of assembler directives only \s-1GAS\s0 understands. ! .IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4 .IX Item "-mschedule=cpu-type" Schedule code according to the constraints for the machine type \&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, and \fB8000\fR. Refer to \&\fI/usr/lib/sched.models\fR on an \s-1HP-UX\s0 system to determine the proper scheduling option for your machine. ! .IP "\fB\-mlinker-opt\fR" 4 .IX Item "-mlinker-opt" Enable the optimization pass in the \s-1HPUX\s0 linker. Note this makes symbolic debugging impossible. It also triggers a bug in the \s-1HPUX\s0 8 and \s-1HPUX\s0 9 linkers in which they give bogus error messages when linking some programs. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0 *************** this to work. *** 6362,6368 **** .IX Subsection "Intel 960 Options" .PP These \fB\-m\fR options are defined for the Intel 960 implementations: ! .Ip "\fB\-m\fR\fIcpu-type\fR" 4 .IX Item "-mcpu-type" Assume the defaults for the machine type \fIcpu-type\fR for some of the other options, including instruction scheduling, floating point --- 6351,6357 ---- .IX Subsection "Intel 960 Options" .PP These \fB\-m\fR options are defined for the Intel 960 implementations: ! .IP "\fB\-m\fR\fIcpu-type\fR" 4 .IX Item "-mcpu-type" Assume the defaults for the machine type \fIcpu-type\fR for some of the other options, including instruction scheduling, floating point *************** support, and addressing modes. The choi *** 6371,6389 **** \&\fBsa\fR, and \fBsb\fR. The default is \&\fBkb\fR. ! .Ip "\fB\-mnumerics\fR" 4 .IX Item "-mnumerics" .PD 0 ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD The \fB\-mnumerics\fR option indicates that the processor does support floating-point instructions. The \fB\-msoft-float\fR option indicates that floating-point support should not be assumed. ! .Ip "\fB\-mleaf-procedures\fR" 4 .IX Item "-mleaf-procedures" .PD 0 ! .Ip "\fB\-mno-leaf-procedures\fR" 4 .IX Item "-mno-leaf-procedures" .PD Do (or do not) attempt to alter leaf procedures to be callable with the --- 6360,6378 ---- \&\fBsa\fR, and \fBsb\fR. The default is \&\fBkb\fR. ! .IP "\fB\-mnumerics\fR" 4 .IX Item "-mnumerics" .PD 0 ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD The \fB\-mnumerics\fR option indicates that the processor does support floating-point instructions. The \fB\-msoft-float\fR option indicates that floating-point support should not be assumed. ! .IP "\fB\-mleaf-procedures\fR" 4 .IX Item "-mleaf-procedures" .PD 0 ! .IP "\fB\-mno-leaf-procedures\fR" 4 .IX Item "-mno-leaf-procedures" .PD Do (or do not) attempt to alter leaf procedures to be callable with the *************** efficient code for explicit calls when t *** 6392,6401 **** substituted by the assembler or linker, but less efficient code in other cases, such as calls via function pointers, or using a linker that doesn't support this optimization. ! .Ip "\fB\-mtail-call\fR" 4 .IX Item "-mtail-call" .PD 0 ! .Ip "\fB\-mno-tail-call\fR" 4 .IX Item "-mno-tail-call" .PD Do (or do not) make additional attempts (beyond those of the --- 6381,6390 ---- substituted by the assembler or linker, but less efficient code in other cases, such as calls via function pointers, or using a linker that doesn't support this optimization. ! .IP "\fB\-mtail-call\fR" 4 .IX Item "-mtail-call" .PD 0 ! .IP "\fB\-mno-tail-call\fR" 4 .IX Item "-mno-tail-call" .PD Do (or do not) make additional attempts (beyond those of the *************** machine-independent portions of the comp *** 6403,6412 **** calls into branches. You may not want to do this because the detection of cases where this is not valid is not totally complete. The default is \&\fB\-mno-tail-call\fR. ! .Ip "\fB\-mcomplex-addr\fR" 4 .IX Item "-mcomplex-addr" .PD 0 ! .Ip "\fB\-mno-complex-addr\fR" 4 .IX Item "-mno-complex-addr" .PD Assume (or do not assume) that the use of a complex addressing mode is a --- 6392,6401 ---- calls into branches. You may not want to do this because the detection of cases where this is not valid is not totally complete. The default is \&\fB\-mno-tail-call\fR. ! .IP "\fB\-mcomplex-addr\fR" 4 .IX Item "-mcomplex-addr" .PD 0 ! .IP "\fB\-mno-complex-addr\fR" 4 .IX Item "-mno-complex-addr" .PD Assume (or do not assume) that the use of a complex addressing mode is a *************** win on this implementation of the i960. *** 6414,6455 **** be worthwhile on the K-series, but they definitely are on the C-series. The default is currently \fB\-mcomplex-addr\fR for all processors except the \s-1CB\s0 and \s-1CC\s0. ! .Ip "\fB\-mcode-align\fR" 4 .IX Item "-mcode-align" .PD 0 ! .Ip "\fB\-mno-code-align\fR" 4 .IX Item "-mno-code-align" .PD Align code to 8\-byte boundaries for faster fetching (or don't bother). Currently turned on by default for C-series implementations only. ! .Ip "\fB\-mic-compat\fR" 4 .IX Item "-mic-compat" .PD 0 ! .Ip "\fB\-mic2.0\-compat\fR" 4 .IX Item "-mic2.0-compat" ! .Ip "\fB\-mic3.0\-compat\fR" 4 .IX Item "-mic3.0-compat" .PD Enable compatibility with iC960 v2.0 or v3.0. ! .Ip "\fB\-masm-compat\fR" 4 .IX Item "-masm-compat" .PD 0 ! .Ip "\fB\-mintel-asm\fR" 4 .IX Item "-mintel-asm" .PD Enable compatibility with the iC960 assembler. ! .Ip "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD 0 ! .Ip "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD Do not permit (do permit) unaligned accesses. ! .Ip "\fB\-mold-align\fR" 4 .IX Item "-mold-align" Enable structure-alignment compatibility with Intel's gcc release version 1.3 (based on gcc 1.37). This option implies \fB\-mstrict-align\fR. ! .Ip "\fB\-mlong-double-64\fR" 4 .IX Item "-mlong-double-64" Implement type \fBlong double\fR as 64\-bit floating point numbers. Without the option \fBlong double\fR is implemented by 80\-bit --- 6403,6444 ---- be worthwhile on the K-series, but they definitely are on the C-series. The default is currently \fB\-mcomplex-addr\fR for all processors except the \s-1CB\s0 and \s-1CC\s0. ! .IP "\fB\-mcode-align\fR" 4 .IX Item "-mcode-align" .PD 0 ! .IP "\fB\-mno-code-align\fR" 4 .IX Item "-mno-code-align" .PD Align code to 8\-byte boundaries for faster fetching (or don't bother). Currently turned on by default for C-series implementations only. ! .IP "\fB\-mic-compat\fR" 4 .IX Item "-mic-compat" .PD 0 ! .IP "\fB\-mic2.0\-compat\fR" 4 .IX Item "-mic2.0-compat" ! .IP "\fB\-mic3.0\-compat\fR" 4 .IX Item "-mic3.0-compat" .PD Enable compatibility with iC960 v2.0 or v3.0. ! .IP "\fB\-masm-compat\fR" 4 .IX Item "-masm-compat" .PD 0 ! .IP "\fB\-mintel-asm\fR" 4 .IX Item "-mintel-asm" .PD Enable compatibility with the iC960 assembler. ! .IP "\fB\-mstrict-align\fR" 4 .IX Item "-mstrict-align" .PD 0 ! .IP "\fB\-mno-strict-align\fR" 4 .IX Item "-mno-strict-align" .PD Do not permit (do permit) unaligned accesses. ! .IP "\fB\-mold-align\fR" 4 .IX Item "-mold-align" Enable structure-alignment compatibility with Intel's gcc release version 1.3 (based on gcc 1.37). This option implies \fB\-mstrict-align\fR. ! .IP "\fB\-mlong-double-64\fR" 4 .IX Item "-mlong-double-64" Implement type \fBlong double\fR as 64\-bit floating point numbers. Without the option \fBlong double\fR is implemented by 80\-bit *************** should recommend against use of it. *** 6462,6471 **** .IX Subsection "DEC Alpha Options" .PP These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations: ! .Ip "\fB\-mno-soft-float\fR" 4 .IX Item "-mno-soft-float" .PD 0 ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD Use (do not use) the hardware floating-point instructions for --- 6451,6460 ---- .IX Subsection "DEC Alpha Options" .PP These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations: ! .IP "\fB\-mno-soft-float\fR" 4 .IX Item "-mno-soft-float" .PD 0 ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" .PD Use (do not use) the hardware floating-point instructions for *************** them. *** 6480,6489 **** .Sp Note that Alpha implementations without floating-point operations are required to have floating-point registers. ! .Ip "\fB\-mfp-reg\fR" 4 .IX Item "-mfp-reg" .PD 0 ! .Ip "\fB\-mno-fp-regs\fR" 4 .IX Item "-mno-fp-regs" .PD Generate code that uses (does not use) the floating-point register set. --- 6469,6478 ---- .Sp Note that Alpha implementations without floating-point operations are required to have floating-point registers. ! .IP "\fB\-mfp-reg\fR" 4 .IX Item "-mfp-reg" .PD 0 ! .IP "\fB\-mno-fp-regs\fR" 4 .IX Item "-mno-fp-regs" .PD Generate code that uses (does not use) the floating-point register set. *************** option. *** 6497,6503 **** .Sp A typical use of this option is building a kernel that does not use, and hence need not save and restore, any floating-point registers. ! .Ip "\fB\-mieee\fR" 4 .IX Item "-mieee" The Alpha architecture implements floating-point hardware optimized for maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating --- 6486,6492 ---- .Sp A typical use of this option is building a kernel that does not use, and hence need not save and restore, any floating-point registers. ! .IP "\fB\-mieee\fR" 4 .IX Item "-mieee" The Alpha architecture implements floating-point hardware optimized for maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating *************** code is less efficient but is able to co *** 6511,6517 **** numbers and exceptional \s-1IEEE\s0 values such as not-a-number and plus/minus infinity. Other Alpha compilers call this option \&\fB\-ieee_with_no_inexact\fR. ! .Ip "\fB\-mieee-with-inexact\fR" 4 .IX Item "-mieee-with-inexact" This is like \fB\-mieee\fR except the generated code also maintains the \&\s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the generated --- 6500,6506 ---- numbers and exceptional \s-1IEEE\s0 values such as not-a-number and plus/minus infinity. Other Alpha compilers call this option \&\fB\-ieee_with_no_inexact\fR. ! .IP "\fB\-mieee-with-inexact\fR" 4 .IX Item "-mieee-with-inexact" This is like \fB\-mieee\fR except the generated code also maintains the \&\s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the generated *************** significantly slower than the code gener *** 6525,6573 **** is very little code that depends on the \fIinexact-flag\fR, you should normally not specify this option. Other Alpha compilers call this option \fB\-ieee_with_inexact\fR. ! .Ip "\fB\-mfp-trap-mode=\fR\fItrap-mode\fR" 4 .IX Item "-mfp-trap-mode=trap-mode" This option controls what floating-point related traps are enabled. Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR. The trap mode can be set to one of four values: .RS 4 ! .Ip "\fBn\fR" 4 .IX Item "n" This is the default (normal) setting. The only traps that are enabled are the ones that cannot be disabled in software (e.g., division by zero trap). ! .Ip "\fBu\fR" 4 .IX Item "u" In addition to the traps enabled by \fBn\fR, underflow traps are enabled as well. ! .Ip "\fBsu\fR" 4 .IX Item "su" Like \fBsu\fR, but the instructions are marked to be safe for software completion (see Alpha architecture manual for details). ! .Ip "\fBsui\fR" 4 .IX Item "sui" Like \fBsu\fR, but inexact traps are enabled as well. .RE .RS 4 .RE ! .Ip "\fB\-mfp-rounding-mode=\fR\fIrounding-mode\fR" 4 .IX Item "-mfp-rounding-mode=rounding-mode" Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option \&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one of: .RS 4 ! .Ip "\fBn\fR" 4 .IX Item "n" Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards the nearest machine number or towards the even machine number in case of a tie. ! .Ip "\fBm\fR" 4 .IX Item "m" Round towards minus infinity. ! .Ip "\fBc\fR" 4 .IX Item "c" Chopped rounding mode. Floating point numbers are rounded towards zero. ! .Ip "\fBd\fR" 4 .IX Item "d" Dynamic rounding mode. A field in the floating point control register (\fIfpcr\fR, see Alpha architecture reference manual) controls the --- 6514,6562 ---- is very little code that depends on the \fIinexact-flag\fR, you should normally not specify this option. Other Alpha compilers call this option \fB\-ieee_with_inexact\fR. ! .IP "\fB\-mfp-trap-mode=\fR\fItrap-mode\fR" 4 .IX Item "-mfp-trap-mode=trap-mode" This option controls what floating-point related traps are enabled. Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR. The trap mode can be set to one of four values: .RS 4 ! .IP "\fBn\fR" 4 .IX Item "n" This is the default (normal) setting. The only traps that are enabled are the ones that cannot be disabled in software (e.g., division by zero trap). ! .IP "\fBu\fR" 4 .IX Item "u" In addition to the traps enabled by \fBn\fR, underflow traps are enabled as well. ! .IP "\fBsu\fR" 4 .IX Item "su" Like \fBsu\fR, but the instructions are marked to be safe for software completion (see Alpha architecture manual for details). ! .IP "\fBsui\fR" 4 .IX Item "sui" Like \fBsu\fR, but inexact traps are enabled as well. .RE .RS 4 .RE ! .IP "\fB\-mfp-rounding-mode=\fR\fIrounding-mode\fR" 4 .IX Item "-mfp-rounding-mode=rounding-mode" Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option \&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one of: .RS 4 ! .IP "\fBn\fR" 4 .IX Item "n" Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards the nearest machine number or towards the even machine number in case of a tie. ! .IP "\fBm\fR" 4 .IX Item "m" Round towards minus infinity. ! .IP "\fBc\fR" 4 .IX Item "c" Chopped rounding mode. Floating point numbers are rounded towards zero. ! .IP "\fBd\fR" 4 .IX Item "d" Dynamic rounding mode. A field in the floating point control register (\fIfpcr\fR, see Alpha architecture reference manual) controls the *************** rounding towards plus infinity. Thus, u *** 6577,6583 **** .RE .RS 4 .RE ! .Ip "\fB\-mtrap-precision=\fR\fItrap-precision\fR" 4 .IX Item "-mtrap-precision=trap-precision" In the Alpha architecture, floating point traps are imprecise. This means without software assistance it is impossible to recover from a --- 6566,6572 ---- .RE .RS 4 .RE ! .IP "\fB\-mtrap-precision=\fR\fItrap-precision\fR" 4 .IX Item "-mtrap-precision=trap-precision" In the Alpha architecture, floating point traps are imprecise. This means without software assistance it is impossible to recover from a *************** in determining the exact location that c *** 6587,6601 **** Depending on the requirements of an application, different levels of precisions can be selected: .RS 4 ! .Ip "\fBp\fR" 4 .IX Item "p" Program precision. This option is the default and means a trap handler can only identify which program caused a floating point exception. ! .Ip "\fBf\fR" 4 .IX Item "f" Function precision. The trap handler can determine the function that caused a floating point exception. ! .Ip "\fBi\fR" 4 .IX Item "i" Instruction precision. The trap handler can determine the exact instruction that caused a floating point exception. --- 6576,6590 ---- Depending on the requirements of an application, different levels of precisions can be selected: .RS 4 ! .IP "\fBp\fR" 4 .IX Item "p" Program precision. This option is the default and means a trap handler can only identify which program caused a floating point exception. ! .IP "\fBf\fR" 4 .IX Item "f" Function precision. The trap handler can determine the function that caused a floating point exception. ! .IP "\fBi\fR" 4 .IX Item "i" Instruction precision. The trap handler can determine the exact instruction that caused a floating point exception. *************** instruction that caused a floating point *** 6605,6611 **** Other Alpha compilers provide the equivalent options called \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR. .RE ! .Ip "\fB\-mieee-conformant\fR" 4 .IX Item "-mieee-conformant" This option marks the generated code as \s-1IEEE\s0 conformant. You must not use this option unless you also specify \fB\-mtrap-precision=i\fR and either --- 6594,6600 ---- Other Alpha compilers provide the equivalent options called \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR. .RE ! .IP "\fB\-mieee-conformant\fR" 4 .IX Item "-mieee-conformant" This option marks the generated code as \s-1IEEE\s0 conformant. You must not use this option unless you also specify \fB\-mtrap-precision=i\fR and either *************** use this option unless you also specify *** 6613,6619 **** is to emit the line \fB.eflag 48\fR in the function prologue of the generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that IEEE-conformant math library routines will be linked in. ! .Ip "\fB\-mbuild-constants\fR" 4 .IX Item "-mbuild-constants" Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to see if it can construct it from smaller constants in two or three --- 6602,6608 ---- is to emit the line \fB.eflag 48\fR in the function prologue of the generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that IEEE-conformant math library routines will be linked in. ! .IP "\fB\-mbuild-constants\fR" 4 .IX Item "-mbuild-constants" Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to see if it can construct it from smaller constants in two or three *************** using code, even if it takes more instru *** 6626,6658 **** You would typically use this option to build a shared library dynamic loader. Itself a shared library, it must relocate itself in memory before it can find the variables and constants in its own data segment. ! .Ip "\fB\-malpha-as\fR" 4 .IX Item "-malpha-as" .PD 0 ! .Ip "\fB\-mgas\fR" 4 .IX Item "-mgas" .PD Select whether to generate code to be assembled by the vendor-supplied assembler (\fB\-malpha-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR. ! .Ip "\fB\-mbwx\fR" 4 .IX Item "-mbwx" .PD 0 ! .Ip "\fB\-mno-bwx\fR" 4 .IX Item "-mno-bwx" ! .Ip "\fB\-mcix\fR" 4 .IX Item "-mcix" ! .Ip "\fB\-mno-cix\fR" 4 .IX Item "-mno-cix" ! .Ip "\fB\-mmax\fR" 4 .IX Item "-mmax" ! .Ip "\fB\-mno-max\fR" 4 .IX Item "-mno-max" .PD Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0, \&\s-1CIX\s0, and \s-1MAX\s0 instruction sets. The default is to use the instruction sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified. ! .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. You can specify either the --- 6615,6647 ---- You would typically use this option to build a shared library dynamic loader. Itself a shared library, it must relocate itself in memory before it can find the variables and constants in its own data segment. ! .IP "\fB\-malpha-as\fR" 4 .IX Item "-malpha-as" .PD 0 ! .IP "\fB\-mgas\fR" 4 .IX Item "-mgas" .PD Select whether to generate code to be assembled by the vendor-supplied assembler (\fB\-malpha-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR. ! .IP "\fB\-mbwx\fR" 4 .IX Item "-mbwx" .PD 0 ! .IP "\fB\-mno-bwx\fR" 4 .IX Item "-mno-bwx" ! .IP "\fB\-mcix\fR" 4 .IX Item "-mcix" ! .IP "\fB\-mno-cix\fR" 4 .IX Item "-mno-cix" ! .IP "\fB\-mmax\fR" 4 .IX Item "-mmax" ! .IP "\fB\-mno-max\fR" 4 .IX Item "-mno-max" .PD Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0, \&\s-1CIX\s0, and \s-1MAX\s0 instruction sets. The default is to use the instruction sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified. ! .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. You can specify either the *************** the processor you specify. If you do no *** 6664,6703 **** .Sp Supported values for \fIcpu_type\fR are .RS 4 ! .Ip "\fBev4\fR" 4 .IX Item "ev4" .PD 0 ! .Ip "\fB21064\fR" 4 .IX Item "21064" .PD Schedules as an \s-1EV4\s0 and has no instruction set extensions. ! .Ip "\fBev5\fR" 4 .IX Item "ev5" .PD 0 ! .Ip "\fB21164\fR" 4 .IX Item "21164" .PD Schedules as an \s-1EV5\s0 and has no instruction set extensions. ! .Ip "\fBev56\fR" 4 .IX Item "ev56" .PD 0 ! .Ip "\fB21164a\fR" 4 .IX Item "21164a" .PD Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension. ! .Ip "\fBpca56\fR" 4 .IX Item "pca56" .PD 0 ! .Ip "\fB21164pc\fR" 4 .IX Item "21164pc" ! .Ip "\fB21164PC\fR" 4 .IX Item "21164PC" .PD Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions. ! .Ip "\fBev6\fR" 4 .IX Item "ev6" .PD 0 ! .Ip "\fB21264\fR" 4 .IX Item "21264" .PD Schedules as an \s-1EV5\s0 (until Digital releases the scheduling parameters --- 6653,6692 ---- .Sp Supported values for \fIcpu_type\fR are .RS 4 ! .IP "\fBev4\fR" 4 .IX Item "ev4" .PD 0 ! .IP "\fB21064\fR" 4 .IX Item "21064" .PD Schedules as an \s-1EV4\s0 and has no instruction set extensions. ! .IP "\fBev5\fR" 4 .IX Item "ev5" .PD 0 ! .IP "\fB21164\fR" 4 .IX Item "21164" .PD Schedules as an \s-1EV5\s0 and has no instruction set extensions. ! .IP "\fBev56\fR" 4 .IX Item "ev56" .PD 0 ! .IP "\fB21164a\fR" 4 .IX Item "21164a" .PD Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension. ! .IP "\fBpca56\fR" 4 .IX Item "pca56" .PD 0 ! .IP "\fB21164pc\fR" 4 .IX Item "21164pc" ! .IP "\fB21164PC\fR" 4 .IX Item "21164PC" .PD Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions. ! .IP "\fBev6\fR" 4 .IX Item "ev6" .PD 0 ! .IP "\fB21264\fR" 4 .IX Item "21264" .PD Schedules as an \s-1EV5\s0 (until Digital releases the scheduling parameters *************** for the \s-1EV6\s0) and supports the \s- *** 6705,6711 **** .RE .RS 4 .RE ! .Ip "\fB\-mmemory-latency=\fR\fItime\fR" 4 .IX Item "-mmemory-latency=time" Sets the latency the scheduler should assume for typical memory references as seen by the application. This number is highly --- 6694,6700 ---- .RE .RS 4 .RE ! .IP "\fB\-mmemory-latency=\fR\fItime\fR" 4 .IX Item "-mmemory-latency=time" Sets the latency the scheduler should assume for typical memory references as seen by the application. This number is highly *************** and the size of the external cache on th *** 6714,6730 **** .Sp Valid options for \fItime\fR are .RS 4 ! .Ip "\fInumber\fR" 4 .IX Item "number" A decimal number representing clock cycles. ! .Ip "\fBL1\fR" 4 .IX Item "L1" .PD 0 ! .Ip "\fBL2\fR" 4 .IX Item "L2" ! .Ip "\fBL3\fR" 4 .IX Item "L3" ! .Ip "\fBmain\fR" 4 .IX Item "main" .PD The compiler contains estimates of the number of clock cycles for --- 6703,6719 ---- .Sp Valid options for \fItime\fR are .RS 4 ! .IP "\fInumber\fR" 4 .IX Item "number" A decimal number representing clock cycles. ! .IP "\fBL1\fR" 4 .IX Item "L1" .PD 0 ! .IP "\fBL2\fR" 4 .IX Item "L2" ! .IP "\fBL3\fR" 4 .IX Item "L3" ! .IP "\fBmain\fR" 4 .IX Item "main" .PD The compiler contains estimates of the number of clock cycles for *************** Note that L3 is only valid for \s-1EV5\s *** 6739,6748 **** .IX Subsection "Clipper Options" .PP These \fB\-m\fR options are defined for the Clipper implementations: ! .Ip "\fB\-mc300\fR" 4 .IX Item "-mc300" Produce code for a C300 Clipper processor. This is the default. ! .Ip "\fB\-mc400\fR" 4 .IX Item "-mc400" Produce code for a C400 Clipper processor i.e. use floating point registers f8\-\-\-f15. --- 6728,6737 ---- .IX Subsection "Clipper Options" .PP These \fB\-m\fR options are defined for the Clipper implementations: ! .IP "\fB\-mc300\fR" 4 .IX Item "-mc300" Produce code for a C300 Clipper processor. This is the default. ! .IP "\fB\-mc400\fR" 4 .IX Item "-mc400" Produce code for a C400 Clipper processor i.e. use floating point registers f8\-\-\-f15. *************** registers f8\-\-\-f15. *** 6751,6773 **** .IX Subsection "H8/300 Options" .PP These \fB\-m\fR options are defined for the H8/300 implementations: ! .Ip "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Shorten some address references at link time, when possible; uses the linker option \fB\-relax\fR. ! .Ip "\fB\-mh\fR" 4 .IX Item "-mh" Generate code for the H8/300H. ! .Ip "\fB\-ms\fR" 4 .IX Item "-ms" Generate code for the H8/S. ! .Ip "\fB\-ms2600\fR" 4 .IX Item "-ms2600" Generate code for the H8/S2600. This switch must be used with \fB\-ms\fR. ! .Ip "\fB\-mint32\fR" 4 .IX Item "-mint32" Make \f(CW\*(C`int\*(C'\fR data 32 bits by default. ! .Ip "\fB\-malign-300\fR" 4 .IX Item "-malign-300" On the H8/300H and H8/S, use the same alignment rules as for the H8/300. The default for the H8/300H and H8/S is to align longs and floats on 4 --- 6740,6762 ---- .IX Subsection "H8/300 Options" .PP These \fB\-m\fR options are defined for the H8/300 implementations: ! .IP "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Shorten some address references at link time, when possible; uses the linker option \fB\-relax\fR. ! .IP "\fB\-mh\fR" 4 .IX Item "-mh" Generate code for the H8/300H. ! .IP "\fB\-ms\fR" 4 .IX Item "-ms" Generate code for the H8/S. ! .IP "\fB\-ms2600\fR" 4 .IX Item "-ms2600" Generate code for the H8/S2600. This switch must be used with \fB\-ms\fR. ! .IP "\fB\-mint32\fR" 4 .IX Item "-mint32" Make \f(CW\*(C`int\*(C'\fR data 32 bits by default. ! .IP "\fB\-malign-300\fR" 4 .IX Item "-malign-300" On the H8/300H and H8/S, use the same alignment rules as for the H8/300. The default for the H8/300H and H8/S is to align longs and floats on 4 *************** This option has no effect on the H8/300. *** 6779,6857 **** .IX Subsection "SH Options" .PP These \fB\-m\fR options are defined for the \s-1SH\s0 implementations: ! .Ip "\fB\-m1\fR" 4 .IX Item "-m1" Generate code for the \s-1SH1\s0. ! .Ip "\fB\-m2\fR" 4 .IX Item "-m2" Generate code for the \s-1SH2\s0. ! .Ip "\fB\-m3\fR" 4 .IX Item "-m3" Generate code for the \s-1SH3\s0. ! .Ip "\fB\-m3e\fR" 4 .IX Item "-m3e" Generate code for the SH3e. ! .Ip "\fB\-m4\-nofpu\fR" 4 .IX Item "-m4-nofpu" Generate code for the \s-1SH4\s0 without a floating-point unit. ! .Ip "\fB\-m4\-single-only\fR" 4 .IX Item "-m4-single-only" Generate code for the \s-1SH4\s0 with a floating-point unit that only supports single-precision arithmetic. ! .Ip "\fB\-m4\-single\fR" 4 .IX Item "-m4-single" Generate code for the \s-1SH4\s0 assuming the floating-point unit is in single-precision mode by default. ! .Ip "\fB\-m4\fR" 4 .IX Item "-m4" Generate code for the \s-1SH4\s0. ! .Ip "\fB\-mb\fR" 4 .IX Item "-mb" Compile code for the processor in big endian mode. ! .Ip "\fB\-ml\fR" 4 .IX Item "-ml" Compile code for the processor in little endian mode. ! .Ip "\fB\-mdalign\fR" 4 .IX Item "-mdalign" Align doubles at 64\-bit boundaries. Note that this changes the calling conventions, and thus some functions from the standard C library will not work unless you recompile it first with \fB\-mdalign\fR. ! .Ip "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Shorten some address references at link time, when possible; uses the linker option \fB\-relax\fR. ! .Ip "\fB\-mbigtable\fR" 4 .IX Item "-mbigtable" Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use 16\-bit offsets. ! .Ip "\fB\-mfmovd\fR" 4 .IX Item "-mfmovd" Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. ! .Ip "\fB\-mhitachi\fR" 4 .IX Item "-mhitachi" Comply with the calling conventions defined by Hitachi. ! .Ip "\fB\-mnomacsave\fR" 4 .IX Item "-mnomacsave" Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if \&\fB\-mhitachi\fR is given. ! .Ip "\fB\-mieee\fR" 4 .IX Item "-mieee" Increase IEEE-compliance of floating-point code. ! .Ip "\fB\-misize\fR" 4 .IX Item "-misize" Dump instruction size and location in the assembly code. ! .Ip "\fB\-mpadstruct\fR" 4 .IX Item "-mpadstruct" This option is deprecated. It pads structures to multiple of 4 bytes, which is incompatible with the \s-1SH\s0 \s-1ABI\s0. ! .Ip "\fB\-mspace\fR" 4 .IX Item "-mspace" Optimize for space instead of speed. Implied by \fB\-Os\fR. ! .Ip "\fB\-mprefergot\fR" 4 .IX Item "-mprefergot" When generating position-independent code, emit function calls using the Global Offset Table instead of the Procedure Linkage Table. ! .Ip "\fB\-musermode\fR" 4 .IX Item "-musermode" Generate a library function call to invalidate instruction cache entries, after fixing up a trampoline. This library function call --- 6768,6846 ---- .IX Subsection "SH Options" .PP These \fB\-m\fR options are defined for the \s-1SH\s0 implementations: ! .IP "\fB\-m1\fR" 4 .IX Item "-m1" Generate code for the \s-1SH1\s0. ! .IP "\fB\-m2\fR" 4 .IX Item "-m2" Generate code for the \s-1SH2\s0. ! .IP "\fB\-m3\fR" 4 .IX Item "-m3" Generate code for the \s-1SH3\s0. ! .IP "\fB\-m3e\fR" 4 .IX Item "-m3e" Generate code for the SH3e. ! .IP "\fB\-m4\-nofpu\fR" 4 .IX Item "-m4-nofpu" Generate code for the \s-1SH4\s0 without a floating-point unit. ! .IP "\fB\-m4\-single-only\fR" 4 .IX Item "-m4-single-only" Generate code for the \s-1SH4\s0 with a floating-point unit that only supports single-precision arithmetic. ! .IP "\fB\-m4\-single\fR" 4 .IX Item "-m4-single" Generate code for the \s-1SH4\s0 assuming the floating-point unit is in single-precision mode by default. ! .IP "\fB\-m4\fR" 4 .IX Item "-m4" Generate code for the \s-1SH4\s0. ! .IP "\fB\-mb\fR" 4 .IX Item "-mb" Compile code for the processor in big endian mode. ! .IP "\fB\-ml\fR" 4 .IX Item "-ml" Compile code for the processor in little endian mode. ! .IP "\fB\-mdalign\fR" 4 .IX Item "-mdalign" Align doubles at 64\-bit boundaries. Note that this changes the calling conventions, and thus some functions from the standard C library will not work unless you recompile it first with \fB\-mdalign\fR. ! .IP "\fB\-mrelax\fR" 4 .IX Item "-mrelax" Shorten some address references at link time, when possible; uses the linker option \fB\-relax\fR. ! .IP "\fB\-mbigtable\fR" 4 .IX Item "-mbigtable" Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use 16\-bit offsets. ! .IP "\fB\-mfmovd\fR" 4 .IX Item "-mfmovd" Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR. ! .IP "\fB\-mhitachi\fR" 4 .IX Item "-mhitachi" Comply with the calling conventions defined by Hitachi. ! .IP "\fB\-mnomacsave\fR" 4 .IX Item "-mnomacsave" Mark the \f(CW\*(C`MAC\*(C'\fR register as call-clobbered, even if \&\fB\-mhitachi\fR is given. ! .IP "\fB\-mieee\fR" 4 .IX Item "-mieee" Increase IEEE-compliance of floating-point code. ! .IP "\fB\-misize\fR" 4 .IX Item "-misize" Dump instruction size and location in the assembly code. ! .IP "\fB\-mpadstruct\fR" 4 .IX Item "-mpadstruct" This option is deprecated. It pads structures to multiple of 4 bytes, which is incompatible with the \s-1SH\s0 \s-1ABI\s0. ! .IP "\fB\-mspace\fR" 4 .IX Item "-mspace" Optimize for space instead of speed. Implied by \fB\-Os\fR. ! .IP "\fB\-mprefergot\fR" 4 .IX Item "-mprefergot" When generating position-independent code, emit function calls using the Global Offset Table instead of the Procedure Linkage Table. ! .IP "\fB\-musermode\fR" 4 .IX Item "-musermode" Generate a library function call to invalidate instruction cache entries, after fixing up a trampoline. This library function call *************** is the default when the target is \f(CW\ *** 6863,6885 **** .PP These additional options are available on System V Release 4 for compatibility with other compilers on those systems: ! .Ip "\fB\-G\fR" 4 .IX Item "-G" Create a shared object. It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead. ! .Ip "\fB\-Qy\fR" 4 .IX Item "-Qy" Identify the versions of each tool used by the compiler, in a \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output. ! .Ip "\fB\-Qn\fR" 4 .IX Item "-Qn" Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is the default). ! .Ip "\fB\-YP,\fR\fIdirs\fR" 4 .IX Item "-YP,dirs" Search the directories \fIdirs\fR, and no others, for libraries specified with \fB\-l\fR. ! .Ip "\fB\-Ym,\fR\fIdir\fR" 4 .IX Item "-Ym,dir" Look in the directory \fIdir\fR to find the M4 preprocessor. The assembler uses this option. --- 6852,6874 ---- .PP These additional options are available on System V Release 4 for compatibility with other compilers on those systems: ! .IP "\fB\-G\fR" 4 .IX Item "-G" Create a shared object. It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead. ! .IP "\fB\-Qy\fR" 4 .IX Item "-Qy" Identify the versions of each tool used by the compiler, in a \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output. ! .IP "\fB\-Qn\fR" 4 .IX Item "-Qn" Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is the default). ! .IP "\fB\-YP,\fR\fIdirs\fR" 4 .IX Item "-YP,dirs" Search the directories \fIdirs\fR, and no others, for libraries specified with \fB\-l\fR. ! .IP "\fB\-Ym,\fR\fIdir\fR" 4 .IX Item "-Ym,dir" Look in the directory \fIdir\fR to find the M4 preprocessor. The assembler uses this option. *************** The assembler uses this option. *** 6888,6908 **** .IX Subsection "TMS320C3x/C4x Options" .PP These \fB\-m\fR options are defined for TMS320C3x/C4x implementations: ! .Ip "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. Supported values for \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and \&\fBc44\fR. The default is \fBc40\fR to generate code for the \&\s-1TMS320C40\s0. ! .Ip "\fB\-mbig-memory\fR" 4 .IX Item "-mbig-memory" .PD 0 ! .Ip "\fB\-mbig\fR" 4 .IX Item "-mbig" ! .Ip "\fB\-msmall-memory\fR" 4 .IX Item "-msmall-memory" ! .Ip "\fB\-msmall\fR" 4 .IX Item "-msmall" .PD Generates code for the big or small memory model. The small memory --- 6877,6897 ---- .IX Subsection "TMS320C3x/C4x Options" .PP These \fB\-m\fR options are defined for TMS320C3x/C4x implementations: ! .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4 .IX Item "-mcpu=cpu_type" Set the instruction set, register set, and instruction scheduling parameters for machine type \fIcpu_type\fR. Supported values for \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and \&\fBc44\fR. The default is \fBc40\fR to generate code for the \&\s-1TMS320C40\s0. ! .IP "\fB\-mbig-memory\fR" 4 .IX Item "-mbig-memory" .PD 0 ! .IP "\fB\-mbig\fR" 4 .IX Item "-mbig" ! .IP "\fB\-msmall-memory\fR" 4 .IX Item "-msmall-memory" ! .IP "\fB\-msmall\fR" 4 .IX Item "-msmall" .PD Generates code for the big or small memory model. The small memory *************** the data page (\s-1DP\s0) register must *** 6911,6928 **** containing the .bss and .data program sections. The big memory model is the default and requires reloading of the \s-1DP\s0 register for every direct memory access. ! .Ip "\fB\-mbk\fR" 4 .IX Item "-mbk" .PD 0 ! .Ip "\fB\-mno-bk\fR" 4 .IX Item "-mno-bk" .PD Allow (disallow) allocation of general integer operands into the block count register \s-1BK\s0. ! .Ip "\fB\-mdb\fR" 4 .IX Item "-mdb" .PD 0 ! .Ip "\fB\-mno-db\fR" 4 .IX Item "-mno-db" .PD Enable (disable) generation of code using decrement and branch, --- 6900,6917 ---- containing the .bss and .data program sections. The big memory model is the default and requires reloading of the \s-1DP\s0 register for every direct memory access. ! .IP "\fB\-mbk\fR" 4 .IX Item "-mbk" .PD 0 ! .IP "\fB\-mno-bk\fR" 4 .IX Item "-mno-bk" .PD Allow (disallow) allocation of general integer operands into the block count register \s-1BK\s0. ! .IP "\fB\-mdb\fR" 4 .IX Item "-mdb" .PD 0 ! .IP "\fB\-mno-db\fR" 4 .IX Item "-mno-db" .PD Enable (disable) generation of code using decrement and branch, *************** that it can utilise the decrement and br *** 6934,6943 **** up if there is more than one memory reference in the loop. Thus a loop where the loop counter is decremented can generate slightly more efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilised. ! .Ip "\fB\-mdp-isr-reload\fR" 4 .IX Item "-mdp-isr-reload" .PD 0 ! .Ip "\fB\-mparanoid\fR" 4 .IX Item "-mparanoid" .PD Force the \s-1DP\s0 register to be saved on entry to an interrupt service --- 6923,6932 ---- up if there is more than one memory reference in the loop. Thus a loop where the loop counter is decremented can generate slightly more efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilised. ! .IP "\fB\-mdp-isr-reload\fR" 4 .IX Item "-mdp-isr-reload" .PD 0 ! .IP "\fB\-mparanoid\fR" 4 .IX Item "-mparanoid" .PD Force the \s-1DP\s0 register to be saved on entry to an interrupt service *************** routine (\s-1ISR\s0), reloaded to point *** 6945,6954 **** exit from the \s-1ISR\s0. This should not be required unless someone has violated the small memory model by modifying the \s-1DP\s0 register, say within an object library. ! .Ip "\fB\-mmpyi\fR" 4 .IX Item "-mmpyi" .PD 0 ! .Ip "\fB\-mno-mpyi\fR" 4 .IX Item "-mno-mpyi" .PD For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies --- 6934,6943 ---- exit from the \s-1ISR\s0. This should not be required unless someone has violated the small memory model by modifying the \s-1DP\s0 register, say within an object library. ! .IP "\fB\-mmpyi\fR" 4 .IX Item "-mmpyi" .PD 0 ! .IP "\fB\-mno-mpyi\fR" 4 .IX Item "-mno-mpyi" .PD For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies *************** instead of a library call to guarantee 3 *** 6956,6965 **** of the operands is a constant, then the multiplication will be performed using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x, then squaring operations are performed inline instead of a library call. ! .Ip "\fB\-mfast-fix\fR" 4 .IX Item "-mfast-fix" .PD 0 ! .Ip "\fB\-mno-fast-fix\fR" 4 .IX Item "-mno-fast-fix" .PD The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an --- 6945,6954 ---- of the operands is a constant, then the multiplication will be performed using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x, then squaring operations are performed inline instead of a library call. ! .IP "\fB\-mfast-fix\fR" 4 .IX Item "-mfast-fix" .PD 0 ! .IP "\fB\-mno-fast-fix\fR" 4 .IX Item "-mno-fast-fix" .PD The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an *************** floating point number is negative, the r *** 6969,6978 **** truncated an additional code is necessary to detect and correct this case. This option can be used to disable generation of the additional code required to correct the result. ! .Ip "\fB\-mrptb\fR" 4 .IX Item "-mrptb" .PD 0 ! .Ip "\fB\-mno-rptb\fR" 4 .IX Item "-mno-rptb" .PD Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0 --- 6958,6967 ---- truncated an additional code is necessary to detect and correct this case. This option can be used to disable generation of the additional code required to correct the result. ! .IP "\fB\-mrptb\fR" 4 .IX Item "-mrptb" .PD 0 ! .IP "\fB\-mno-rptb\fR" 4 .IX Item "-mno-rptb" .PD Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0 *************** for innermost loops that do not call fun *** 6981,6990 **** boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers. This is enabled by default with \fB\-O2\fR. ! .Ip "\fB\-mrpts=\fR\fIcount\fR" 4 .IX Item "-mrpts=count" .PD 0 ! .Ip "\fB\-mno-rpts\fR" 4 .IX Item "-mno-rpts" .PD Enable (disable) the use of the single instruction repeat instruction --- 6970,6979 ---- boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers. This is enabled by default with \fB\-O2\fR. ! .IP "\fB\-mrpts=\fR\fIcount\fR" 4 .IX Item "-mrpts=count" .PD 0 ! .IP "\fB\-mno-rpts\fR" 4 .IX Item "-mno-rpts" .PD Enable (disable) the use of the single instruction repeat instruction *************** at compile time. Note that the repeated *** 6996,7005 **** not have to be reloaded from memory each iteration, thus freeing up the \&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this instruction, it is disabled by default. ! .Ip "\fB\-mloop-unsigned\fR" 4 .IX Item "-mloop-unsigned" .PD 0 ! .Ip "\fB\-mno-loop-unsigned\fR" 4 .IX Item "-mno-loop-unsigned" .PD The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40) --- 6985,6994 ---- not have to be reloaded from memory each iteration, thus freeing up the \&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this instruction, it is disabled by default. ! .IP "\fB\-mloop-unsigned\fR" 4 .IX Item "-mloop-unsigned" .PD 0 ! .IP "\fB\-mno-loop-unsigned\fR" 4 .IX Item "-mno-loop-unsigned" .PD The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40) *************** is 2^31 + 1 since these instructions tes *** 7007,7039 **** negative to terminate the loop. If the iteration count is unsigned there is a possibility than the 2^31 + 1 maximum iteration count may be exceeded. This switch allows an unsigned iteration count. ! .Ip "\fB\-mti\fR" 4 .IX Item "-mti" Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0 C3x C compiler. For example, long doubles are passed as structures rather than in floating point registers. ! .Ip "\fB\-mregparm\fR" 4 .IX Item "-mregparm" .PD 0 ! .Ip "\fB\-mmemparm\fR" 4 .IX Item "-mmemparm" .PD Generate code that uses registers (stack) for passing arguments to functions. By default, arguments are passed in registers where possible rather than by pushing arguments on to the stack. ! .Ip "\fB\-mparallel-insns\fR" 4 .IX Item "-mparallel-insns" .PD 0 ! .Ip "\fB\-mno-parallel-insns\fR" 4 .IX Item "-mno-parallel-insns" .PD Allow the generation of parallel instructions. This is enabled by default with \fB\-O2\fR. ! .Ip "\fB\-mparallel-mpy\fR" 4 .IX Item "-mparallel-mpy" .PD 0 ! .Ip "\fB\-mno-parallel-mpy\fR" 4 .IX Item "-mno-parallel-mpy" .PD Allow the generation of MPY||ADD and MPY||SUB parallel instructions, --- 6996,7028 ---- negative to terminate the loop. If the iteration count is unsigned there is a possibility than the 2^31 + 1 maximum iteration count may be exceeded. This switch allows an unsigned iteration count. ! .IP "\fB\-mti\fR" 4 .IX Item "-mti" Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0 C3x C compiler. For example, long doubles are passed as structures rather than in floating point registers. ! .IP "\fB\-mregparm\fR" 4 .IX Item "-mregparm" .PD 0 ! .IP "\fB\-mmemparm\fR" 4 .IX Item "-mmemparm" .PD Generate code that uses registers (stack) for passing arguments to functions. By default, arguments are passed in registers where possible rather than by pushing arguments on to the stack. ! .IP "\fB\-mparallel-insns\fR" 4 .IX Item "-mparallel-insns" .PD 0 ! .IP "\fB\-mno-parallel-insns\fR" 4 .IX Item "-mno-parallel-insns" .PD Allow the generation of parallel instructions. This is enabled by default with \fB\-O2\fR. ! .IP "\fB\-mparallel-mpy\fR" 4 .IX Item "-mparallel-mpy" .PD 0 ! .IP "\fB\-mno-parallel-mpy\fR" 4 .IX Item "-mno-parallel-mpy" .PD Allow the generation of MPY||ADD and MPY||SUB parallel instructions, *************** of large functions. *** 7045,7073 **** .IX Subsection "V850 Options" .PP These \fB\-m\fR options are defined for V850 implementations: ! .Ip "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .Ip "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Treat all calls as being far away (near). If calls are assumed to be far away, the compiler will always load the functions address up into a register, and call indirect through the pointer. ! .Ip "\fB\-mno-ep\fR" 4 .IX Item "-mno-ep" .PD 0 ! .Ip "\fB\-mep\fR" 4 .IX Item "-mep" .PD Do not optimize (do optimize) basic blocks that use the same index pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR option is on by default if you optimize. ! .Ip "\fB\-mno-prolog-function\fR" 4 .IX Item "-mno-prolog-function" .PD 0 ! .Ip "\fB\-mprolog-function\fR" 4 .IX Item "-mprolog-function" .PD Do not use (do use) external functions to save and restore registers at --- 7034,7062 ---- .IX Subsection "V850 Options" .PP These \fB\-m\fR options are defined for V850 implementations: ! .IP "\fB\-mlong-calls\fR" 4 .IX Item "-mlong-calls" .PD 0 ! .IP "\fB\-mno-long-calls\fR" 4 .IX Item "-mno-long-calls" .PD Treat all calls as being far away (near). If calls are assumed to be far away, the compiler will always load the functions address up into a register, and call indirect through the pointer. ! .IP "\fB\-mno-ep\fR" 4 .IX Item "-mno-ep" .PD 0 ! .IP "\fB\-mep\fR" 4 .IX Item "-mep" .PD Do not optimize (do optimize) basic blocks that use the same index pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR option is on by default if you optimize. ! .IP "\fB\-mno-prolog-function\fR" 4 .IX Item "-mno-prolog-function" .PD 0 ! .IP "\fB\-mprolog-function\fR" 4 .IX Item "-mprolog-function" .PD Do not use (do use) external functions to save and restore registers at *************** the prolog and epilog of a function. Th *** 7075,7102 **** but use less code space if more than one function saves the same number of registers. The \fB\-mprolog-function\fR option is on by default if you optimize. ! .Ip "\fB\-mspace\fR" 4 .IX Item "-mspace" Try to make the code as small as possible. At present, this just turns on the \fB\-mep\fR and \fB\-mprolog-function\fR options. ! .Ip "\fB\-mtda=\fR\fIn\fR" 4 .IX Item "-mtda=n" Put static or global variables whose size is \fIn\fR bytes or less into the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data area can hold up to 256 bytes in total (128 bytes for byte references). ! .Ip "\fB\-msda=\fR\fIn\fR" 4 .IX Item "-msda=n" Put static or global variables whose size is \fIn\fR bytes or less into the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data area can hold up to 64 kilobytes. ! .Ip "\fB\-mzda=\fR\fIn\fR" 4 .IX Item "-mzda=n" Put static or global variables whose size is \fIn\fR bytes or less into the first 32 kilobytes of memory. ! .Ip "\fB\-mv850\fR" 4 .IX Item "-mv850" Specify that the target processor is the V850. ! .Ip "\fB\-mbig-switch\fR" 4 .IX Item "-mbig-switch" Generate code suitable for big switch tables. Use this option only if the assembler/linker complain about out of range branches within a switch --- 7064,7091 ---- but use less code space if more than one function saves the same number of registers. The \fB\-mprolog-function\fR option is on by default if you optimize. ! .IP "\fB\-mspace\fR" 4 .IX Item "-mspace" Try to make the code as small as possible. At present, this just turns on the \fB\-mep\fR and \fB\-mprolog-function\fR options. ! .IP "\fB\-mtda=\fR\fIn\fR" 4 .IX Item "-mtda=n" Put static or global variables whose size is \fIn\fR bytes or less into the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data area can hold up to 256 bytes in total (128 bytes for byte references). ! .IP "\fB\-msda=\fR\fIn\fR" 4 .IX Item "-msda=n" Put static or global variables whose size is \fIn\fR bytes or less into the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data area can hold up to 64 kilobytes. ! .IP "\fB\-mzda=\fR\fIn\fR" 4 .IX Item "-mzda=n" Put static or global variables whose size is \fIn\fR bytes or less into the first 32 kilobytes of memory. ! .IP "\fB\-mv850\fR" 4 .IX Item "-mv850" Specify that the target processor is the V850. ! .IP "\fB\-mbig-switch\fR" 4 .IX Item "-mbig-switch" Generate code suitable for big switch tables. Use this option only if the assembler/linker complain about out of range branches within a switch *************** table. *** 7106,7118 **** .IX Subsection "ARC Options" .PP These options are defined for \s-1ARC\s0 implementations: ! .Ip "\fB\-EL\fR" 4 .IX Item "-EL" Compile code for little endian mode. This is the default. ! .Ip "\fB\-EB\fR" 4 .IX Item "-EB" Compile code for big endian mode. ! .Ip "\fB\-mmangle-cpu\fR" 4 .IX Item "-mmangle-cpu" Prepend the name of the cpu to all public symbol names. In multiple-processor systems, there are many \s-1ARC\s0 variants with different --- 7095,7107 ---- .IX Subsection "ARC Options" .PP These options are defined for \s-1ARC\s0 implementations: ! .IP "\fB\-EL\fR" 4 .IX Item "-EL" Compile code for little endian mode. This is the default. ! .IP "\fB\-EB\fR" 4 .IX Item "-EB" Compile code for big endian mode. ! .IP "\fB\-mmangle-cpu\fR" 4 .IX Item "-mmangle-cpu" Prepend the name of the cpu to all public symbol names. In multiple-processor systems, there are many \s-1ARC\s0 variants with different *************** instruction and register set characteris *** 7120,7136 **** compiled for one cpu to be linked with code compiled for another. No facility exists for handling variants that are ``almost identical''. This is an all or nothing option. ! .Ip "\fB\-mcpu=\fR\fIcpu\fR" 4 .IX Item "-mcpu=cpu" Compile code for \s-1ARC\s0 variant \fIcpu\fR. Which variants are supported depend on the configuration. All variants support \fB\-mcpu=base\fR, this is the default. ! .Ip "\fB\-mtext=\fR\fItext-section\fR" 4 .IX Item "-mtext=text-section" .PD 0 ! .Ip "\fB\-mdata=\fR\fIdata-section\fR" 4 .IX Item "-mdata=data-section" ! .Ip "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4 .IX Item "-mrodata=readonly-data-section" .PD Put functions, data, and readonly data in \fItext-section\fR, --- 7109,7125 ---- compiled for one cpu to be linked with code compiled for another. No facility exists for handling variants that are ``almost identical''. This is an all or nothing option. ! .IP "\fB\-mcpu=\fR\fIcpu\fR" 4 .IX Item "-mcpu=cpu" Compile code for \s-1ARC\s0 variant \fIcpu\fR. Which variants are supported depend on the configuration. All variants support \fB\-mcpu=base\fR, this is the default. ! .IP "\fB\-mtext=\fR\fItext-section\fR" 4 .IX Item "-mtext=text-section" .PD 0 ! .IP "\fB\-mdata=\fR\fIdata-section\fR" 4 .IX Item "-mdata=data-section" ! .IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4 .IX Item "-mrodata=readonly-data-section" .PD Put functions, data, and readonly data in \fItext-section\fR, *************** These are the \fB\-m\fR options defined *** 7144,7207 **** values for these options depends on which style of 32000 was selected when the compiler was configured; the defaults for the most common choices are given below. ! .Ip "\fB\-m32032\fR" 4 .IX Item "-m32032" .PD 0 ! .Ip "\fB\-m32032\fR" 4 .IX Item "-m32032" .PD Generate output for a 32032. This is the default when the compiler is configured for 32032 and 32016 based systems. ! .Ip "\fB\-m32332\fR" 4 .IX Item "-m32332" .PD 0 ! .Ip "\fB\-m32332\fR" 4 .IX Item "-m32332" .PD Generate output for a 32332. This is the default when the compiler is configured for 32332\-based systems. ! .Ip "\fB\-m32532\fR" 4 .IX Item "-m32532" .PD 0 ! .Ip "\fB\-m32532\fR" 4 .IX Item "-m32532" .PD Generate output for a 32532. This is the default when the compiler is configured for 32532\-based systems. ! .Ip "\fB\-m32081\fR" 4 .IX Item "-m32081" Generate output containing 32081 instructions for floating point. This is the default for all systems. ! .Ip "\fB\-m32381\fR" 4 .IX Item "-m32381" Generate output containing 32381 instructions for floating point. This also implies \fB\-m32081\fR. The 32381 is only compatible with the 32332 and 32532 cpus. This is the default for the pc532\-netbsd configuration. ! .Ip "\fB\-mmulti-add\fR" 4 .IX Item "-mmulti-add" Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This option is only available if the \fB\-m32381\fR ! option is in effect. Using these instructions requires changes to to register allocation which generally has a negative impact on performance. This option should only be enabled when compiling code particularly likely to make heavy use of multiply-add instructions. ! .Ip "\fB\-mnomulti-add\fR" 4 .IX Item "-mnomulti-add" Do not try and generate multiply-add floating point instructions \&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This is the default on all platforms. ! .Ip "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries may not be available. ! .Ip "\fB\-mnobitfield\fR" 4 .IX Item "-mnobitfield" Do not use the bit-field instructions. On some machines it is faster to use shifting and masking operations. This is the default for the pc532. ! .Ip "\fB\-mbitfield\fR" 4 .IX Item "-mbitfield" Do use the bit-field instructions. This is the default for all platforms except the pc532. ! .Ip "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return pop their --- 7133,7196 ---- values for these options depends on which style of 32000 was selected when the compiler was configured; the defaults for the most common choices are given below. ! .IP "\fB\-m32032\fR" 4 .IX Item "-m32032" .PD 0 ! .IP "\fB\-m32032\fR" 4 .IX Item "-m32032" .PD Generate output for a 32032. This is the default when the compiler is configured for 32032 and 32016 based systems. ! .IP "\fB\-m32332\fR" 4 .IX Item "-m32332" .PD 0 ! .IP "\fB\-m32332\fR" 4 .IX Item "-m32332" .PD Generate output for a 32332. This is the default when the compiler is configured for 32332\-based systems. ! .IP "\fB\-m32532\fR" 4 .IX Item "-m32532" .PD 0 ! .IP "\fB\-m32532\fR" 4 .IX Item "-m32532" .PD Generate output for a 32532. This is the default when the compiler is configured for 32532\-based systems. ! .IP "\fB\-m32081\fR" 4 .IX Item "-m32081" Generate output containing 32081 instructions for floating point. This is the default for all systems. ! .IP "\fB\-m32381\fR" 4 .IX Item "-m32381" Generate output containing 32381 instructions for floating point. This also implies \fB\-m32081\fR. The 32381 is only compatible with the 32332 and 32532 cpus. This is the default for the pc532\-netbsd configuration. ! .IP "\fB\-mmulti-add\fR" 4 .IX Item "-mmulti-add" Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This option is only available if the \fB\-m32381\fR ! option is in effect. Using these instructions requires changes to register allocation which generally has a negative impact on performance. This option should only be enabled when compiling code particularly likely to make heavy use of multiply-add instructions. ! .IP "\fB\-mnomulti-add\fR" 4 .IX Item "-mnomulti-add" Do not try and generate multiply-add floating point instructions \&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR. This is the default on all platforms. ! .IP "\fB\-msoft-float\fR" 4 .IX Item "-msoft-float" Generate output containing library calls for floating point. \&\fBWarning:\fR the requisite libraries may not be available. ! .IP "\fB\-mnobitfield\fR" 4 .IX Item "-mnobitfield" Do not use the bit-field instructions. On some machines it is faster to use shifting and masking operations. This is the default for the pc532. ! .IP "\fB\-mbitfield\fR" 4 .IX Item "-mbitfield" Do use the bit-field instructions. This is the default for all platforms except the pc532. ! .IP "\fB\-mrtd\fR" 4 .IX Item "-mrtd" Use a different function-calling convention, in which functions that take a fixed number of arguments return pop their *************** function with too many arguments. (Norm *** 7221,7227 **** harmlessly ignored.) .Sp This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction. ! .Ip "\fB\-mregparam\fR" 4 .IX Item "-mregparam" Use a different function-calling convention where the first two arguments are passed in registers. --- 7210,7216 ---- harmlessly ignored.) .Sp This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction. ! .IP "\fB\-mregparam\fR" 4 .IX Item "-mregparam" Use a different function-calling convention where the first two arguments are passed in registers. *************** are passed in registers. *** 7229,7255 **** This calling convention is incompatible with the one normally used on Unix, so you cannot use it if you need to call libraries compiled with the Unix compiler. ! .Ip "\fB\-mnoregparam\fR" 4 .IX Item "-mnoregparam" Do not pass any arguments in registers. This is the default for all targets. ! .Ip "\fB\-msb\fR" 4 .IX Item "-msb" It is \s-1OK\s0 to use the sb as an index register which is always loaded with zero. This is the default for the pc532\-netbsd target. ! .Ip "\fB\-mnosb\fR" 4 .IX Item "-mnosb" The sb register is not available for use or has not been initialized to zero by the run time system. This is the default for all targets except the pc532\-netbsd. It is also implied whenever \fB\-mhimem\fR or \&\fB\-fpic\fR is set. ! .Ip "\fB\-mhimem\fR" 4 .IX Item "-mhimem" Many ns32000 series addressing modes use displacements of up to 512MB. If an address is above 512MB then displacements from zero can not be used. This option causes code to be generated which can be loaded above 512MB. This may be useful for operating systems or \s-1ROM\s0 code. ! .Ip "\fB\-mnohimem\fR" 4 .IX Item "-mnohimem" Assume code will be loaded in the first 512MB of virtual address space. This is the default for all platforms. --- 7218,7244 ---- This calling convention is incompatible with the one normally used on Unix, so you cannot use it if you need to call libraries compiled with the Unix compiler. ! .IP "\fB\-mnoregparam\fR" 4 .IX Item "-mnoregparam" Do not pass any arguments in registers. This is the default for all targets. ! .IP "\fB\-msb\fR" 4 .IX Item "-msb" It is \s-1OK\s0 to use the sb as an index register which is always loaded with zero. This is the default for the pc532\-netbsd target. ! .IP "\fB\-mnosb\fR" 4 .IX Item "-mnosb" The sb register is not available for use or has not been initialized to zero by the run time system. This is the default for all targets except the pc532\-netbsd. It is also implied whenever \fB\-mhimem\fR or \&\fB\-fpic\fR is set. ! .IP "\fB\-mhimem\fR" 4 .IX Item "-mhimem" Many ns32000 series addressing modes use displacements of up to 512MB. If an address is above 512MB then displacements from zero can not be used. This option causes code to be generated which can be loaded above 512MB. This may be useful for operating systems or \s-1ROM\s0 code. ! .IP "\fB\-mnohimem\fR" 4 .IX Item "-mnohimem" Assume code will be loaded in the first 512MB of virtual address space. This is the default for all platforms. *************** This is the default for all platforms. *** 7258,7264 **** .IX Subsection "AVR Options" .PP These options are defined for \s-1AVR\s0 implementations: ! .Ip "\fB\-mmcu=\fR\fImcu\fR" 4 .IX Item "-mmcu=mcu" Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type. .Sp --- 7247,7253 ---- .IX Subsection "AVR Options" .PP These options are defined for \s-1AVR\s0 implementations: ! .IP "\fB\-mmcu=\fR\fImcu\fR" 4 .IX Item "-mmcu=mcu" Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type. .Sp *************** memory space (\s-1MCU\s0 types: atmega83 *** 7279,7303 **** .Sp Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program memory space (\s-1MCU\s0 types: atmega161, atmega163, atmega32, at94k). ! .Ip "\fB\-msize\fR" 4 .IX Item "-msize" Output instruction sizes to the asm file. ! .Ip "\fB\-minit-stack=\fR\fIN\fR" 4 .IX Item "-minit-stack=N" Specify the initial stack address, which may be a symbol or numeric value, \&\fB_\|_stack\fR is the default. ! .Ip "\fB\-mno-interrupts\fR" 4 .IX Item "-mno-interrupts" Generated code is not compatible with hardware interrupts. Code size will be smaller. ! .Ip "\fB\-mcall-prologues\fR" 4 .IX Item "-mcall-prologues" Functions prologues/epilogues expanded as call to appropriate subroutines. Code size will be smaller. ! .Ip "\fB\-mno-tablejump\fR" 4 .IX Item "-mno-tablejump" Do not generate tablejump insns which sometimes increase code size. ! .Ip "\fB\-mtiny-stack\fR" 4 .IX Item "-mtiny-stack" Change only the low 8 bits of the stack pointer. .PP --- 7268,7292 ---- .Sp Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program memory space (\s-1MCU\s0 types: atmega161, atmega163, atmega32, at94k). ! .IP "\fB\-msize\fR" 4 .IX Item "-msize" Output instruction sizes to the asm file. ! .IP "\fB\-minit-stack=\fR\fIN\fR" 4 .IX Item "-minit-stack=N" Specify the initial stack address, which may be a symbol or numeric value, \&\fB_\|_stack\fR is the default. ! .IP "\fB\-mno-interrupts\fR" 4 .IX Item "-mno-interrupts" Generated code is not compatible with hardware interrupts. Code size will be smaller. ! .IP "\fB\-mcall-prologues\fR" 4 .IX Item "-mcall-prologues" Functions prologues/epilogues expanded as call to appropriate subroutines. Code size will be smaller. ! .IP "\fB\-mno-tablejump\fR" 4 .IX Item "-mno-tablejump" Do not generate tablejump insns which sometimes increase code size. ! .IP "\fB\-mtiny-stack\fR" 4 .IX Item "-mtiny-stack" Change only the low 8 bits of the stack pointer. .PP *************** Change only the low 8 bits of the stack *** 7306,7390 **** .PP These are the \fB\-m\fR options defined for the Motorola M*Core processors. ! .Ip "\fB\-mhardlit\fR" 4 .IX Item "-mhardlit" .PD 0 ! .Ip "\fB\-mhardlit\fR" 4 .IX Item "-mhardlit" ! .Ip "\fB\-mno-hardlit\fR" 4 .IX Item "-mno-hardlit" .PD Inline constants into the code stream if it can be done in two instructions or less. ! .Ip "\fB\-mdiv\fR" 4 .IX Item "-mdiv" .PD 0 ! .Ip "\fB\-mdiv\fR" 4 .IX Item "-mdiv" ! .Ip "\fB\-mno-div\fR" 4 .IX Item "-mno-div" .PD Use the divide instruction. (Enabled by default). ! .Ip "\fB\-mrelax-immediate\fR" 4 .IX Item "-mrelax-immediate" .PD 0 ! .Ip "\fB\-mrelax-immediate\fR" 4 .IX Item "-mrelax-immediate" ! .Ip "\fB\-mno-relax-immediate\fR" 4 .IX Item "-mno-relax-immediate" .PD Allow arbitrary sized immediates in bit operations. ! .Ip "\fB\-mwide-bitfields\fR" 4 .IX Item "-mwide-bitfields" .PD 0 ! .Ip "\fB\-mwide-bitfields\fR" 4 .IX Item "-mwide-bitfields" ! .Ip "\fB\-mno-wide-bitfields\fR" 4 .IX Item "-mno-wide-bitfields" .PD Always treat bit-fields as int-sized. ! .Ip "\fB\-m4byte-functions\fR" 4 .IX Item "-m4byte-functions" .PD 0 ! .Ip "\fB\-m4byte-functions\fR" 4 .IX Item "-m4byte-functions" ! .Ip "\fB\-mno-4byte-functions\fR" 4 .IX Item "-mno-4byte-functions" .PD Force all functions to be aligned to a four byte boundary. ! .Ip "\fB\-mcallgraph-data\fR" 4 .IX Item "-mcallgraph-data" .PD 0 ! .Ip "\fB\-mcallgraph-data\fR" 4 .IX Item "-mcallgraph-data" ! .Ip "\fB\-mno-callgraph-data\fR" 4 .IX Item "-mno-callgraph-data" .PD Emit callgraph information. ! .Ip "\fB\-mslow-bytes\fR" 4 .IX Item "-mslow-bytes" .PD 0 ! .Ip "\fB\-mslow-bytes\fR" 4 .IX Item "-mslow-bytes" ! .Ip "\fB\-mno-slow-bytes\fR" 4 .IX Item "-mno-slow-bytes" .PD Prefer word access when reading byte quantities. ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" .PD 0 ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" ! .Ip "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" .PD Generate code for a little endian target. ! .Ip "\fB\-m210\fR" 4 .IX Item "-m210" .PD 0 ! .Ip "\fB\-m210\fR" 4 .IX Item "-m210" ! .Ip "\fB\-m340\fR" 4 .IX Item "-m340" .PD Generate code for the 210 processor. --- 7295,7379 ---- .PP These are the \fB\-m\fR options defined for the Motorola M*Core processors. ! .IP "\fB\-mhardlit\fR" 4 .IX Item "-mhardlit" .PD 0 ! .IP "\fB\-mhardlit\fR" 4 .IX Item "-mhardlit" ! .IP "\fB\-mno-hardlit\fR" 4 .IX Item "-mno-hardlit" .PD Inline constants into the code stream if it can be done in two instructions or less. ! .IP "\fB\-mdiv\fR" 4 .IX Item "-mdiv" .PD 0 ! .IP "\fB\-mdiv\fR" 4 .IX Item "-mdiv" ! .IP "\fB\-mno-div\fR" 4 .IX Item "-mno-div" .PD Use the divide instruction. (Enabled by default). ! .IP "\fB\-mrelax-immediate\fR" 4 .IX Item "-mrelax-immediate" .PD 0 ! .IP "\fB\-mrelax-immediate\fR" 4 .IX Item "-mrelax-immediate" ! .IP "\fB\-mno-relax-immediate\fR" 4 .IX Item "-mno-relax-immediate" .PD Allow arbitrary sized immediates in bit operations. ! .IP "\fB\-mwide-bitfields\fR" 4 .IX Item "-mwide-bitfields" .PD 0 ! .IP "\fB\-mwide-bitfields\fR" 4 .IX Item "-mwide-bitfields" ! .IP "\fB\-mno-wide-bitfields\fR" 4 .IX Item "-mno-wide-bitfields" .PD Always treat bit-fields as int-sized. ! .IP "\fB\-m4byte-functions\fR" 4 .IX Item "-m4byte-functions" .PD 0 ! .IP "\fB\-m4byte-functions\fR" 4 .IX Item "-m4byte-functions" ! .IP "\fB\-mno-4byte-functions\fR" 4 .IX Item "-mno-4byte-functions" .PD Force all functions to be aligned to a four byte boundary. ! .IP "\fB\-mcallgraph-data\fR" 4 .IX Item "-mcallgraph-data" .PD 0 ! .IP "\fB\-mcallgraph-data\fR" 4 .IX Item "-mcallgraph-data" ! .IP "\fB\-mno-callgraph-data\fR" 4 .IX Item "-mno-callgraph-data" .PD Emit callgraph information. ! .IP "\fB\-mslow-bytes\fR" 4 .IX Item "-mslow-bytes" .PD 0 ! .IP "\fB\-mslow-bytes\fR" 4 .IX Item "-mslow-bytes" ! .IP "\fB\-mno-slow-bytes\fR" 4 .IX Item "-mno-slow-bytes" .PD Prefer word access when reading byte quantities. ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" .PD 0 ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" ! .IP "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" .PD Generate code for a little endian target. ! .IP "\fB\-m210\fR" 4 .IX Item "-m210" .PD 0 ! .IP "\fB\-m210\fR" 4 .IX Item "-m210" ! .IP "\fB\-m340\fR" 4 .IX Item "-m340" .PD Generate code for the 210 processor. *************** Generate code for the 210 processor. *** 7393,7473 **** .IX Subsection "IA-64 Options" .PP These are the \fB\-m\fR options defined for the Intel \s-1IA-64\s0 architecture. ! .Ip "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" Generate code for a big endian target. This is the default for \s-1HPUX\s0. ! .Ip "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a little endian target. This is the default for \s-1AIX5\s0 and Linux. ! .Ip "\fB\-mgnu-as\fR" 4 .IX Item "-mgnu-as" .PD 0 ! .Ip "\fB\-mno-gnu-as\fR" 4 .IX Item "-mno-gnu-as" .PD Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default. ! .Ip "\fB\-mgnu-ld\fR" 4 .IX Item "-mgnu-ld" .PD 0 ! .Ip "\fB\-mno-gnu-ld\fR" 4 .IX Item "-mno-gnu-ld" .PD Generate (or don't) code for the \s-1GNU\s0 linker. This is the default. ! .Ip "\fB\-mno-pic\fR" 4 .IX Item "-mno-pic" Generate code that does not use a global pointer register. The result is not position independent code, and violates the \s-1IA-64\s0 \s-1ABI\s0. ! .Ip "\fB\-mvolatile-asm-stop\fR" 4 .IX Item "-mvolatile-asm-stop" .PD 0 ! .Ip "\fB\-mno-volatile-asm-stop\fR" 4 .IX Item "-mno-volatile-asm-stop" .PD Generate (or don't) a stop bit immediately before and after volatile asm statements. ! .Ip "\fB\-mb-step\fR" 4 .IX Item "-mb-step" Generate code that works around Itanium B step errata. ! .Ip "\fB\-mregister-names\fR" 4 .IX Item "-mregister-names" .PD 0 ! .Ip "\fB\-mno-register-names\fR" 4 .IX Item "-mno-register-names" .PD Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for the stacked registers. This may make assembler output more readable. ! .Ip "\fB\-mno-sdata\fR" 4 .IX Item "-mno-sdata" .PD 0 ! .Ip "\fB\-msdata\fR" 4 .IX Item "-msdata" .PD Disable (or enable) optimizations that use the small data section. This may be useful for working around optimizer bugs. ! .Ip "\fB\-mconstant-gp\fR" 4 .IX Item "-mconstant-gp" Generate code that uses a single constant global pointer value. This is useful when compiling kernel code. ! .Ip "\fB\-mauto-pic\fR" 4 .IX Item "-mauto-pic" Generate code that is self-relocatable. This implies \fB\-mconstant-gp\fR. This is useful when compiling firmware code. ! .Ip "\fB\-minline-divide-min-latency\fR" 4 .IX Item "-minline-divide-min-latency" Generate code for inline divides using the minimum latency algorithm. ! .Ip "\fB\-minline-divide-max-throughput\fR" 4 .IX Item "-minline-divide-max-throughput" Generate code for inline divides using the maximum throughput algorithm. ! .Ip "\fB\-mno-dwarf2\-asm\fR" 4 .IX Item "-mno-dwarf2-asm" .PD 0 ! .Ip "\fB\-mdwarf2\-asm\fR" 4 .IX Item "-mdwarf2-asm" .PD Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging info. This may be useful when not using the \s-1GNU\s0 assembler. ! .Ip "\fB\-mfixed-range=\fR\fIregister-range\fR" 4 .IX Item "-mfixed-range=register-range" Generate code treating the given register range as fixed registers. A fixed register is one that the register allocator can not use. This is --- 7382,7462 ---- .IX Subsection "IA-64 Options" .PP These are the \fB\-m\fR options defined for the Intel \s-1IA-64\s0 architecture. ! .IP "\fB\-mbig-endian\fR" 4 .IX Item "-mbig-endian" Generate code for a big endian target. This is the default for \s-1HPUX\s0. ! .IP "\fB\-mlittle-endian\fR" 4 .IX Item "-mlittle-endian" Generate code for a little endian target. This is the default for \s-1AIX5\s0 and Linux. ! .IP "\fB\-mgnu-as\fR" 4 .IX Item "-mgnu-as" .PD 0 ! .IP "\fB\-mno-gnu-as\fR" 4 .IX Item "-mno-gnu-as" .PD Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default. ! .IP "\fB\-mgnu-ld\fR" 4 .IX Item "-mgnu-ld" .PD 0 ! .IP "\fB\-mno-gnu-ld\fR" 4 .IX Item "-mno-gnu-ld" .PD Generate (or don't) code for the \s-1GNU\s0 linker. This is the default. ! .IP "\fB\-mno-pic\fR" 4 .IX Item "-mno-pic" Generate code that does not use a global pointer register. The result is not position independent code, and violates the \s-1IA-64\s0 \s-1ABI\s0. ! .IP "\fB\-mvolatile-asm-stop\fR" 4 .IX Item "-mvolatile-asm-stop" .PD 0 ! .IP "\fB\-mno-volatile-asm-stop\fR" 4 .IX Item "-mno-volatile-asm-stop" .PD Generate (or don't) a stop bit immediately before and after volatile asm statements. ! .IP "\fB\-mb-step\fR" 4 .IX Item "-mb-step" Generate code that works around Itanium B step errata. ! .IP "\fB\-mregister-names\fR" 4 .IX Item "-mregister-names" .PD 0 ! .IP "\fB\-mno-register-names\fR" 4 .IX Item "-mno-register-names" .PD Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for the stacked registers. This may make assembler output more readable. ! .IP "\fB\-mno-sdata\fR" 4 .IX Item "-mno-sdata" .PD 0 ! .IP "\fB\-msdata\fR" 4 .IX Item "-msdata" .PD Disable (or enable) optimizations that use the small data section. This may be useful for working around optimizer bugs. ! .IP "\fB\-mconstant-gp\fR" 4 .IX Item "-mconstant-gp" Generate code that uses a single constant global pointer value. This is useful when compiling kernel code. ! .IP "\fB\-mauto-pic\fR" 4 .IX Item "-mauto-pic" Generate code that is self-relocatable. This implies \fB\-mconstant-gp\fR. This is useful when compiling firmware code. ! .IP "\fB\-minline-divide-min-latency\fR" 4 .IX Item "-minline-divide-min-latency" Generate code for inline divides using the minimum latency algorithm. ! .IP "\fB\-minline-divide-max-throughput\fR" 4 .IX Item "-minline-divide-max-throughput" Generate code for inline divides using the maximum throughput algorithm. ! .IP "\fB\-mno-dwarf2\-asm\fR" 4 .IX Item "-mno-dwarf2-asm" .PD 0 ! .IP "\fB\-mdwarf2\-asm\fR" 4 .IX Item "-mdwarf2-asm" .PD Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging info. This may be useful when not using the \s-1GNU\s0 assembler. ! .IP "\fB\-mfixed-range=\fR\fIregister-range\fR" 4 .IX Item "-mfixed-range=register-range" Generate code treating the given register range as fixed registers. A fixed register is one that the register allocator can not use. This is *************** specified separated by a comma. *** 7479,7516 **** .IX Subsection "D30V Options" .PP These \fB\-m\fR options are defined for D30V implementations: ! .Ip "\fB\-mextmem\fR" 4 .IX Item "-mextmem" Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR, \&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external ! memory, which starts at location \f(CW\*(C`0x80000000\*(C'\fR. ! .Ip "\fB\-mextmemory\fR" 4 .IX Item "-mextmemory" Same as the \fB\-mextmem\fR switch. ! .Ip "\fB\-monchip\fR" 4 .IX Item "-monchip" Link the \fB.text\fR section into onchip text memory, which starts at ! location \f(CW\*(C`0x0\*(C'\fR. Also link \fB.data\fR, \fB.bss\fR, \&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections ! into onchip data memory, which starts at location \f(CW\*(C`0x20000000\*(C'\fR. ! .Ip "\fB\-mno-asm-optimize\fR" 4 .IX Item "-mno-asm-optimize" .PD 0 ! .Ip "\fB\-masm-optimize\fR" 4 .IX Item "-masm-optimize" .PD Disable (enable) passing \fB\-O\fR to the assembler when optimizing. The assembler uses the \fB\-O\fR option to automatically parallelize adjacent short instructions where possible. ! .Ip "\fB\-mbranch-cost=\fR\fIn\fR" 4 .IX Item "-mbranch-cost=n" Increase the internal costs of branches to \fIn\fR. Higher costs means that the compiler will issue more instructions to avoid doing a branch. The default is 2. ! .Ip "\fB\-mcond-exec=\fR\fIn\fR" 4 .IX Item "-mcond-exec=n" Specify the maximum number of conditionally executed instructions that replace a branch. The default is 4. .Sh "Options for Code Generation Conventions" .IX Subsection "Options for Code Generation Conventions" These machine-independent options control the interface conventions --- 7468,7571 ---- .IX Subsection "D30V Options" .PP These \fB\-m\fR options are defined for D30V implementations: ! .IP "\fB\-mextmem\fR" 4 .IX Item "-mextmem" Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR, \&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external ! memory, which starts at location \f(CW0x80000000\fR. ! .IP "\fB\-mextmemory\fR" 4 .IX Item "-mextmemory" Same as the \fB\-mextmem\fR switch. ! .IP "\fB\-monchip\fR" 4 .IX Item "-monchip" Link the \fB.text\fR section into onchip text memory, which starts at ! location \f(CW0x0\fR. Also link \fB.data\fR, \fB.bss\fR, \&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections ! into onchip data memory, which starts at location \f(CW0x20000000\fR. ! .IP "\fB\-mno-asm-optimize\fR" 4 .IX Item "-mno-asm-optimize" .PD 0 ! .IP "\fB\-masm-optimize\fR" 4 .IX Item "-masm-optimize" .PD Disable (enable) passing \fB\-O\fR to the assembler when optimizing. The assembler uses the \fB\-O\fR option to automatically parallelize adjacent short instructions where possible. ! .IP "\fB\-mbranch-cost=\fR\fIn\fR" 4 .IX Item "-mbranch-cost=n" Increase the internal costs of branches to \fIn\fR. Higher costs means that the compiler will issue more instructions to avoid doing a branch. The default is 2. ! .IP "\fB\-mcond-exec=\fR\fIn\fR" 4 .IX Item "-mcond-exec=n" Specify the maximum number of conditionally executed instructions that replace a branch. The default is 4. + .PP + .I "S/390 and zSeries Options" + .IX Subsection "S/390 and zSeries Options" + .PP + These are the \fB\-m\fR options defined for the S/390 and zSeries architecture. + .IP "\fB\-mhard-float\fR" 4 + .IX Item "-mhard-float" + .PD 0 + .IP "\fB\-msoft-float\fR" 4 + .IX Item "-msoft-float" + .PD + Use (do not use) the hardware floating-point instructions and registers + for floating-point operations. When \fB\-msoft-float\fR is specified, + functions in \fIlibgcc.a\fR will be used to perform floating-point + operations. When \fB\-mhard-float\fR is specified, the compiler + generates \s-1IEEE\s0 floating-point instructions. This is the default. + .IP "\fB\-mbackchain\fR" 4 + .IX Item "-mbackchain" + .PD 0 + .IP "\fB\-mno-backchain\fR" 4 + .IX Item "-mno-backchain" + .PD + Generate (or do not generate) code which maintains an explicit + backchain within the stack frame that points to the caller's frame. + This is currently needed to allow debugging. The default is to + generate the backchain. + .IP "\fB\-msmall-exec\fR" 4 + .IX Item "-msmall-exec" + .PD 0 + .IP "\fB\-mno-small-exec\fR" 4 + .IX Item "-mno-small-exec" + .PD + Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction + to do subroutine calls. + This only works reliably if the total executable size does not + exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead, + which does not have this limitation. + .IP "\fB\-m64\fR" 4 + .IX Item "-m64" + .PD 0 + .IP "\fB\-m31\fR" 4 + .IX Item "-m31" + .PD + When \fB\-m31\fR is specified, generate code compliant to the + Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate + code compliant to the Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in + particular to generate 64\-bit instructions. For the \fBs390\fR + targets, the default is \fB\-m31\fR, while the \fBs390x\fR + targets default to \fB\-m64\fR. + .IP "\fB\-mmvcle\fR" 4 + .IX Item "-mmvcle" + .PD 0 + .IP "\fB\-mno-mvcle\fR" 4 + .IX Item "-mno-mvcle" + .PD + Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction + to perform block moves. When \fB\-mno-mvcle\fR is specifed, + use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default. + .IP "\fB\-mdebug\fR" 4 + .IX Item "-mdebug" + .PD 0 + .IP "\fB\-mno-debug\fR" 4 + .IX Item "-mno-debug" + .PD + Print (or do not print) additional debug information when compiling. + The default is to not print debug information. .Sh "Options for Code Generation Conventions" .IX Subsection "Options for Code Generation Conventions" These machine-independent options control the interface conventions *************** of \fB\-ffoo\fR would be \fB\-fno-foo\fR *** 7521,7527 **** one of the forms is listed\-\-\-the one which is not the default. You can figure out the other form by either removing \fBno-\fR or adding it. ! .Ip "\fB\-fexceptions\fR" 4 .IX Item "-fexceptions" Enable exception handling. Generates extra code needed to propagate exceptions. For some targets, this implies \s-1GCC\s0 will generate frame --- 7576,7582 ---- one of the forms is listed\-\-\-the one which is not the default. You can figure out the other form by either removing \fBno-\fR or adding it. ! .IP "\fB\-fexceptions\fR" 4 .IX Item "-fexceptions" Enable exception handling. Generates extra code needed to propagate exceptions. For some targets, this implies \s-1GCC\s0 will generate frame *************** to enable this option when compiling C c *** 7534,7540 **** properly with exception handlers written in \*(C+. You may also wish to disable this option if you are compiling older \*(C+ programs that don't use exception handling. ! .Ip "\fB\-fnon-call-exceptions\fR" 4 .IX Item "-fnon-call-exceptions" Generate code that allows trapping instructions to throw exceptions. Note that this requires platform-specific runtime support that does --- 7589,7595 ---- properly with exception handlers written in \*(C+. You may also wish to disable this option if you are compiling older \*(C+ programs that don't use exception handling. ! .IP "\fB\-fnon-call-exceptions\fR" 4 .IX Item "-fnon-call-exceptions" Generate code that allows trapping instructions to throw exceptions. Note that this requires platform-specific runtime support that does *************** not exist everywhere. Moreover, it only *** 7542,7554 **** instructions to throw exceptions, i.e. memory references or floating point instructions. It does not allow exceptions to be thrown from arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR. ! .Ip "\fB\-funwind-tables\fR" 4 .IX Item "-funwind-tables" Similar to \fB\-fexceptions\fR, except that it will just generate any needed static data, but will not affect the generated code in any other way. You will normally not enable this option; instead, a language processor that needs this handling would enable it on your behalf. ! .Ip "\fB\-fpcc-struct-return\fR" 4 .IX Item "-fpcc-struct-return" Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like longer ones, rather than in registers. This convention is less --- 7597,7609 ---- instructions to throw exceptions, i.e. memory references or floating point instructions. It does not allow exceptions to be thrown from arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR. ! .IP "\fB\-funwind-tables\fR" 4 .IX Item "-funwind-tables" Similar to \fB\-fexceptions\fR, except that it will just generate any needed static data, but will not affect the generated code in any other way. You will normally not enable this option; instead, a language processor that needs this handling would enable it on your behalf. ! .IP "\fB\-fpcc-struct-return\fR" 4 .IX Item "-fpcc-struct-return" Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like longer ones, rather than in registers. This convention is less *************** on the target configuration macros. *** 7560,7566 **** .Sp Short structures and unions are those whose size and alignment match that of some integer type. ! .Ip "\fB\-freg-struct-return\fR" 4 .IX Item "-freg-struct-return" Use the convention that \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values are returned in registers when possible. This is more efficient for small --- 7615,7621 ---- .Sp Short structures and unions are those whose size and alignment match that of some integer type. ! .IP "\fB\-freg-struct-return\fR" 4 .IX Item "-freg-struct-return" Use the convention that \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values are returned in registers when possible. This is more efficient for small *************** standard for the target. If there is no *** 7572,7593 **** defaults to \fB\-fpcc-struct-return\fR, except on targets where \s-1GCC\s0 is the principal compiler. In those cases, we can choose the standard, and we chose the more efficient register return alternative. ! .Ip "\fB\-fshort-enums\fR" 4 .IX Item "-fshort-enums" Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type will be equivalent to the smallest integer type which has enough room. ! .Ip "\fB\-fshort-double\fR" 4 .IX Item "-fshort-double" Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR. ! .Ip "\fB\-fshared-data\fR" 4 .IX Item "-fshared-data" Requests that the data and non-\f(CW\*(C`const\*(C'\fR variables of this compilation be shared data rather than private data. The distinction makes sense only on certain operating systems, where shared data is shared between processes running the same program, while private data exists in one copy per process. ! .Ip "\fB\-fno-common\fR" 4 .IX Item "-fno-common" In C, allocate even uninitialized global variables in the data section of the object file, rather than generating them as common blocks. This has the --- 7627,7648 ---- defaults to \fB\-fpcc-struct-return\fR, except on targets where \s-1GCC\s0 is the principal compiler. In those cases, we can choose the standard, and we chose the more efficient register return alternative. ! .IP "\fB\-fshort-enums\fR" 4 .IX Item "-fshort-enums" Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type will be equivalent to the smallest integer type which has enough room. ! .IP "\fB\-fshort-double\fR" 4 .IX Item "-fshort-double" Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR. ! .IP "\fB\-fshared-data\fR" 4 .IX Item "-fshared-data" Requests that the data and non-\f(CW\*(C`const\*(C'\fR variables of this compilation be shared data rather than private data. The distinction makes sense only on certain operating systems, where shared data is shared between processes running the same program, while private data exists in one copy per process. ! .IP "\fB\-fno-common\fR" 4 .IX Item "-fno-common" In C, allocate even uninitialized global variables in the data section of the object file, rather than generating them as common blocks. This has the *************** effect that if the same variable is decl *** 7595,7604 **** two different compilations, you will get an error when you link them. The only reason this might be useful is if you wish to verify that the program will work on other systems which always work this way. ! .Ip "\fB\-fno-ident\fR" 4 .IX Item "-fno-ident" Ignore the \fB#ident\fR directive. ! .Ip "\fB\-fno-gnu-linker\fR" 4 .IX Item "-fno-gnu-linker" Do not output global initializations (such as \*(C+ constructors and destructors) in the form used by the \s-1GNU\s0 linker (on systems where the \s-1GNU\s0 --- 7650,7659 ---- two different compilations, you will get an error when you link them. The only reason this might be useful is if you wish to verify that the program will work on other systems which always work this way. ! .IP "\fB\-fno-ident\fR" 4 .IX Item "-fno-ident" Ignore the \fB#ident\fR directive. ! .IP "\fB\-fno-gnu-linker\fR" 4 .IX Item "-fno-gnu-linker" Do not output global initializations (such as \*(C+ constructors and destructors) in the form used by the \s-1GNU\s0 linker (on systems where the \s-1GNU\s0 *************** you want to use a non-GNU linker, which *** 7608,7621 **** constructors and destructors. (\fBcollect2\fR is included in the \s-1GCC\s0 distribution.) For systems which \fImust\fR use \fBcollect2\fR, the compiler driver \fBgcc\fR is configured to do this automatically. ! .Ip "\fB\-finhibit-size-directive\fR" 4 .IX Item "-finhibit-size-directive" Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that would cause trouble if the function is split in the middle, and the two halves are placed at locations far apart in memory. This option is used when compiling \fIcrtstuff.c\fR; you should not need to use it for anything else. ! .Ip "\fB\-fverbose-asm\fR" 4 .IX Item "-fverbose-asm" Put extra commentary information in the generated assembly code to make it more readable. This option is generally only of use to those --- 7663,7676 ---- constructors and destructors. (\fBcollect2\fR is included in the \s-1GCC\s0 distribution.) For systems which \fImust\fR use \fBcollect2\fR, the compiler driver \fBgcc\fR is configured to do this automatically. ! .IP "\fB\-finhibit-size-directive\fR" 4 .IX Item "-finhibit-size-directive" Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that would cause trouble if the function is split in the middle, and the two halves are placed at locations far apart in memory. This option is used when compiling \fIcrtstuff.c\fR; you should not need to use it for anything else. ! .IP "\fB\-fverbose-asm\fR" 4 .IX Item "-fverbose-asm" Put extra commentary information in the generated assembly code to make it more readable. This option is generally only of use to those *************** debugging the compiler itself). *** 7625,7642 **** \&\fB\-fno-verbose-asm\fR, the default, causes the extra information to be omitted and is useful when comparing two assembler files. ! .Ip "\fB\-fvolatile\fR" 4 .IX Item "-fvolatile" Consider all memory references through pointers to be volatile. ! .Ip "\fB\-fvolatile-global\fR" 4 .IX Item "-fvolatile-global" Consider all memory references to extern and global data items to be volatile. \s-1GCC\s0 does not consider static data items to be volatile because of this switch. ! .Ip "\fB\-fvolatile-static\fR" 4 .IX Item "-fvolatile-static" Consider all memory references to static data to be volatile. ! .Ip "\fB\-fpic\fR" 4 .IX Item "-fpic" Generate position-independent code (\s-1PIC\s0) suitable for use in a shared library, if supported for the target machine. Such code accesses all --- 7680,7697 ---- \&\fB\-fno-verbose-asm\fR, the default, causes the extra information to be omitted and is useful when comparing two assembler files. ! .IP "\fB\-fvolatile\fR" 4 .IX Item "-fvolatile" Consider all memory references through pointers to be volatile. ! .IP "\fB\-fvolatile-global\fR" 4 .IX Item "-fvolatile-global" Consider all memory references to extern and global data items to be volatile. \s-1GCC\s0 does not consider static data items to be volatile because of this switch. ! .IP "\fB\-fvolatile-static\fR" 4 .IX Item "-f